JP2591464B2 - Die bonding equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing apparatus, and more particularly to a die bonding apparatus for mounting a semiconductor chip on a lead frame.

[0002]

2. Description of the Related Art A conventional die bonding apparatus for mounting a semiconductor chip on a lead frame is shown in FIG. FIG. 4A is a plan view, and FIG. 5B is a side view. That is, the wafer W divided into individual chips is fixed to the wafer ring 12 by the sheet 13 and the XY table 1
1. An ITV camera 14 is provided above the wafer W, and the image information of the photographed wafer W is binarized by an image processing unit 15 to recognize a chip position and a mark on the chip. The XY table 11
Rail 16 for transporting lead frame L adjacent to
Is provided. Further, the mount head 20 that can be driven up and down is moved by the mount head driving unit 19 to the chip positioning position on the XY table 11 and the transfer rail 16.
And can be moved between the die bonding positions, and is controlled by the control unit 22A.

[0003] When die bonding is performed using such a die bonding apparatus, a defective chip is marked in advance with a laser marker or an ink marker based on the result of an electrical characteristic test, and this is marked by an IT.
An image is picked up by the V camera 14, and only good chips are selected based on the recognition result of the mark on the chip. The selected chip is taken out of the wafer W by the mount head 20, moved to the lead frame L carried on the carrying rail 16, and mounted at a predetermined position.

[0004]

However, when performing such die bonding, there are cases where chips classified into a plurality of grades according to electrical characteristics, partially good chips, and heterogeneous chips exist on the same wafer. If it is necessary to classify within a non-defective product, marking that contaminates the chip is impossible, so this conventional die bonding device cannot distinguish it, and therefore all non-defective chips are die-bonded and assembled. After completion, it is necessary to measure the electrical characteristics again to classify the grades, and then perform the marking for the grade classification again, which causes a problem that the productivity is significantly reduced.

Further, when a plurality of types of chips are formed on the same wafer, or when mounted on lead frames having different electrical characteristics, the die bonding apparatus is changed for each type of chip. And there is a problem that productivity is significantly reduced, and when the wafer is removed from the die bonding apparatus, the remaining chips come into contact with each other due to the tension of the sheet and are damaged, thereby lowering the yield. There is also a problem. SUMMARY OF THE INVENTION An object of the present invention is to provide a die bonding apparatus capable of performing die bonding of a plurality of types of chips or chips classified into a plurality of grades on a wafer in which these chips are mixed in one step. is there.

[0006]

Die bonding apparatus of the present invention, in order to solve the problems] includes a XY table for placing a wafer is divided into a plurality of chips, and ITV camera for imaging the wafer, from the image information of the ITV camera An image processing unit that recognizes the position of the wafer and each chip, a memory unit that stores information on each chip of the wafer as map data, a plurality of transport rails that individually transport a plurality of lead frames, and an individual chip A mount head that picks up and moves to and mounts on any of the lead frames on the transfer table, and controls a movement position of the mount head according to chip information from the memory unit to transfer each chip to a desired transfer rail. And a control unit for controlling mounting on the lead frame. Here, the chip information to be stored in the memory unit is defined as a non-defective product, a defective product, and a plurality of grades based on electrical characteristics, or a non-defective product and a defective product based on two or more types of chips and electrical characteristics. The plurality of transport rails are configured to transport the same type or different types of lead frames by grade or type.

[0007]

According to the information from the memory unit, the mount head mounts the picked-up chip on a lead frame on a different transport rail according to the grade of the corresponding electric characteristic or the kind of the chip. For this reason,
It is possible to perform die bonding in the same process while sorting chips of different grades or different types.

[0008]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a view showing one embodiment of a die bonding apparatus according to the present invention. FIG. 1 (a) is a plan view, and FIG. 1 (b) is a side view. In these figures, a wafer W divided into individual chips and fixed to a wafer ring 12 by a sheet 13 is placed on an XY table 11. An ITV camera 14 is arranged above the XY table 11, and picks up an image of the wafer W and inputs the obtained image information to the image processing unit 15. The image processing unit 15 classifies the type and grade of each chip formed on the wafer W based on the image information.

At a position adjacent to the XY table 11, a plurality of lead frames of the same type or different types, here, three types of lead frames L1, L
2, a transport rail 16 for transporting the lead frame L3
A, a transfer rail 16B, and a transfer rail 16C are extended. Lead frame supply trays 17A to 17C are arranged on the upstream side of these transport rails 16A to 16C, respectively, and lead frame storage trays 18A to 18C are arranged on the downstream side. Further, the mount head 20 is moved between the XY table 11 and each of the transport rails 16A to 16C by the mount head driving unit 19 and mounts the selected chip of the wafer W on the XY table 11 on any one of the lead frames. Provided. A memory unit 21 for storing information on chips on the wafer W as map data is provided. Chip information and product designation conditions from the memory unit 21 are provided.
A control unit 22 is provided for controlling the mounting of the chip on a desired lead frame in accordance with the signal from the image processing unit 15.

Next, a die bonding operation by the die bonding apparatus of FIG. 1 will be described with reference to a flowchart of FIG. Prior to the die bonding step, a recognition pattern for recognizing the wafer type and a target as a position reference are formed on the wafer W at peripheral positions of the chips in advance. In addition, each chip is subjected to an electrical characteristic test and the like, and the results are used to discriminate non-defective products from defective products. 21
Is stored as map data. At this time, each chip has an X based on a target formed on a part of the wafer.
It is defined by the Y coordinate position.

Assuming that the preprocessing has been performed, first, image data of a target formed on the wafer W is captured by the ITV camera 14, and this is set in the image processing unit 15 in advance. The position of the wafer W is aligned by comparing with the target data and matching the two. Similarly, the recognition pattern formed on the wafer W is similarly captured by the ITV camera 14 and recognized by the image processing unit 15 to recognize the type of the wafer. Next, from the memory unit 21, the electrical characteristic data of each chip with respect to the XY coordinates of all the chips of the corresponding wafer and non-defective products (grades I, II,
III) Or take out the defective map data as chip information data. Then, based on the XY coordinate data of the good chip, the corresponding chip is positioned directly below the mount head 20 in the XY table 11, and the mount head 20 is moved down to pick up the chip.

Next, the chip is mounted on the mount head driving unit 1.
9 and is transported on the transport rails 16A to 16C by the mount head 20 moved by the
1 to L3. At this time, under the control of the control unit 22, the mount head 20 is set to the applicable product designation condition among the three transport rails 16A to 16C according to the grade classification from the chip information data and the given product designation condition. It is moved on a transport rail and die-bonded to the lead frame. For example, in the memory unit 21, as a product specification condition, a grade I chip is placed on the lead frame L1 on the transport rail I6A, and a grade II chip is placed on the transport rail 1
If it is stored in the lead frame L2 on the lead frame 6B that the die of the grade III is die-bonded to the lead frame L3 on the transport rail 16C, the chips of each grade can be connected to the corresponding lead frame by the control of the control unit 22. Will be installed.

Thereafter, the process is repeated for the next good chip until there is no good chip on the wafer W. Therefore, in this die bonding step, a large number of chips are mounted on the corresponding lead frames while being classified according to their electrical characteristics. Therefore, the step of classifying the electrical characteristics of the chip again after the completion of die bonding and performing the marking for indicating the classification is not required, and die bonding with high productivity can be realized. In the above-described embodiment, the die bonding is performed by classifying the chips according to the grade of the electrical characteristics. However, the chip information is not limited to this. May be classified.

FIG. 3 is a flowchart showing another embodiment of the present invention, in which different types of chips are formed on the same wafer. In this case, the configuration of the die bonding apparatus is the same as that of the above embodiment, but the memory unit stores the type data of each chip, and the lead rail corresponding to the chip type is transported to each transport rail. It is configured to be.

First, similarly to the above embodiment, the XY table 1
1 from the memory unit 21 and X from the target (base point) on the wafer W from the memory unit 21.
Chip information data in which the type (A, B) of each chip with respect to the Y coordinate and good data and bad data of electrical characteristics are stored as map data are taken out. Then, one of the good chips is picked up by the mount head 20 based on the XY coordinate data of the good chip. Thereafter, the mount head 20 moves on a predetermined transport rail according to a chip type from the chip information data and a predetermined product designation condition, and is die-bonded to a predetermined lead frame. This is because, for example, chip A
May be stored in the lead frame L1 on the transport rail 16A, and that the chip B is die-bonded to the lead frame L2 on the transport rail 16B.

Thereafter, as in the first embodiment, the process is repeated for the next good chip until there is no good chip on the wafer W. Therefore, even when different chips are mixedly formed on the same wafer, the production becomes possible without changing the die bonding apparatus for each chip type, and the productivity is remarkably improved.

Although not shown, the controller unit 22 may have a built-in counter. By incorporating such a counter, the number of chips to be die-bonded can be counted, and die-bonding can be performed in which chips on the wafer W are distributed to desired lead frames for each desired number. For example, when die bonding is performed on a lead frame formed in multiple units so that multiple chips are mounted, the lead on the transport rail is used until the number of chips actually mounted is counted until the number of chips that can be mounted is reached. It is possible to stop the transport of the frame and perform an operation of transporting the next lead frame to a predetermined position when a predetermined number is counted.

[0018]

As described above, according to the present invention, the chip information such as the grade and type of the electrical characteristics of each of a plurality of chips divided from the same wafer is used as the memory unit as the map data. The control unit controls the movement position of the mount head according to the chip information and controls the mounting of each chip on a lead frame on a desired one of the plurality of transfer rails. While sorting chips of different grades or different types, die bonding can be performed in the same process. Therefore, there is no need to measure and classify the electrical characteristics again after the die bonding process of the chip, and it is not necessary to perform die bonding by changing the lead frame or die bonding apparatus for each type, and high productivity die bonding. Can be performed.

[Brief description of the drawings]

FIG. 1 is a plan view and a side view showing one embodiment of a die bonding apparatus of the present invention.

FIG. 2 is a flowchart of an example of a die bonding method using the die bonding apparatus of FIG.

FIG. 3 is a flowchart of another example of a die bonding method using the die bonding apparatus of FIG. 1;

FIG. 4 is a plan view and a side view showing an example of a conventional die bonding apparatus.

[Explanation of symbols]

 11 XY table 14 ITV camera 15 Image processing unit 16A to 16C Transport rail 19 Mount head drive unit 20 Mount head 21 Memory unit 22 Control unit L1 to L3 Lead frame W Wafer

Claims (4)

(57) [Claims] 1. A die bonding apparatus for mounting a large number of divided semiconductor chips from the same wafer on a lead frame for each chip, an XY table for mounting the wafer, and an ITV camera for imaging the wafer. And an image processing unit for recognizing the position of the wafer and each chip from the image information of the ITV camera, a memory unit for storing information of each chip of the wafer as map data, and individually transporting a plurality of lead frames. A plurality of transport rails, a mount head that individually picks up each of the chips and moves to and mounts on any of the lead frames on the transport table;
A die bonding apparatus comprising: a control unit that controls a movement position of the mount head according to chip information from the memory unit and controls mounting of each chip on a lead frame on a desired transport rail. 2. The die bonding apparatus according to claim 1, wherein the chip information is a non-defective product, a defective product, and a plurality of types of grades according to electrical characteristics. 3. The die bonding apparatus according to claim 1, wherein the chip information is a non-defective product or a defective product based on at least two types of chips and electrical characteristics. 4. The die bonding apparatus according to claim 1, wherein the plurality of transport rails transport the same type or different types of lead frames by grade or type.