JP2608964B2 - Image processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus used for a facsimile, a copying machine, a DTP device, or the like.

2. Description of the Related Art A conventional example of an image processing apparatus for performing a reduction process on an original image subjected to pseudo halftone processing to obtain a reduced image is disclosed in JP-A-1-136465 or FIG. There is something to show. The image processing device shown in FIG.
Assuming that an input terminal 1 to which an image signal is input and a reduction ratio with respect to the original image are (q / p) × (q / p), p ×
a block extracting unit 2 for extracting a block composed of p pixels, and a pixel extracting unit 3 for selecting and extracting q × q pixels from the block extracted by the block extracting unit 2
And an output terminal 4 for outputting the image data clipped by the pixel clipping unit 3, and a predetermined number of pixel reduction processes corresponding to the reduction ratio have been performed.

SUMMARY OF THE INVENTION However, in such a conventional image processing apparatus, a pseudo halftone original image whose density is represented by a ratio of the number of white dots and the number of black dots in a plurality of adjacent pixels is originally used. Because a fixed pixel is simply cut out according to the reduction ratio for a block composed of a predetermined number of pixels, the local ratio of the number of white dots to the number of black dots changes. I will. Therefore, depending on the method of clipping, in a pseudo halftone image or a binary / pseudo halftone mixed image, the number of gradations before reduction may be reduced by the reduction process, and the image quality may deteriorate. Further, when the pseudo halftone image is a dither image, there is a problem that the number of gradations decreases (changes) regularly and moire occurs. In addition, when the above-described image processing is performed on the binary / pseudo halftone mixed image, there is a problem that an unnecessary notch appears around a thin broken line.

In the invention of Japanese Patent Application Laid-Open No. 1-136465, the input image data is first subjected to halftone processing, and the halftoned binarized data is overlapped or thinned out and scaled up and down, so that halftone processing and enlargement / reduction are achieved. The present invention provides an image apparatus which has a high processing speed and does not require a large memory requirement, by omitting a process of storing image data in a memory between processes. However, since this image processing apparatus is for obtaining an image which has been subjected to pseudo halftone processing such as a dither image or the like, a binary image
It is not enough to process pseudo halftone mixed images effectively.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object of the present invention is to provide an image in which a binary / pseudo halftone mixed image is correctly determined and before and after reduction processing of a pseudo halftone processed image. Accordingly, an object of the present invention is to provide an image processing apparatus in which the image quality is kept constant without reducing the number of gradations.

Means for Solving the Problems In order to achieve the above object, the present invention provides an input means for inputting an image signal and a discrimination for judging whether the image signal from the input means is a simple binary image or a pseudo halftone image. Means, first reduction processing means for performing reduction processing on a pseudo halftone image with respect to the image signal from the input means, and second reduction processing for performing reduction processing on a simple binary image with respect to the image signal from the input means Means for selecting and outputting one of the output image signals from the first reduction processing means and the second reduction processing means based on the determination signal output from the determination means Pattern determining means for storing a binary data determining pattern and a pseudo halftone data determining pattern for data in a block of a predetermined size; Extracting means for extracting a discrimination block having the same size as the block from the image signal from the means, and signal generating means for generating the discrimination signal by comparing the output from the cutting means with the output from the pattern storage means. , And the summary.

Operation According to the above configuration, the pattern for binarized image determination and the pattern for pseudo halftone image determination are stored in the pattern storage means in block units in advance. Then, the extracting unit extracts a determination block having the same size as the block from the input image signal. Thereafter, the signal generating means compares the output from the extracting means with the output from the pattern storage means to generate a discrimination signal, and inputs this discrimination signal to the selection means. One of the output image signals from the second reduction processing means is selected and output as a reduced image signal.

1 to 8 show a first embodiment of an image processing apparatus according to the present invention.
FIG. 4 is a diagram for explaining the embodiment of the present invention and its operation.

In FIG. 1, reference numeral 11 denotes an image input unit to which an image signal is input, and 12 denotes a binary which determines whether the input image signal is an image signal subjected to simple binarization processing or an image signal subjected to pseudo halftone processing.・
A pseudo-halftone discriminating unit 13 is a pseudo-halftone image reduction processing unit that performs a pseudo-halftone image reduction process on the image signal input to the image input unit 11, and 14 is an input to the image input unit 11. A binary image reduction processing unit for performing a reduction process for a simple binary image on the processed image signal;
A selector 16 for selecting and outputting one of the image signals output from the pseudo-halftone image reduction processor 13 and the binary image reduction processor 14 according to the discrimination signal output from 12; Is an image output terminal from which the reduced image signal is output.

As shown in FIG. 2, the binary / pseudo halftone discriminating section 12 stores a pattern memory for storing a binarized image judgment pattern and a pseudo halftone image judgment pattern for data in a block of a predetermined size. ROM 17 as a means, a discrimination block cutout unit 18 for cutting out a discrimination block of the same size as the block from the input image signal, and a discrimination signal is generated by comparing the output of the discrimination block cutout unit 18 with the output of the ROM 17. A determination signal generator 19 that outputs the determination signal to the selector 15. ROM 17 contains the third
Image determination patterns P1 to P16 as shown in the figure are stored. Each pattern is composed of 16 pixels of 4 × 4. Among these patterns, the pattern in which white dots and black dots collectively extend in the vertical and horizontal directions in the block, such as the patterns of P1 to P7, is a pattern for binary judgment. Is stored as On the other hand, a pattern in which white dots and black dots are relatively dispersed in the vertical and horizontal directions in a block, such as the patterns P8 to P16, is stored as a pseudo halftone determination pattern.

The pseudo-halftone reduction processing unit 13, as shown in FIG.
An area cutout unit 20 that cuts out an image area in units of blocks of a predetermined number of pixels from the output of the image input unit 11, and blocks the number of pixels according to the reduction rate from the area cut out by the area cutout unit 20 And a block cutout unit 21 for cutting out in units.

The area cutout unit 20 sets the reduction ratio to (q / p) × (q / p): (where q <p, and q and p have no divisor to each other) × n: When a block composed of n × n pixels is defined as one unit, the image signal input to the image input unit 11 is composed of p × n pixels in the main scanning direction and p × n pixels in the sub-scanning direction (p × n)
It is set so as to cut out an area of × (p × n) pixels.

Further, the block extracting section 21 is provided in the area extracting section 20.
Is set so that q × q blocks composed of n × n pixels are cut out from the area and output to the selector unit 15.

Further, in the binary image reduction processing unit 14, the reduction processing is performed by a method such as a projection method processing, a rear projection method processing, or a logical sum method processing.

The operation of the image processing apparatus having such a configuration will be described below. Here, it is assumed that the image input unit 11 receives, as an example, the image signal V shown in FIG. 6 as an original image. In performing the reduction process, the number of tones of the pseudo halftone image is n = 2, p = 2, q = 1, that is, the reduction ratio is (q / p) × (q / p) = 1/4. .

The image signal V input to the image input unit 11 is input to each of a binary / pseudo halftone discriminating unit 12, a pseudo halftone image reduction processing unit 13, and a binary image reduction processing unit 14.

In the binary / pseudo halftone discriminating section 12, the discriminating block extracting section 18 extracts a discriminating block of the same 4 × 4 size as the blocks of the discriminating patterns P1 to P16 from the input image signal V. After that, the discrimination signal generation means collates the output of the discrimination block cutout section 18 with the output of the ROM 17. As a result of the collation, if the dot configuration of the discrimination block matches P1 to P7 among the discrimination patterns, the discrimination signal “0” is generated assuming that the image in this discrimination block is a binary image. Also, as a result of the comparison, the dot configuration of the discrimination block is P8 to P1 of the discrimination pattern.
If it matches 6, the image in this determination block is determined to be a pseudo halftone image, and a determination signal “1” is generated. Then, the determination signal “0” or “1” is output to the selector unit 15.

In the pseudo halftone image reduction processing unit 13, the area extraction unit
20 is an area A including four blocks of 2 × 2 pixels (the number of pixels is 16) from the image signal V input to the image input unit 11
Cut out 1, A2, A3, A4. FIG. 6 shows the area cut out by the area cutout unit 20 in units of blocks. The data in this area is input to the block cutout unit 21. In the block cutout section 21, one block B11, B21, B31, B41 from each of the areas A1 to A4 of the area cutout section 20 respectively.
Select The data of the selected block is stored in the selector
Output to 15. Since these blocks are composed of the same number of pixels as the number of gradations of the original image, the gradation of the original image is maintained in each block. Therefore, if the original image is an image that has been subjected to pseudo halftone processing, there is no decrease in the number of gradations as shown in FIG.
Further, a pseudo halftone image which has been reduced and has no moiré is output.

Further, as described above, the binary image reduction processing unit 14 performs reduction processing by a method such as a projection method, a rear projection method, or a logical sum method.

The selector unit 15 outputs one of the output of the pseudo-halftone image reduction processing unit 13 and the output of the binary image reduction processing unit 14 in accordance with the determination signal output from the binary / pseudo halftone determination unit 12. select. That is, if the discrimination signal is "0" indicating a binary image, the output of the binary image reduction processing unit 14 is selected, while if the discrimination signal is "1" indicating a pseudo halftone image, the pseudo halftone image is selected. The output of the image reduction processing unit 13 is selected and output as a reduced image signal.

FIG. 8 is a block diagram showing another example of the binary / pseudo halftone discriminating section 12. As shown in FIG. Binary / pseudo halftone discriminator according to this example
Reference numeral 12 denotes a discrimination block clipping section 22 for clipping a block composed of predetermined pixels from the input original image, and the number of white / black changes in the main scanning direction with respect to the discrimination block clipped by the discrimination block clipping section 22. Main scanning direction 0/1 change number counter 23 as first counter means for counting
A sub-scanning direction 0/1 change number counter 24 as second counter means for counting the number of white / black changes in the sub-scanning direction with respect to the block cut out by the discrimination block cut-out unit 22; A first comparator 25 that compares the output of the 0/1 change number counter 23 with a predetermined threshold value, a second comparator 26 that compares the output of the 0/1 change number counter 24 with a predetermined threshold value, And an AND circuit 27 that outputs the logical product of the outputs of the first comparator 25 and the second comparator 26.

In such a configuration, first, the discrimination block cutout unit
22 cuts out a predetermined discrimination block from the input image signal V.
The main scanning direction 0/1 change number counter 23 and the sub-scanning direction 0/1 change number counter 24 count the number of 0/1 changes in each direction with respect to this discrimination block. To the respective comparators 25 and 26. The first and second comparators 25 and 26 output “1” signals when the 0/1 change count is greater than the threshold value in each direction. When the "1" signal is input from either of the first and second comparators 25 and 26, the AND circuit 27 determines that the input image signal is a pseudo halftone image, and outputs the determination signal "1" to the selector unit. In other cases, the input image signal is determined to be a binary image, and a determination signal “0” is output to the selector unit 15.

Then, as described in the description of the first embodiment, the selector section 15 responds to the discrimination signal output from the binary / pseudo-halftone discriminating section 12 by using the pseudo-halftone image reduction processing section 13.
And the output of the binary image reduction processor 14 are selected and output as a reduced image signal.

As described above, according to the present invention, the input image signal is thinned out in units of blocks each having a number of pixels equal to the number of tones of the pseudo-halftone image, and reduced, while the projection method or the like is used. The method for image reduction of a binary image is used to select both images in accordance with the determination result of the binary / pseudo halftone discriminating unit. No reduction or moiré occurs, and 2
Fine line breaks are eliminated with the image reduction processing of the value image, and a high-quality image is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of an image processing apparatus according to the present invention, FIG. 2 is a block diagram showing an example of a binary / pseudo halftone discriminating section used in the above embodiment, and FIG. FIG. 4 is a plan view showing an example of a discrimination pattern stored in the binary / pseudo-halftone discriminating section. FIG. 4 is a block diagram showing a configuration example of a pseudo-halftone image reduction processing section used in the embodiment. FIG. 6 is a plan view showing an example of an original image subjected to reduction processing in the embodiment, FIG. 6 is a diagram showing an area cut out by an area cutout unit in the embodiment in block units, and FIG. , FIG. 8 is a block diagram showing another example of the binary / pseudo halftone discriminating section 12, and FIG. 9 is an example of a conventional image processing apparatus. FIG. 11 image input unit, 12 binary / pseudo halftone discriminating unit, 13
... Reduction processing section for pseudo halftone image, 14... Reduction processing section for binary image, 15... Selector section, 16... Image output section, 17.
... ROM (pattern memory means), 18, 22 ... discrimination block cutout section, 19 ... discrimination signal generation section, 20 ... area cutout section, 21 ... block cutout section, 23 ... main scanning direction 0/1
A change counter, 24... 0/1 change number counter in the sub-scanning direction, 25... A first comparator, 26... A second comparator, 27.

Claims (1)

(57) [Claims] An image signal input means, an image signal from the input means for judging whether a simple binary image is a pseudo halftone image, and a pseudo intermediate image signal from the input means. First reduction processing means for performing reduction processing on a toned image, and simple 2
Second reduction processing means for performing reduction processing on the value image, and a determination signal output from the determination means,
Selecting means for selecting and outputting one of the output image signals from the first reduction processing means and the second reduction processing means; A pattern storage unit for storing a binarized data determination pattern and a pseudo halftone data determination pattern; a cutout unit for cutting out a determination block having the same size as the block from an image signal from the input unit; An image processing apparatus comprising: a signal generating unit configured to compare an output from the extracting unit with an output from the pattern storing unit to generate the determination signal.