JP2625366B2 - Field emission cold cathode and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cold cathode serving as an electron emission source, and more particularly to a field emission cold cathode emitting electrons from a sharp tip and a method of manufacturing the same.

[0002]

2. Description of the Related Art A cold cathode formed of an emitter on a minute cone and a gate electrode formed in the immediate vicinity of the emitter and having a function of extracting current from the emitter and having a current control function is arranged on an array. Cathodes have been proposed (Journal of Applied Physi
cs, Vol39, No7, pp3504, 196
8). The Spindt-type cold cathode has advantages that a higher current density can be obtained as compared with a hot cathode, and the velocity dispersion of emitted electrons is small. Further, compared to a single field emission emitter, the current noise is small, the device operates at a low voltage of several tens to 200 V, and operates even in an environment with a relatively poor vacuum.

FIG. 5A is a cross-sectional view showing the construction of a main part of a Spindt-type cold cathode according to the prior art. An emitter 102 on a minute cone having a height of about 1 μm is formed on a conductive substrate 101 by a film deposition method. The substrate 101 and the emitter 102 are electrically connected, and a voltage of about 100 V is applied between the substrate 101 (and the emitter 102) and the gate electrode 103. Between the substrate 101 and the gate electrode 10 3 of about 1 [mu] m,
The opening diameter of the gate electrode is as small as about 1 μm,
Of the emitter 10 is extremely sharp.
Strong electrolysis is applied to the tip of No. 2. This electrolysis is 2-5 × 1
When the voltage exceeds 07 V / cm, electrons are emitted from the tip of the emitter 102. The micro cold cathode having such a structure is mounted on the substrate 1.
Arranging the array on top of 01 forms a planar cathode that emits a large current.

FIG. 5B is a partially enlarged cross-sectional view of a main part of the cathode shown in FIG. A large number of emitters 102 are formed at the central portion of the substrate 101 and serve as electron sources for electron beams. The gate electrode 103 is formed in a portion where the emitter 102 is formed, and is connected to a bonding pad 107 through a wiring 106. The insulating layer 104 includes the gate electrode 103, the wiring 106, the bonding pad 10
7 and the substrate 101 to keep the gate electrode 103, the wiring 106, the bonding pad 107 and the substrate 101 insulated.

On the other hand, Japanese Patent Application Laid-Open No. 3-129631 discloses a Schottky junction type electron-emitting device which is a conventional cold cathode, but this electron-emitting device is almost different from the field emission cathode of the present invention. A part of the electrons generated by the avalanche amplification of the Schottky junction is taken out into a vacuum. A thick oxide film LOCOS (Local Oxidation) around the Schottky junction disclosed therein.
The on-of-silicon structure fulfills an element isolation function conventionally performed by a guard ring, thereby simplifying the configuration of a cold cathode element and enabling miniaturization.

For transistors, integrated circuits, and the like, a technology is adopted which is designed for an active circuit portion and suppresses the regulated capacity by increasing the thickness of an insulating layer in a field portion (technical trend from the viewpoint of patents, 1975, Japan Patent Office). .

[0007]

In order to control the emission current of the field emission cold cathode in FIG.
A method of modulating the voltage between the gate electrode 103 and the gate electrode 103 is generally considered. Since the distance between the substrate 101 and the gate electrode 103 is as narrow as about 1 μm, the modulation frequency or the rise time of the modulation pulse is limited by the capacitance between the emitter 102 and the gate electrode 103. The capacitance between the cathode emitter 102 and the gate electrode 103 shown in FIG. 5 is proportional to the area of the gate electrode 103, the wiring 106, and the bonding pad 107, and is inversely proportional to the thickness of the insulating layer 104. The area of the wiring 106, the bonding pad 107, and the area of the periphery of the gate electrode 103 may be 2 to 10 times or more the area of the electron emitting section. on the other hand,
The thickness of the insulating layer 104 is determined by the gate opening system of the gate electrode 103, the emission characteristics, the manufacturing conditions of the emitter, and the like, and cannot be made unnecessarily thick. Therefore, the capacitance between the emitter 102 and the gate electrode 103 is greatly increased. Can not be reduced. In the case of the field emission cold cathode, a high voltage of about 100 V is applied to an insulating layer having a thickness of 1 μm or less.
There is a possibility that a dielectric breakdown may occur due to a defect in the insulating layer. Further, discharge may occur along the side surface of the insulating layer in the peripheral portion of the gate electrode, the wiring, and the bonding pad.

Further, when the capacitance is reduced by increasing the thickness of the insulating layer in the bonding pad and the wiring portion, if the effect of increasing the difference in thickness is to be increased, a step is formed on the electrode on the insulating layer. This may cause disconnection of the electrode.

[0009]

According to the present invention, at least one of a peripheral portion of a gate electrode, a bonding pad for supplying a voltage to the gate electrode, and a wiring between the bonding pad and the gate electrode is provided. The thickness of the lower insulating layer is made larger than the thickness of the insulating layer in the electron emission region.

Further, the dimensions of the outer frame of the insulating layer are made larger than those of the gate electrode, the wiring, and the outer frame of the bonding pad.

Further, this thick insulating layer is formed of low melting point glass such as phosphorus silicate glass (PSG), boron silicate glass, boron phosphorus silicate glass, or manufactured by using the LOCOS technique.

[0012]

As a result, the insulation between the emitter and the gate can be sufficiently maintained, and the capacitance between the emitter and the gate electrode can be sufficiently reduced. For this reason, the modulation frequency of the electron beam can be made sufficiently high, and the addition of a driver amplifier for applying a high-frequency signal or a pulse signal between the emitter and the gate can be reduced. further,
The probability of dielectric breakdown between the gate and the emitter due to defects in the insulating layer is reduced, and the possibility of discharge occurring along the side of the insulating layer at the periphery of the gate electrode, wiring, and bonding pad is reduced. Operation can be expected.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a structural view of a field emission cold cathode according to a first embodiment of the present invention, in which (a) is a partially enlarged sectional view of a main part of the cathode, and (b) is a plan view. is there. In FIG. 1, a conical emitter 2 for emitting electrons is formed on a silicon substrate 1, and the substrate 1 and the emitter 2 are electrically connected. The wiring 6 and the bonding pad 7 are formed right above the first insulating layer 4 by patterning the same metal layer as the gate electrode 3. The gate electrode 3, the wiring 6, and the bonding pad 7 are electrically connected to each other. Although not shown in FIG. 1, a voltage is externally applied through a wire connected to the bonding pad 7.

The inside of the dashed line is an electron emission region 13 in which a plurality of emitters 2 are formed. A second insulating layer 5 is further deposited on the first insulating layer 4 in the peripheral portion of the gate electrode 3, that is, the portion outside the broken line, the wiring 6, and the bonding pad 7 where the emitter 2 is not formed. I have. In addition,
The emitter 2 is made of a heat-resistant metal such as tungsten or molybdenum, the gate electrode 3 is made of a metal such as tungsten, and the first insulating layer 4 is made of, for example, a thermal oxide film of silicon. For the second insulating layer 5, a silicon nitride film or a low-melting glass such as phosphorus silicate glass, boron silicate glass, or boron silicate glass is used. When a low-melting glass film is used for the second insulating layer 5, a temperature treatment is performed after the low-melting glass film is formed. Of the gate electrode 3 even if the second insulating layer 5 is relatively thick.
Can be prevented from breaking at the step.

The diameter of the opening of the gate electrode 3 is about 1 μm, the height of the emitter 2 is about 1 μm, the thickness of the first insulating layer 4 is about 0.8 μm, and the thickness of the second insulating layer is about 1 to 2 μm. The thickness of the gate electrode is about 0.2 μm. The outer frame of the gate electrode 3, the wiring 6, and the bonding pad 7 is inside by about 10 μm from the outer frame of the second insulating layer 5. This is because the insulation length between the gate electrode 3, the wiring 6, the bonding pad 7, and the substrate 1 is increased, the insulation resistance between them is kept high, and the insulation voltage is kept high.

In order to operate this cathode, the gate electrode 3 is applied to the gate electrode 3 based on the potential of the substrate 1, that is, the emitter 2.
A voltage of 0 to about 100 V is applied.

In this embodiment, since the insulating layer is thick except for the electron emission region 13, the capacitance between the gate electrode 3 and the emitter 2 can be greatly reduced, and a high voltage of about 100 V is applied. Since the possibility of dielectric breakdown on the bulk of the insulating layer and the surface of the insulating layer, which is particularly important in the field emission cold cathode, can be reduced, high reliability can be secured.

Further, the gate electrode 3 around the electron emission region 13 is slightly opened due to the influence of the thickness of the second insulating layer 5, and an electrolysis for converging the electron beam near the gate electrode 3 is formed. . Although a similar electric field can be generated by an external electrode, the cold cathode shown in FIG. 1 can form an electric field near the cathode and with high accuracy, so that an electron beam of good quality and small ripple can be formed.

FIG. 2 is a structural view of a field emission cold cathode according to a second embodiment of the present invention, in which (a) is a cross-sectional view in which a main part of the cathode is partially enlarged, and (b) is a plane view of the entire cathode. The figure is shown. 2, the same reference numerals as those in FIG. 1 denote the same components as those in FIG. The electron emission portion where the emitter 2 is formed, that is, the insulating layer inside the broken line in FIG. 2A has the third insulating layer 9, the gate electrode 3 is formed on the fourth insulating layer 10, and the fifth insulating layer On the part 11, the peripheral part of the gate electrode 3, the wiring 6, and the bonding pad 7 are formed.

The thickness of the third insulating layer 9 is 0.1 μm or less, the thickness of the fifth insulating layer is about 2 to 5 μm, and the dimensions of the other parts and the applied voltage are as shown in FIG. Is the same as

FIG. 3 shows a manufacturing process of the cathode according to the second embodiment shown in FIG. A thermal oxide film as a third insulating layer 9 is formed on the silicon substrate 1, and then a fourth insulating layer 1 is formed thereon.
A zero silicon nitride film is deposited. Next, the insulating layer other than the electron emission region is removed by lithography, and FIG.
(A) is obtained. Next, the entire surface of the substrate 1 is thermally oxidized using the insulating layer of FIG. 3A as a mask, and a thick thermal oxide layer, that is, a fifth insulating layer 11 is formed except for the insulating layer used as a mask. 3 (b) is obtained. The method of forming the thick thermal oxide layer 11 is based on LOCO used for element isolation of a semiconductor integrated circuit.
This is called an S process, and a thick insulating layer extending vertically can be formed at the interface between the third insulating layer 9 and the silicon substrate 1. Next, a metal layer to be the gate electrode 3, the wiring 6, and the bonding pad 7 is deposited, a pattern of the gate electrode 3 is formed by lithography and etching, and the gate electrode 3, the fourth insulating layer 9, the third insulating layer 9 are formed. A gate opening 12 is formed in the layer 10 (FIG. 3C). Thereafter, the emitter 2 is formed by a known method by vapor deposition to obtain FIG.

FIG. 4 is a structural view of a field emission cold cathode according to a third embodiment of the present invention, in which (a) is a partially enlarged sectional view of a main part of the cathode, and (b) is a plan view of the entire cathode. The figure is shown. In FIG. 4, the same reference numerals as those in FIGS.
2 shows components that are exactly the same as those in FIG. FIG. 4 and FIG.
The difference between this is that the fourth insulating layer 10 which is a silicon nitride film and the third insulating layer 9 which is a silicon oxide film thereunder are LOCOS
The entire surface of the substrate 1 is covered, including the fifth insulating layer 11 having a structure, and the fifth insulating layer 11 is limited to the wiring 6, the bonding pad 7, and the peripheral portion of the electron emitting portion surrounded by a broken line. That is. Since the silicon oxide film is unlikely to cause gas adsorption and permeation, the release of gas in a vacuum can be suppressed by covering the silicon oxide layer with the silicon nitride film.

In order to manufacture the structure shown in FIG. 4, a fifth insulating layer 11 is formed as shown in FIG.
The insulating layer 9 and the fourth insulating layer 10 are removed, and the third insulating layer 9 and the fourth insulating layer 10 are newly laminated on the entire surface. The thickness of these two layers is about 1 to achieve a predetermined electron emission characteristic.
μm.

Similarly, the same effect can be obtained by forming a film of silicon nitride and silicon oxide so as to cover the second insulating layer of FIG.

The second embodiment shown in FIGS. 2 and 3 and FIG.
In the third embodiment shown in FIG.
It becomes a thick insulating layer that extends over the interface between the insulating layer 9 and the silicon substrate 1. Therefore, the capacitance between the emitter 2 and the gate electrode 3 can be significantly reduced, and
Since the step between the surfaces of the fifth insulating layer 11 and the fourth insulating layer 10 is smaller than the thickness of the fifth insulating layer, the possibility that the gate electrode is disconnected can be reduced. Thus, LOCO
By introducing S technology into the manufacturing process of this cold cathode,
The electrostatic capacitance between the emitter 2 and the gate electrode 3 can be greatly reduced instead of the effect of the element isolation inherent in the LOCOS technology disclosed in Japanese Patent Application Laid-Open No. 3-129631, which is employed in an integrated circuit. It is possible to realize a completely new important effect that can be expected.

In the first to third embodiments, the effect of reducing the capacitance can also be obtained by increasing the thickness of at least one of the peripheral portion of the gate electrode 3, the wiring 6, and the bonding pad 7 in whole or in part. Obtainable.

Further, the present invention can be applied to a cold cathode having an emitter 2 formed by depositing a metal material or etching a substrate 1.

In the first embodiment, conductive silicon is used for the substrate 1. However, the present invention is not limited to this, and a metal thin film may be formed on another conductive material or an insulating material such as glass or ceramic. It can be constructed in exactly the same way using the deposited one.

[0030]

As described above, the cold cathode of the present invention has an effect that the capacitance between the gate and the emitter can be sufficiently reduced. Further, as an effect that is particularly important for the field emission cathode, it is possible to maintain a good insulation state between the gate and the emitter to which a voltage of about 100 V is applied, and to form an electron beam from the cold cathode with high accuracy. Further, by using the structure of the insulating layer described in the present invention, even if a relatively thick insulating layer is stacked, occurrence of disconnection of a gate electrode formed thereon can be prevented.

As a result, the emission current can be switched at a high speed, or the emission current can be modulated at another higher frequency. In addition, high reliability of the cathode can be maintained for a long time, and a high-quality electron beam with little ripple can be formed. Further, a cold cathode with less gas emission can be realized.

[Brief description of the drawings]

FIG. 1 is a structural view of a field emission cold cathode according to a first embodiment of the present invention, in which (a) is a partially enlarged cross-sectional view and (b) is a plan view.

FIGS. 2A and 2B are structural views of a field emission cold cathode according to a second embodiment of the present invention, in which FIG. 2A is a partially enlarged cross-sectional view, and FIG.

FIG. 3 is a schematic view of a manufacturing process of a field emission cold cathode according to a second embodiment of the present invention.

4A and 4B are structural views of a field emission cold cathode according to a second embodiment of the present invention, in which FIG. 4A is a partially enlarged cross-sectional view, and FIG. 4B is a plan view.

5A is a cross-sectional view of a structure of a conventional cold cathode; FIG.
(B) is a plan view.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 101 Substrate 2, 102 Emitter 3, 103 Gate electrode 4 1st insulating layer 5 2nd insulating layer 6, 106 Wiring 7, 107 Bonding pad 8, 108 Cathode 10 3rd insulating layer 11 5th insulating layer 12 Gate opening 13 Electron emission region 104 insulating layer 109 LOCOS structure

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-208241 (JP, A) JP-A-2-223927 (JP, A) JP-A-3-129631 (JP, A)

Claims (5)

(57) [Claims] 1. A substrate having conductivity or a substrate in which a conductive layer is stacked on an insulating material;
An electron emitting electrode sharpened tip, an insulating layer except for the electron emission electrode and its vicinity formed on the substrate, laminated on the front Symbol <br/> insulating layer surrounds the electron emission electrode It is composed of a control electrode having an opening and a connection part for applying a voltage from the outside, and is thin near the electron emission electrode,
Other than that, a thick insulating layer is provided , and a part of the insulating layer is provided .
Or a field emission cold cathode characterized by using low melting point glass for all . 2. The field emission cold cathode according to claim 1, wherein an outer frame of said control electrode is formed inside an outer frame of said low melting point glass. 3. The low melting point glass has a continuous peripheral portion.
2. The field emission cold cathode according to claim 1 , wherein the temperature is changed . 4. The method according to claim 1, wherein the substrate is silicon, and
The insulating layer formed in the above is a thermal oxide film of the silicon,
2. A field emission cold cathode according to claim 1 , wherein said low melting point glass is formed on said thermal oxide film . 5. The substrate according to claim 1, wherein said substrate is a silicon substrate.
The substrate is thermally oxidized as an insulating film formed on the
A thermal oxide film of a capacitor is formed, and the low insulating layer is formed as the thick insulating layer.
After forming the melting point glass on the thermal oxide film, a temperature treatment is performed.
The peripheral portion of the low melting point glass film is dripped
2. The method according to claim 1, wherein the temperature is changed continuously .