JP2643771B2 - Semiconductor embedded structure and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor embedded structure,
In particular, the present invention relates to a quantum dot or quantum box structure used as a material for an active layer of a semiconductor laser or the like with high efficiency, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Quantum wires and quantum boxes, which are expected to dramatically improve the characteristics of semiconductor lasers and the like, are being actively researched. One example is Applied Physics Letters by Fukui et al.
ics Letters), Vol. 58, 2018-2020 (1991). In this paper,
Fukui et al., Using selective growth of metal organic chemical vapor deposition technology (MO-CVD technology), GaAs composed of sub-μm tetrahedrons.
/ AlGaAs buried structure is formed, and cross-sectional evaluation and optical characteristics of the buried structure are studied.

[0003]

In the selective growth by the conventional MO-CVD technique, a triangular opening is formed after an SiO ₂ film is formed on a semiconductor substrate. Thereafter, an AlGaAs / GaAs / AlGaAs structure is formed only in the opening by using a selective growth technique. The interface between the SiO ₂ film and GaAs has many non-emission centers and impairs the laser characteristics of a semiconductor laser. Therefore, in order to actually produce a prototype semiconductor laser,
After removing such SiO ₂ mask, GaAs
It is necessary to regrow AlGaAs which provides a good interface.

Another problem is that selective growth of AlGaAs having a high Al composition is difficult by the MO-CVD technique. When particularly strong carrier confinement is required, it is necessary to grow AlGaAs having a high Al composition as a confinement layer. However, Al having a high Al composition
There is a problem that GaAs adheres to SiO _{2 serving as} a mask for selective growth, and polycrystalline AlGaAs is formed.

Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor buried structure capable of forming a good buried structure in a single growth and using an AlGaAs confinement layer having a high Al composition, and a method of manufacturing the same. The present invention provides a semiconductor buried structure formed by the method.

[0006]

According to a first aspect of the present invention, there is provided a semiconductor substrate having a main surface of a (1-1-1-1) plane in which a group V element of a group III-V semiconductor is a surface atom. And a regular triangular recess formed on the semiconductor substrate,
A first confinement layer formed on the semiconductor substrate including the recess, an active layer formed on the first confinement layer, and a second confinement layer formed on the active layer; Wherein the forbidden band width of the active layer is smaller than any of the first confinement layer and the second confinement layer, and each side of the equilateral triangle has three cleavage planes (1-10), (10).
-1) and (01-1), wherein the active layer is discontinuous on the side surface of the concave portion.

In the first method of manufacturing a buried semiconductor structure according to the present invention, a positive electrode is formed on a substrate whose main surface is a (1-1-1-1) plane in which a group V element of a III-V semiconductor becomes a surface atom. Forming a triangular recess, crystal growing a first confinement layer on the semiconductor substrate including the recess, crystal growing an active layer on the first confinement layer, and forming the active layer on the first confinement layer. Crystal growth of a second confinement layer on the active layer, wherein the forbidden band width of the active layer is smaller than either the first confinement layer or the second confinement layer, and each side of the equilateral triangle Are three cleavage planes (1-10), (10-
1) parallel to (01-1), wherein the active layer is discontinuous on the side surface of the concave portion.

In the second semiconductor buried structure of the present invention,
A group V element of a III-V semiconductor becomes a surface atom (-1-
1-1) A semiconductor substrate having a plane as a main surface, a regular triangular concave portion formed on the semiconductor substrate, a first confinement layer formed on the semiconductor substrate including the concave portion, Formed on a confinement layer of at least two or more II
An active layer containing Group I elements A and B; and a second confinement layer formed on the active layer, wherein the forbidden band width of the active layer is different from the first confinement layer and the second confinement layer. Smaller than any of the layers, each side of the equilateral triangle being perpendicular to the three cleavage planes (1-10), (10-1), (01-1) and formed on the sides of the recess. It is characterized in that the active layer hardly contains any one of the constituent elements A and B.

According to the second method of manufacturing a buried semiconductor structure of the present invention, a positive electrode is formed on a substrate whose main surface is a (1-1-1-1) plane in which a group V element of a III-V semiconductor becomes a surface atom. Forming a triangular concave portion, crystal growing a first confinement layer on the semiconductor substrate including the concave portion, and forming at least two or more group III elements A and B on the first confinement layer. And a crystal growth of a second confinement layer on the active layer, wherein the forbidden band width of the active layer is equal to the first confinement layer and the second confinement layer.
, Each side of the equilateral triangle has three cleavage planes (1-10), (10-1),
It is perpendicular to (01-1) and is characterized in that the active layer formed on the side surface of the concave portion hardly contains any one of the constituent elements A and B.

In the third semiconductor buried structure of the present invention,
A group V element of a III-V semiconductor becomes a surface atom (-1-
1-1) a semiconductor substrate having a main surface as a main surface, a regular triangular protrusion formed on the semiconductor substrate, a first confinement layer formed on the semiconductor substrate including the protrusion, An active layer containing at least two or more group III elements A and B formed on the first confinement layer; and a second confinement layer formed on the active layer. The band width is smaller than either of the first confinement layer and the second confinement layer, and each side of the equilateral triangle has three cleavage planes (1-10), (10-1), and (01-1). ), Wherein the active layer formed on the side surface of the protrusion hardly contains any one of the constituent elements A and B.

According to the third method of manufacturing a buried semiconductor structure of the present invention, a positive electrode is formed on a substrate whose main surface is a (1-1-1-1) plane in which a group V element of a III-V semiconductor becomes a surface atom. Forming a triangular protrusion, crystal growing a first confinement layer on the semiconductor substrate including the protrusion, and forming at least two or more group III elements A, Crystal growth of an active layer containing B; and crystal growth of a second confinement layer on the active layer.
The forbidden band width of the active layer is smaller than either of the first confinement layer and the second confinement layer, and each side of the equilateral triangle has three cleavage planes (1-10), (10-1). ,
It is perpendicular to (01-1) and is characterized in that the active layer formed on the side surface of the protrusion hardly contains any one of the constituent elements A and B.

[0012]

First, the semiconductor buried structure of the present invention will be described. As an example, a case where a quantum box structure is formed using a GaAs / AlGaAs material will be described. In the semiconductor structure of the present invention, AlGaAs / AlGaAs is formed on a GaAs substrate on which fine triangular concave portions and protrusions are formed.
A GaAs / AlGaAs double hetero structure is formed.
At this time, by appropriately selecting the growth conditions and the crystal orientation of the triangular pattern, the structure is such that the GaAs active layer is formed to be stepped at the side surface of the concave portion or the side surface of the protrusion. Therefore, a buried structure in which the GaAs active layer is buried with the AlGaAs confinement layer is formed. In forming such a buried structure, it is not necessary to use a selection mask of SiO _{2 or} the like, so that a good buried structure can be obtained by one crystal growth. In addition, A having a high Al composition
Since an lGaAs confinement layer can be easily formed, strong carrier confinement can be easily obtained.

Next, a method of manufacturing a semiconductor buried structure according to the present invention will be described. The present inventor has studied by molecular beam epitaxy method (MBE method). As a result, a crystal plane of A plane such as (111) A plane and a crystal plane other than A plane (for example, (11)
1) In the growth on a non-planar substrate in which B-plane and (100) -plane are mixed, the growth rate of GaAs on A-plane becomes slow.
In particular, it was found that the growth rate of GaAs on the A-plane such as the (111) A-plane becomes zero when the GaAs is grown at 725 ° C. or more where re-evaporation of GaAs becomes remarkable. This is because
The difference in the surface migration of Ga atoms such as the (111) A plane and the (111) B plane is considered. That is, the surface migration distance is (111) compared to other surfaces.
Because the A-plane is long, some Ga atoms are moved from the (111) A plane to the (111) B bottom surface and GaAs is stacked, and some Ga atoms migrate on the (111) A plane. It is thought to be due to re-evaporation in between.

The method of manufacturing a semiconductor buried structure according to the present invention provides a method for forming a fine semiconductor buried structure such as a quantum box based on the experimental facts.
That is, in the present invention, the (111) B plane is selected as a semiconductor substrate, and a regular triangular concave portion and a projection having three sides perpendicular to three different cleavage planes of the semiconductor substrate are formed. At this time, by appropriately selecting the direction of the mask, a triangular concave portion or a triangular protrusion having a (111) A plane or a (1nn) A plane (n ≧ 2, n: an integer) on the side surface of the forward mesa can be obtained. Can be Next, an AlGaAs / GaAs / AlGaAs double heterostructure is formed by MBE. At this time, if MBE growth is performed at a growth temperature of 725 ° C. or more at which re-evaporation of GaAs becomes remarkable, the growth rate of GaAs on A-plane such as (111) A-plane becomes zero. For this reason, in the triangular concave portion, GaAs grows discontinuously at the bottom and the flat portion of the concave portion. In the triangular projection, GaAs grows at the top of the projection and at the flat portion. On the other hand, AlGaAs grows with a uniform thickness on the side surface so as to preserve the shape of the non-flat substrate. By utilizing such growth characteristics, GaAs / Al is formed at the top of the triangular protrusion or at the bottom of the triangular recess.
A GaAs buried structure is formed. Also, AlGaAs
In the growth of s, the higher the Al composition, the stronger the property of preserving the substrate shape of the non-planar substrate, so that it is suitable for forming a buried structure. This is because the surface migration distance of Al atoms is smaller than that of Ga atoms.
It is considered that the higher the composition, the stronger the tendency to preserve the irregularities. Therefore, a GaAs / AlGaAs buried structure can be easily formed using AlGaAs having a high Al composition. Further, according to the present invention, there is a feature that such a buried structure can be formed by a single crystal growth.

[0015]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIGS. 1A and 1B show a plan view and a sectional structure of a semiconductor buried structure according to a first embodiment of the present invention. FIG. 1B is a sectional view taken along the line AA ′ of FIG.

In this embodiment, an active layer made of GaAs is formed on a triangular concave portion. In the figure, 1 is GaAs
s substrate 2 is a first confinement layer (Al _x Ga _{1 -x} As,
0.2 ≦ x ≦ 1, typically 0.8 ≦ x ≦ 1), 3 is an active layer (GaAs), 4 is a second confinement layer (Al composition is in the same range as the first confinement layer), 5 is (111) B bottom,
6 and 7 are (111) A side surfaces, and 8 is a (011) cleavage surface (A
-A 'section), 9 is a buried active layer, 10 is a triangular recess, d is the depth of the triangular recess 10, θ ₁ is the angle between the (111) A side surface 6 and the (111) B bottom surface 5, and θ ₂ is (11
1) The intersection line between the A side surface 7 and the (011) cleavage plane 8 is (11)
1) An angle formed with the B bottom surface 5. In this case, the length of one side of the buried active layer 9 W _B, between the upper side length W _M of the triangular recesses 10, the following relationship.

[0018] The _{W B = W M -C · d} (1) C = 2 · √3 / tanθ 1 (2) Actual C and theta ₁ values shown in Table 1 as an example.

[0019]

[Table 1]

[0020] of W _B small width, such as quantum box, in the case of forming a buried active layer 9 is advantageous for an amount corresponding width of the C · d becomes smaller. For example, if the side surface is (111) A
In terms, W _M is 1 [mu] m, d is the W _B becomes 0.63μm in the case of 0.3 [mu] m. Also, the side surface is the (111) A surface,
W _M is 100nm, in the case d is 50nm is, W _B is 3
9 nm. The thickness of the first confinement layer 2 can be arbitrarily determined as long as the cross-sectional shape of the triangular recess 10 can be preserved. However, the formation of the first confinement layer 2 which is extremely thicker than the depth d of the triangular concave portion 10 is not preferable because the cross-sectional shape of the triangular concave portion 10 may be lost. Further, regarding the thickness of the active layer 3, (111)
It can be arbitrarily determined within a range where the A side faces 6 and 7 grow stepwise. As an upper limit thickness, the depth d of the triangular concave portion 10 is a guide. With the active layer 3 thinner than d, there are few technical problems of growth. For example, W _M aimed at, such as the quantum box
Is 100 nm and d is 50 nm, the active layer 3
Is considered to be preferable, and the thickness is preferably 20 nm or less. The thickness of the second confinement layer 4 can be formed at any thickness, but it is preferable that the second confinement layer 4 is grown sufficiently thick from the viewpoint of flattening the surface. The triangular recess 1 described above
Since the semiconductor structure formed on the substrate 0 does not contain SiO ₂ or the like, it has a good interface for passing through the semiconductor and can realize a GaAs / AlGaAs buried structure having excellent emission characteristics.

Next, a method of manufacturing the semiconductor buried structure according to the first embodiment will be described with reference to FIG.

First, as shown in FIG.
A GaAs substrate 1 having a B surface on a main surface is prepared. This G
The plane orientation of the aAs substrate 1 is not necessarily the (111) B plane JU
It need not be ST. It is known that a slightly (0.5 to 5 °) off-angle from the (111) B plane results in better growth surface morphology.

Next, as shown in FIG.
An etching mask 21 having a triangular opening 22 is formed on the As substrate 1 by using a usual photolithography technique or an electron beam exposure technique. As a material of the etching mask 21, in addition to a resist material such as a photoresist and a resist for electron beam exposure, SiO ₂ , S
A material such as iN can be used. Where SiO
_Since materials such as ₂ and SiN are formed by a thermal CVD technique or a plasma CVD technique, they have better adhesion to the GaAs substrate 1 than a resist material. Therefore, the side Etsu quenching is small, easily large side angle theta ₁ is obtained. on the other hand,
When a small θ ₁ is required, a resist material is suitable as a mask. In this case, instead of the side surface of (111) A, a higher order A surface (122) A surface or (1)
33) A-side and the like appear. As described above, as for the crystal planes on the side surfaces of the triangular concave portions and the triangular protrusions, higher-order planes such as the (122) A plane and the (133) A plane can be used in addition to the (111) A plane. When using a higher-order plane, because the value of the coefficient C shown in Table 1 is increased, there is an advantage to be easily obtained a small W _B with a large W _M. However, MB
From the characteristics on E growth, the growth rate on this higher surface is (1
11) There is also a problem that the speed is slightly faster than the surface A.

Also, when forming the mask pattern, it is necessary to pay attention so that the side surfaces of the grooves and the projections have a regular mesa shape of the (111) A plane. This situation will be described with reference to FIG. Now, the (1-1-1-1) plane 31 is defined as the (111) B plane.
Consider the case where In this case, (-1-1-1)
The cleavage planes perpendicular to the B plane 31 are (1-10), (01-
1) and (10-1). One of these cleavage planes
When a mesa stripe perpendicular to the (1-10) plane 32 is formed by a wet chemical etching method using bromomethanol or the like as an etching solution, an asymmetric cross-sectional shape as shown in FIG. Can be In the side surface in this case, the side surface on which the forward mesa shape was obtained is (−1-11) A
Surface 33. A triangular etching mask is formed with this surface facing the side. In terms of crystal index,
A mask may be formed in the direction of the crystal index shown in FIGS. When forming a triangular projection, FIG.
As shown in (b), the direction index of the crystal is [1-10] →
[01-1] → 3 defined by clockwise from [1-01]
An equilateral triangle mask having sides is required. On the other hand, when forming a triangular concave portion, as shown in FIG.
Direction index is [1-10] → [-101] → [01-1]
A mask having an opening of an equilateral triangle whose three sides are defined in the counterclockwise direction is required.

Next, as shown in FIG. 2C, an etching mask 21 is formed on the GaAs substrate 1 and is etched using bromomethanol or a phosphoric acid-based etching solution to form a (111) A A triangular recess 10 having side surfaces 6 and 7 on the side surface can be formed. In this case, another etching method such as a dry etching method can be used if a desired crystal plane ((111) A plane to (155) A plane) appears.

Next, as shown in FIG. 2D, the etching mask 21 is removed.

Next, as shown in FIG. 2E, crystals are grown by MBE. In crystal growth, the crystal can be grown by an MBE apparatus using a normal solid source material. AlGaAs
/ GaAs material, metal A
1, a metal Ga, and a metal As are loaded in a PBN (pyrotic boron nitride) crucible, and a source material is evaporated in an ultra-high vacuum by heating with a heater to grow a crystal. In addition to such a solid source, a hydride gas such as arsine (ASH ₃ ) or G
As a material of a or Al, trimethylgallium (Ga (C
H ₃ ) ₃ ) or trimethylaluminum (Al (CH
₃ ) The organic metal of ₃ ) can be used. When a gas or the like is used as a source in the MBE method as described above, it is generally called a gas source MBE method, a chemical beam epitaxy method (CBE method), or the like.

After introducing the GaAs substrate 1 into the MBE growth apparatus, a normal degassing step is performed to remove the natural GaAs oxide film. Thereafter, at a temperature at which re-evaporation of GaAs becomes remarkable (725 ° C. in the MBE apparatus of the inventor), the first
Confinement layer 2 (AlGaAs), active layer 3 (GaAs
s), a double heterostructure composed of the second confinement layer 4 (AlGaAs) is grown. In this case, AlGaAs
GaAs is grown so as to preserve the irregularities of the GaAs substrate 1 as it is.
, The growth rate is extremely slow, and becomes zero at 725 ° C. or higher. For this reason, the active layer 3 grows discontinuously on the (111) A side surfaces 6 and 7, and the buried active layer 9 is formed. Since the buried active layer 9 is entirely surrounded by AlGaAs having a larger bandgap than GaAs, a good buried structure is realized. In addition, since there is no SiO ₂ or the like in the vicinity of the buried active layer 9 and all of the buried active layers 9 are interfaces through which semiconductors pass, a buried structure with extremely small non-radiative recombination is obtained. Further, as for AlGaAs to be a material of the confinement layer, it is preferable that the Al composition is high because the tendency of preserving the irregularities becomes stronger. In particular, aiming at the quantum box
When growing on the following fine unevenness, it is suitable to use AlAs or the like. After the MBE growth, if it is taken out of the growth apparatus, the fabrication process is completed.

FIGS. 4A and 4B show a plan view and a sectional structure of a semiconductor buried structure according to a second embodiment of the present invention. FIG. 4B is a cross-sectional view taken along line BB ′ of FIG.

In this embodiment, an active layer made of GaAs is formed on the triangular protrusion. In the figure, 41 is Ga
As substrate, 42 is a first confinement layer (Al _x Ga _1-x A
s, 0.2 ≦ x ≦ 1, typically 0.8 ≦ x ≦ 1), 4
3 is an active layer (GaAs), 44 is a second confinement layer (Al)
The composition is the same as that of the first confinement layer 42), and 45 is (111)
B top, 46 and 47 are (111) A side surfaces, 48 is (01)
1) Cleavage plane (BB 'section), 49 is a buried active layer, 5
0 is a triangular protrusion. d is the height of the triangular protrusion, θ ₁ is the angle between the (111) A side surface 46 and the (111) B top 45, and θ ₂ is the (111) A side surface 47 and the (011) cleavage plane 4.
The intersection with 8 is the angle formed by the (111) B top 45.

[0031] be placed in the case of such a triangular protrusion 50, as described in the first embodiment, the width W _M and (111) of the base of the triangle protrusion 50 length of one side W _B of B top The relational expressions of the expressions (1) and (2) hold between. For example, the side is (111) A plane, W _M is 1 [mu] m, d is the W _B becomes 0.63μm in the case of 0.3 [mu] m. Further, in side surfaces (111) A plane, if W _M is 100 nm, d is 50nm is, W _B is 39 nm. First confinement layer 42
Can be arbitrarily determined as long as the cross-sectional shape of the triangular protrusion 50 can be preserved. However, compared to the height d of the triangular protrusion 50, the first confinement layer 42 which is very thick
Is not preferred because the cross-sectional shape of the triangular protrusion 50 may be lost. Further, the thickness of the active layer 43 can be arbitrarily determined within a range where the active layer 43 grows stepwise at the (111) A side surfaces 46 and 47. As the upper limit thickness, the height d of the triangular protrusion 50 is a guide. With the active layer 43 thinner than d, there are few technical problems of growth.
For example, aiming at a quantum box or the like, W _M is 100 nm and d is 5
When the thickness is 0 nm, the thickness of the active layer 43 is also reduced,
It is considered that 20 nm or less is preferable. The thickness of the second confinement layer 44 can be formed at an arbitrary thickness, but it is preferable that the second confinement layer 44 is grown sufficiently thick from the viewpoint of flattening the surface. In the semiconductor structure formed on the triangular protrusion 50 described above, since there is no SiO ₂ or the like, a GaAs / AlGaAs buried structure having a good interface for passing through the semiconductor and having excellent emission characteristics can be realized. . As for the manufacturing method, the orientation of the mask is shown in FIG.
Forming as shown in (b) is the first of the triangular recesses.
Is different from the embodiment. Other points are almost the same as those of the first embodiment of the triangular concave portion.

FIGS. 5A and 5B show a plan view and a sectional structure of a semiconductor buried structure according to a third embodiment of the present invention. FIG. 5B is a cross-sectional view taken along the line CC ′ of FIG. 5A.

In this embodiment, InGaAs is formed on the triangular concave portion.
This is a case where an active layer made of s is formed. In the figure, 51a
_{Represents an} active layer (In _xa Ga _1-xa As, 0.05 <xa ≦ 0.
35), 51b an active layer _{(In xb Ga 1-xb As} , xb~
0) and 52 are buried active layers (In _xc Ga _{1 -xc} As, x
a <xc). Structurally, except for the active layer, the first
This is almost the same as the embodiment. In this case,
An InGaAs material is used as a material of the active layer.
Therefore, the active layer is continuously grown on the side surfaces 6 and 7 of the triangular groove 10. To explain MBE growth, In
Is grown at 575 ° C. or higher where re-evaporation of
Since atoms do not attach to the (111) A side surfaces 6,7 at all, almost no GaAs is formed on the (111) A side surfaces 6,7.
Is formed. On the other hand, (111)
In the B bottom part 5, the I from the (111) A side faces 6 and 7
Due to the inflow of n atoms, a buried active layer 52 having a higher In composition than the active layer 51a in the flat portion can be obtained. Therefore, the buried active layer 52 made of In _xc Ga _1-xc As
Is embedded in the active layer 51b made of GaAs in the lateral direction.

FIGS. 6A and 6B show a plan view and a sectional structure of a semiconductor buried structure according to a fourth embodiment of the present invention. FIG. 6B is a cross-sectional view taken along the line DD ′ of FIG.

In this embodiment, InGaAs is formed on a triangular projection.
This is a case where an active layer made of s is formed. In the figure, 61a
_{Represents an} active layer (In _xa Ga _1-xa As, 0.05 <xa ≦ 0.
35), 61b an active layer _{(In xb Ga 1-xb As} , xb~
0) and 62 are buried active layers (In _xc Ga _{1 -xc} As, x
a <xc). Structurally, except for the active layer, the second
This is almost the same as the embodiment. In this case,
As in the third embodiment, the material of the active layer is InGaAs.
s material is used. Therefore, the active layer is continuously grown on the side surfaces 46 and 47 of the triangular protrusion 50. MBE
In the growth, as in the third embodiment, when grown at 575 ° C. or more where re-evaporation of In is remarkable, In atoms become (11
1) Since it does not adhere to the A side surfaces 46 and 47 at all, (11)
1) On the A side surfaces 46 and 47, an active layer 61b almost made of GaAs is formed. On the other hand, at the (111) B top 45, the I
Due to the inflow of n atoms, a buried active layer 62 having a higher In composition than the active layer 61a in the flat portion can be obtained. Therefore, the buried active layer 62 made of In _xc Ga _1-xc As
Is buried in the active layer 61b made of GaAs in the lateral direction.

In the embodiment described above, AlGaAs / G
Although the structure is formed using the aAs material and the InGaAs / AlGaAs material, it is considered that these semiconductor embedded structures can be applied to other materials, for example, InGaAs / InAlAs.

In the above embodiment, all the semiconductor buried structures are grown undoped.
It is easily possible to form a pn junction by performing type or n-type doping.

Further, in the above embodiment, the triangular concave portions and the protrusions are formed on the GaAs substrate.
GaAs having an aAs / AlGaAs growth layer formed on its surface
A triangular concave portion or triangular protrusion may be formed on the s substrate and used.

In the embodiment described above, 725 ° C. is set as the temperature at which re-evaporation of Ga is remarkable, and 575 ° C. is set as the temperature at which re-evaporation of In is remarkable. Temperature. Therefore, it is necessary to grow not only at this temperature value but also at a temperature at which re-evaporation of Ga or In becomes remarkable.

[0040]

According to the present invention, SiO ₂ in a single growth
It is possible to form a good embedded structure that does not contain
In addition, a semiconductor buried structure that can use an AlGaAs confinement layer having a high Al composition can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor buried structure according to a first embodiment of the present invention, and a sectional view thereof.

FIG. 2 is a view showing a manufacturing process of the semiconductor buried structure according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a crystal orientation of a mask pattern according to an example of the present invention.

FIG. 4 is a plan view and a sectional view of a semiconductor buried structure according to a second embodiment of the present invention.

FIG. 5 is a plan view of a semiconductor buried structure according to a third embodiment of the present invention, and a sectional view thereof.

FIG. 6 is a plan view of a semiconductor buried structure according to a fourth embodiment of the present invention, and a sectional view thereof.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 GaAs substrate 2 first confinement layer 3 active layer 4 second confinement layer 5 (111) B bottom surface 6 (111) A side surface 7 (111) A side surface 8 (011) cleavage plane 9 buried active layer 10 triangular recess 21 etching mask Reference Signs List 22 Triangular opening 31 (1-1-1) B surface 32 (1-10) surface 33 (1-1-11) A surface 35 Triangular projection forming mask 36 Triangular concave forming mask 41 GaAs substrate 42 First confinement Layer 43 Active layer 44 Second confinement layer 45 (111) B top 46 (111) A side surface 47 (111) A side surface 48 (011) cleavage surface 49 Embedded active layer 50 Triangular recess 51a Active layer 51b Active layer 52 Embedded active layer 61a active layer 61b active layer 62 embedded active layer

 ────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-6-140328 (JP, A) JP-A-5-121320 (JP, A) JP-A-4-30578 (JP, A) APPL. PHYS. LETT. 58 ~ 18! (1991) p. 2018-2020 JPN. J. APPL. PHYS. P ART2 32-8A! (1993) P.A. L 1034-L1036

Claims (11)

(57) [Claims] 1. A semiconductor substrate having, as a main surface, a (1-1-1-1) plane in which a group V element of a group III-V semiconductor is a surface atom, and a regular triangular recess formed on the semiconductor substrate. A first confinement layer formed on the semiconductor substrate including the recess, an active layer formed on the first confinement layer, a second confinement layer formed on the active layer, Wherein the forbidden band width of the active layer is smaller than either of the first confinement layer and the second confinement layer, and each side of the equilateral triangle has three cleavage planes (1-10), (10). -1),
A semiconductor burying structure perpendicular to (01-1), wherein the active layer is discontinuous on a side surface of the concave portion. 2. A step of forming a regular triangular concave portion on a substrate having a (1-1-1-1) plane whose main surface is a group V element of a III-V semiconductor as a surface atom; Crystal growing a first confinement layer on the semiconductor substrate, crystal growing an active layer on the first confinement layer, and crystal growing a second confinement layer on the active layer. Wherein the forbidden band width of the active layer is smaller than either of the first confinement layer and the second confinement layer, and each side of the equilateral triangle has three cleavage planes (1-10); (1
0-1), perpendicular to (01-1), wherein the active layer is discontinuous on a side surface of the concave portion. 3. A semiconductor substrate having, as a main surface, a (1-1-1-1) plane in which a group V element of a group III-V semiconductor is a surface atom, and a regular triangular recess formed on the semiconductor substrate. A first confinement layer formed on the semiconductor substrate including the concave portion, an active layer formed on the first confinement layer and containing at least two or more Group III elements A and B, A second confinement layer formed on a layer, wherein the forbidden band width of the active layer is smaller than either of the first confinement layer and the second confinement layer, and each side of the equilateral triangle Are three cleavage planes (1-10), (10-1),
A semiconductor buried structure perpendicular to (01-1), wherein the active layer formed on the side surface of the concave portion hardly contains any one of the constituent elements A and B. 4. A step of forming a regular triangular concave portion on a substrate having a (1-1-1-1) plane whose main surface is a group V element of a III-V semiconductor, Crystal-growing a first confinement layer on the semiconductor substrate that includes: a step of crystal-growing an active layer containing at least two or more group III elements A and B on the first confinement layer; Crystal-growing a second confinement layer over the layer, wherein the forbidden band width of the active layer is smaller than either the first confinement layer or the second confinement layer; Has three cleavage planes (11-0), (10-1),
A method of manufacturing a semiconductor buried structure, which is perpendicular to (01-1) and wherein the active layer formed on the side surface of the concave portion hardly contains any one of the constituent elements A and B. . 5. A semiconductor substrate having, as a main surface, a (1-1-1-1) plane in which a group V element of a III-V semiconductor becomes a surface atom, and a regular triangular projection formed on the semiconductor substrate. A first confinement layer formed on the semiconductor substrate including the protrusion, an active layer including at least two or more group III elements A and B formed on the first confinement layer, A second confinement layer formed on the active layer, wherein the forbidden band width of the active layer is smaller than any of the first confinement layer and the second confinement layer; Has three cleavage planes (1-10), (10-1),
A semiconductor buried structure, which is perpendicular to (01-1) and wherein the active layer formed on the side surface of the protrusion hardly contains any one of the constituent elements A and B. 6. A step of forming an equilateral triangular projection on a substrate having a (1-1-1-1) plane whose main surface is a group V element of a group III-V semiconductor as a surface atom; Crystal-growing a first confinement layer on the semiconductor substrate including a portion; crystal-growing an active layer containing at least two or more group III elements A and B on the first confinement layer; Crystal-growing a second confinement layer on the active layer, wherein the forbidden band width of the active layer is smaller than either the first confinement layer or the second confinement layer, and the equilateral triangle is formed. Has three cleavage planes (1-10), (10-1),
A semiconductor embedded structure, characterized in that the active layer formed on the side surface of the projection portion contains substantially no one of the constituent elements A and B, which is perpendicular to (01-1). Method. 7. The active layer is grown at a temperature at which desorption of group III atoms contained in the active layer starts using a molecular beam epitaxy method as a crystal growth method. 7. The method for producing a semiconductor embedded structure according to any one of 2, 4, and 6. 8. A GaAs substrate as a group III-V semiconductor substrate, and Al _x G as a first and a second confinement layer.
2. The buried semiconductor structure according to claim 1, wherein GaAs is used as an active layer, where a _1-x As (x> 0). 9. A GaAs substrate as a group III-V semiconductor substrate and Al _x G as first and second confinement layers.
3. The method according to claim 2, wherein GaAs is used as the active layer for a _1-x As (x> 0). 10. A GaAs substrate as a III-V group semiconductor substrate, and Al _x as a first and second confinement layer.
As Ga _1-x As (x> 0), InGa was used as an active layer.
6. The semiconductor buried structure according to claim 3, wherein As is used. 11. A GaAs substrate as a group III-V semiconductor substrate, and Al _x as a first and second confinement layer.
As Ga _1-x As (x> 0), InGa was used as an active layer.
7. The method according to claim 4, wherein As is used.