JP2650180B2 - Two-way two-terminal thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-way two-terminal thyristor.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional two-way two-terminal thyristor. This is a P-type first semiconductor region 1 and an N-type second semiconductor region.
Semiconductor region 2, a P-type third semiconductor region 3, an N-type fourth semiconductor region 4, and a P-type fifth semiconductor region 5,
First, second, third and fourth semiconductor regions 1, 2, 3, 4
A first thyristor composed of the first, second, and fourth
And a second thyristor composed of the fifth semiconductor regions 1, 2, 4, and 5 is a composite device connected in parallel.

A two-way two-terminal thyristor shown in FIG.
When a voltage that makes the potential of the second electrode 6 higher than the potential of the second electrode 7 is applied, the PN junction 8 formed at the interface between the first semiconductor region 1 and the second semiconductor region 2 moves in the opposite direction. Be biased. Here, when this applied voltage exceeds the breakdown voltage of the PN junction 8, the breakover current triggers the thyristor and the first thyristor is turned on.

In addition, the potential of the second electrode 7 is changed to the first electrode 6
When a voltage higher than the potential of the first semiconductor region 1 and the fourth semiconductor region 4 is applied, P
N-junction 9 is biased in the reverse direction. Here, when the applied voltage exceeds the breakdown voltage of the PN junction 9, the breakover current triggers the thyristor and the second thyristor is turned on. As a result, the thyristor operates bidirectionally.

[0005]

There are cases where such a two-way two-terminal thyristor of this type is used for an ignition device of a fan heater or the like. In such a case, it is desired that the breakover voltage of one or both of the first thyristor and the second thyristor does not change over time for a long time. In the two-way two-terminal thyristor shown in FIG.
Even when phosphorus glass or the like having high stability is used for 0 and 11, it is difficult to maintain good stability of the surface of the semiconductor substrate for a long period of time. For this reason, the above demand could not be sufficiently satisfied. In addition, a thyristor with a low on-voltage is required to reduce energy loss.

SUMMARY OF THE INVENTION An object of the present invention is to provide a two-way two-terminal thyristor having a small change in the ON voltage with time and a small ON voltage.

[0007]

The present invention for achieving the above object will be described with reference to the reference numerals of the drawings showing the embodiments. First semiconductor region 21 of the first conductivity type and semiconductor substrate A second semiconductor region 22 of a second conductivity type having an annular planar shape adjacent to the first semiconductor region 21 except for an upper surface exposed on one main surface of the semiconductor substrate; A third semiconductor region of a first conductivity type adjacent to the second semiconductor region except for an upper surface exposed on one main surface and having a ring-shaped planar shape; A fourth semiconductor region 24 which is exposed on one main surface and whose lower surface and side surfaces are surrounded by the first semiconductor region 21 and the second semiconductor region 22 respectively, The second semiconductor region 22 with respect to the region 21
A fifth semiconductor region 25 of the second conductivity type, which is adjacent to the opposite side of the semiconductor substrate and is exposed from the other main surface of the semiconductor substrate;
A sixth semiconductor region of a first conductivity type, which is exposed on the other main surface of the semiconductor substrate and has an annular planar shape, wherein the fourth semiconductor region is formed of the first semiconductor. The impurity concentration is higher than that of the region 21, and the third semiconductor region 23 and the fourth semiconductor region 24 of the second semiconductor region 22 are closer to the fourth semiconductor region 24 than the third semiconductor region 23. Intermediate portion and the fourth semiconductor region 24
An insulating film 28 is formed on the upper surface of the second semiconductor region 22, and the second semiconductor region 22 and the third semiconductor region 23 are electrically connected to a first electrode 30 that covers the upper surface of the insulating film 28. The fifth semiconductor region 25 and the sixth semiconductor region 26 are electrically connected to a second electrode 31;
The sixth semiconductor region 26 relates to a two-way two-terminal thyristor having an annular region that overlaps with the outer edge region of the second semiconductor region 22 in plan view.

[0008]

According to the present invention, since the first electrode 30 is formed via the insulating film 28 of the fourth semiconductor region 24 serving as a region for determining breakdown, the insulating film 28 is formed. Of the breakdown voltage due to the ions of the resin or the resin sealing body, and the change over time of the breakover voltage can be reduced. In addition, since the sixth semiconductor region 26 is arranged in a ring shape and the second thyristor is configured to surround the first thyristor in a ring shape, the on-voltage of the second thyristor can be reduced.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a bidirectional two-terminal thyristor according to an embodiment of the present invention will be described with reference to FIG. The two-terminal thyristor according to the present embodiment includes a P-type first semiconductor region
-Shaped second semiconductor region 22, P-shaped third semiconductor region 2
3, a P-type fourth semiconductor region 24, an N-type fifth semiconductor region 25, a P-type sixth semiconductor region 26, and a P-type seventh semiconductor region 26.
Semiconductor region 27.

The second semiconductor region 22 is exposed on one main surface of the semiconductor substrate and is formed in a plane ring shape. The third semiconductor region 23 is exposed on one main surface of the semiconductor substrate, and is formed in an annular shape inside the second semiconductor region 22. The distance between the inner edge of the second semiconductor region 22 and the inner edge of the third semiconductor region 23 is smaller than the distance between the outer edge of the second semiconductor region 22 and the outer edge of the third semiconductor region 27. The second and third semiconductor regions 22 and 23 are connected to the first electrode 30 through an opening 29 provided in a protective film 28 formed on one main surface of the semiconductor substrate, and are electrically short-circuited on the substrate surface. ing.

The fourth semiconductor region 24 is disposed at the center of the semiconductor substrate and is surrounded by the second semiconductor region 22. Although the fourth semiconductor region 24 is exposed on the surface of the substrate, a protective film 28 is formed on the upper surface thereof, and is not connected to the first electrode 30. The first electrode 30 covers the entire upper surface of the fourth semiconductor region 24 via the protective film 28.

The fifth semiconductor region 25 is adjacent to the first semiconductor region 21 on the side opposite to the second semiconductor region 22. The fifth semiconductor region 25 is exposed on the other main surface of the substrate, and is electrically connected to the second electrode 31.

The sixth semiconductor region 26 is formed in a planar annular shape along the outer edge of the other main surface of the substrate. The sixth semiconductor region 26 is exposed on the other main surface of the substrate, is electrically connected to the second electrode 31, and is electrically short-circuited with the fifth semiconductor region 25 on the substrate surface. When viewed in a plan view, the sixth semiconductor region 26 has an annular portion along the outer edge of the second semiconductor region 22 and overlapping the second semiconductor region 22. This annular portion extends inside the opening 29.

The seventh semiconductor region 27 is formed in a planar annular shape along the outer edge of one main surface of the substrate, and surrounds the second semiconductor region 22 via the first semiconductor region 21.
The upper surface of the seventh semiconductor region 27 is exposed on one main surface of the substrate and covered with a protective film.

Next, the operation of the bidirectional two-terminal thyristor of this embodiment will be described. The two-terminal thyristor of FIG.
First, second, third, fourth and fifth semiconductor regions 21 and 2
A first thyristor composed of 2, 23, 24, and 25, and first, second, fifth, and sixth semiconductor regions 21, 2;
This is a composite element in which a second thyristor composed of 2, 25 and 26 is connected in anti-parallel.

When a voltage that makes the potential of the first electrode 30 higher than that of the second electrode 31 is applied between the first electrode 30 and the second electrode 31, the first thyristor of the first thyristor is activated. PN junctions 33 and 34 formed at the interface between the semiconductor region 21 and the fourth semiconductor region 24 and the second semiconductor region 22
Are biased in the reverse direction. As a result, as shown in FIG.
First and second depletion layers 35 and 36 extend from N junctions 33 and 34, respectively. The third depletion layer 37 spreads on the surface side of the fourth semiconductor region 24 due to the electric field effect of the first electrode 30. First depletion layer 35 and second depletion layer 3
Since the sixth and third depletion layers 37 extend continuously from each other, they are not strictly distinguished.

Here, since the fourth semiconductor region 24 has a higher impurity concentration than the first semiconductor region 21 and has almost no concentration gradient in the lateral direction, the second depletion layer 36 extending from the PN junction 34 is shown in FIG. The depletion layer is narrower than the first depletion layer 35 as shown in FIG. Further, the fourth semiconductor region 24
Is formed by diffusion, the impurity concentration increases toward the surface side. However, since the third depletion layer 37 is formed on the surface of the fourth semiconductor region 24, the portion where the width of the second depletion layer 36 is narrowest is slightly larger than the surface of the fourth semiconductor region 24. Formed inside.

When the reverse voltage reaches the breakdown voltage, the critical electric field intensity Ecrit is applied to the narrow portion of the second depletion layer 36.
(Electric field concentration point) occurs, and the breakdown is triggered by this portion.

When a breakdown occurs, a PN junction formed at the interface between the second semiconductor region 22 and the third semiconductor region 23 due to a voltage drop due to a current flowing in the second semiconductor region 22 in the lateral direction is caused to move in the forward direction. Biased first, second, third and fourth semiconductor regions 21, 22, 23, 24
Is turned on. First,
Second, fourth and fifth semiconductor regions 21, 22, 24, 2
5 also conducts, resulting in the first thyristor conducting.

When a voltage that makes the potential of the second electrode 31 higher than the potential of the first electrode 30 is applied between the first electrode 30 and the second electrode 31, the second voltage is applied by dv / dt. The thyristor conducts.

According to the two-terminal thyristor of this embodiment, the following effects can be obtained. (1) The breakover voltage of the first thyristor can be kept constant for a long time. That is, according to the two-terminal thyristor of the present embodiment, the first electrode 30 is formed on the entire upper surface of the fourth semiconductor region 24 where the second depletion layer 36 for determining the breakdown voltage is formed. For this reason, the resin sealing body or the protective film 28 covering the thyristor element
The fluctuation of the breakdown voltage due to the ions contained in the element is effectively prevented. Further, the first electrode 30 also functions as a protective film. Therefore, the breakover voltage can be kept constant for a long period of time, and high reliability can be obtained. (2) The temperature dependence of the ON voltage is small. That is, the second depletion layer 36 causing avalanche breakdown
Is narrow, the temperature dependence of the breakdown voltage can be reduced. (3) No creep phenomenon occurs. That is, since the electric field concentration point is formed inside the surface of the semiconductor substrate, an unstable phenomenon in which the breakdown voltage fluctuates in a short time when a reverse voltage is applied, so-called creep phenomenon does not occur. (4) The ON voltage of the second thyristor is small. That is,
A second thyristor is arranged to annularly surround the first thyristor, and a sixth thyristor constituting the second thyristor is provided.
Of the second semiconductor region 22 in plan view.
And the opening 29. For this reason, the second electrode 3
The current path from 1 to the first electrode 30 is short, and the on-voltage can be relatively small. (5) Breakover of the first thyristor-low current and low power loss. Although the reason is not necessarily clear, the first, second, third and fourth semiconductor regions 21,
A first transistor including 22, 23, and 24;
First, second, fourth and fifth semiconductor regions 21, 22, 2
It is considered that the injection / reverse injection current paths of the second transistors constituted by the transistors 4 and 25 almost coincide with each other, and there is little reactive current that does not contribute to thyristor conduction. The reason why the current paths substantially match is that the distribution of the carriers diffused from the third semiconductor region 23 to the first semiconductor region 21 becomes maximum below the fourth semiconductor region 24.

[Brief description of the drawings]

FIG. 1 is a central longitudinal sectional view showing a conventional two-way two-terminal thyristor.

FIG. 2 is a central longitudinal sectional view showing a bidirectional two-terminal thyristor according to an embodiment of the present invention.

[Explanation of symbols]

 21 to 27 First to seventh semiconductor regions 28 Insulating film

Claims (1)

(57) [Claims] A first semiconductor region of a first conductivity type;
1) and a second semiconductor of a second conductivity type having an annular planar shape adjacent to the first semiconductor region (21) except for an upper surface exposed on one main surface of the semiconductor substrate. A region (22) and a first conductive type of a first conductivity type having an annular planar shape adjacent to the second semiconductor region (22) except for an upper surface exposed on one main surface of the semiconductor substrate. Third semiconductor region (23)
A fourth surface whose upper surface is exposed to one main surface of the semiconductor substrate, and whose lower surface and side surfaces are respectively surrounded by the first semiconductor region (21) and the second semiconductor region (22).
And the second semiconductor region (22) is adjacent to the first semiconductor region (21) on the side opposite to the second semiconductor region (22) and is exposed from the other main surface of the semiconductor substrate. A fifth semiconductor region of the second conductivity type (25); and a sixth semiconductor region of the first conductivity type (26) exposed to the other main surface of the semiconductor substrate and having an annular planar shape. )
Wherein the fourth semiconductor region (24) has an impurity concentration higher than that of the first semiconductor region (21), and the third semiconductor region (23) is closer to the fourth semiconductor region (24). The third semiconductor region (22);
Semiconductor region (23) and the fourth semiconductor region (24)
An insulating film (28) is formed on a portion between the second semiconductor region (24) and the upper surface of the fourth semiconductor region (24), and the second semiconductor region (22) and the third semiconductor region (23) The fifth semiconductor region (25) and the sixth semiconductor region (26) are electrically connected to a first electrode (30) covering an upper surface of the insulating film (28). (31), and the sixth semiconductor region (26) is electrically connected to the second semiconductor region (26) in plan view.
A two-terminal two-terminal thyristor having an annular region overlapping an outer edge region of the semiconductor region (22).