JP2653573B2 - Coordinate conversion circuit for CRT display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coordinate conversion circuit for a CRT display device which superimposes and displays radar video information and digital information on a CRT.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a general CRT display device, in which 1 is display data as digital information, 2 is a data input / output circuit, 3 is an operation panel,
4 is a coordinate conversion circuit for performing coordinate conversion of display data based on operation panel information, 5 is a circuit for decoding display data after coordinate conversion,
6 is a symbol generation circuit, 7 is an arc generation circuit, 8 is a straight line generation circuit, 9 is a radar signal, 10 is a video control circuit, 1
1 is a luminance signal generation circuit, 12 is a deflection signal generation circuit, 13
Is a video signal generation circuit, and 14 is a CRT. The symbols generated by the symbol generation circuit 6 include, for example, various symbols for distance display.

FIG. 3 is a block diagram showing a coordinate conversion circuit of the conventional CRT display device, and is a diagram showing an internal configuration of the coordinate conversion circuit 4 of the CRT display device shown in FIG. In the figure, reference numeral 15 denotes display data from the data input / output circuit 2;
6 is range information from the operation panel 3, 17 is off-center information, 18 is a control signal, 19 is a CPU for executing coordinate conversion calculation, 20a and 20b are memories for coordinate conversion data, 2
1 is conversion data, and 22 is a control unit for controlling the memories 20a and 20b.

Next, the operation will be described. As shown in FIG. 3, the CPU 19 receives display data 15 from the data input / output circuit 2 and range information 16 and off-center information 17 from the operation panel 3. The CPU 19 sets the display data 1
From 5 the display mode is (1) symbol display, that is, display of symbols such as alphanumeric characters or symbols, or list display, that is, display of a list that is a sequence of symbols,
It is determined whether the mode is either the (2) straight line display or the (3) circle / arc display mode, and the following processing is executed according to the determined display mode. (1) When displaying symbols and lists, calculate new coordinates and check whether the new coordinates belong to the effective area.
It is determined whether the image belongs to the invalid area, and the display of the image belonging to the invalid area is inverted. (2) When displaying a straight line New start point coordinates and new end point coordinates are calculated. However, when at least one of the new start point coordinates and the new end point coordinates belongs to the invalid area, the intersection of the straight line and the valid area is calculated, and this is set as the new (start point) end point coordinates. (3) When displaying circles and arcs When displaying a circle, the new center coordinates and new radius coordinates are calculated. At the time of arc display, a new display start angle and a new display end angle are calculated. It should be noted that setting only the range belonging to the effective area as the display target is the same as in the case of the linear display.

After calculating the data for each mode, the CPU 19 writes the new display data in the memory 20b. The memories 20a and 20b form a double buffer, and are alternately used for reading data for display processing and writing for updating display data. The conversion data 21 is sequentially read from the memory on the reading side. Then, as shown in FIG. 2, the display data is decoded by the decoding circuit 5, and signals are output to the generation circuits 6 to 8 in each mode corresponding to the display mode. Generating circuit 6 for each mode
Reference numeral 8 outputs an analog signal to the luminance signal generation circuit 11 and the deflection signal generation circuit 12 to drive the CRT 14. The video control circuit 10 and the video signal creation circuit 13 are circuits for displaying radar video.

[0006]

The conventional coordinate conversion circuit is configured as described above, and since the calculation of the coordinate conversion is executed by firmware, the conversion time is long, and the time required for operating the screen on the operation panel is large. There were problems such as display delay.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is possible to suppress the delay of the screen operation within the updating of the screen display of the CRT and to make the parallel movement display during off-center continuous. It is another object of the present invention to provide a coordinate conversion circuit capable of eliminating a display delay and a limitation of a display capacity.

[0008]

A coordinate conversion circuit for a CRT display device according to the present invention comprises:
A radar video and optionally coordinate transformed data
CRT display coordinates for superimposing and displaying digital data
A digital data to be displayed (hereinafter, referred to as a conversion circuit)
This is referred to as “display data”. ) In any display mode
The reference word that indicates whether to perform
Reference word detection circuit to output and this reference word detection circuit
Counter that operates with preset output data
And a control flag indicating the coordinate conversion procedure.
Address is input by the counter value
Control ROM and Niiza after display data coordinate conversion
A new coordinate calculation circuit for calculating the target,
To determine whether the data belongs to the displayable area
Data table for the
New coordinates calculated by the new coordinate calculation circuit based on the table
Determine whether data belongs to the displayable area
Determined by the rear determination ROM and the new coordinate calculation circuit.
The transformation data, which is the parameter of the display data to be transformed
Conversion data register for accumulating data, and the control RO
M, and is stored in the area determination ROM.
Symbol display data by referring to the data table
A symbol-based coordinate determiner that determines whether or not to output
The conversion data register is controlled by the control ROM.
Refer to the conversion data stored in the data
A linear coordinate conversion circuit for performing linear coordinate conversion of data
Is controlled by the control ROM, and is stored in the conversion data register.
Refer to the stored conversion data and display the
And a circle / arc coordinate conversion circuit that performs the circle / arc coordinate conversion of
The above reference word detection circuit, counter, control RO
M, new coordinate calculation circuit, area judgment ROM, conversion data
Register, symbol coordinate detector, linear coordinate converter, and
And the circle / arc coordinate transformation circuits
Is taking Here, the reference code detection circuit includes:
A new coordinate operation circuit including a decoder and a register;
Includes a magnification setting ROM, a multiplier, and an adder.
The linear coordinate conversion circuit includes a counter, a ROM, and a linear coordinate.
A converter, and the circle-arc coordinate conversion circuit includes a counter.
Data, a ROM, and a circular-arc coordinate converter.

[0009]

A coordinate conversion circuit for a CRT display device according to the present invention.
In the above, separate ROMs corresponding to each processing are provided separately, and parallel processing for driving each independently is performed.
Since it is, it is possible to achieve a high-speed coordinate transformation
You. As a result, the delay of screen operation can be suppressed within CRT screen display update, also it can be a parallel movement display in the off-center a continuous display further display delay, and to eliminate the restriction of display capacity Can be. Also,
It introduced the concept of the firmware processing, since so as to perform overall control by a counter and ROM, and any modifications to the processing contents, it is possible to easily deal only presumed dead, switch the ROM. Further, the area is controlled by a control ROM,
Refer to the data table stored in the judgment ROM
To determine whether to output symbol display data.
Controlled by a symbol coordinate determiner and a control ROM,
Refer to conversion data stored in conversion data register
To perform linear coordinate conversion on display data.
And a conversion data register controlled by a control ROM.
Refer to the conversion data stored in the
A circle / arc coordinate conversion circuit that converts the circle / arc coordinates of
Digital coordinate system with three coordinate transformation circuits
Linear coordinate conversion, circle / arc coordinate conversion, and
Selectively perform symbol coordinate transformation and selectively perform coordinate transformation.
The data sent to the display of the CRT display device,
Radar video and digital display on the RT display
And superimposed data.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a coordinate conversion circuit for a CRT display device according to an embodiment of the present invention.
27 is a load signal of the display data 15 to the coordinate conversion circuit;
23 is a flip-flop for creating a BUSY signal of the coordinate conversion circuit, 24 is a BUSY signal, 25 is a decoder for a reference word that defines a display mode, 26 is a decoder for a display mode, 28 is an AND circuit, 29a to 29c are registers,
Reference numeral 30 denotes a counter, 31 denotes a ROM storing flags for processing procedures, 32a and 32b denote AND circuits, 33a and
33b is a counter, 34a and 34b are ROM, 35 is a linear coordinate converter, 36 is a circle / arc coordinate converter, 37 is a multiplier for coordinate conversion, 38 is an adder, and 39 is an R for area determination.
OM, 40a to 40f are registers, 41 is a symbol coordinate converter, 42 is a bus buffer, 43 is an OR circuit, 44
Is a conversion completion signal, 45 is a magnification setting ROM, 46 is a delay circuit, 47 is an Rb-LOAD signal for storing coordinates, 48 is an END signal, 49 is a counter control signal, and 50 is Rc-L.
An OAD signal, 51 is an SST signal as a coordinate conversion start signal, and 52 is a DC0 signal for setting the off-center amount to zero.

FIG. 4 is an area definition diagram showing an effective area of the CRT screen. FIG. 5 is a diagram showing an example of data for each display mode. In FIG. 5, word I indicates information indicating the type of screen display mode, word II indicates coordinates used in each display mode, and the beginning of a symbol code. Information, word III is information indicating a symbol code, and words IV, V are information indicating a radius and an angle in the case of circle / arc display. The loops indicated by A to D indicate that the words in the loop can be continuously processed. FIG. 6 is a diagram showing an example of ROM data for each display mode. In FIG.
CTDS is a signal to stop counting, CTLD
(*) Is a signal for presetting the count value * to the counter and stopping the count. Note that the numerical value at the left end in FIG. 6 does not indicate the count value itself, but is simply n.
Indicates the second state.

Next, the operation will be described. The data input / output circuit 2 shown in FIG. 2 confirms the operation status of the coordinate conversion circuit shown in FIG. 1 with the BUSY signal 24, and inputs the display data 15 and the load signal 27 at the time of NOT BUSY. The reference word decoder 25 detects the word I in FIG. 5, extracts the load signal 27 of the word I by the AND circuit 28, registers the display mode by the display mode decoder 26 in the register 29c, and registers the word I in the register 29c. Store at 29b. The register 29a stores the display data 15 for each load signal 27.

At the time of symbol display, word I is stored in register 2
When 9b is read, the counter 30 is cleared and the count is prohibited at the same time. The word I load signal 27 is supplied to the delay circuit 4
6 and the OR circuit 43 outputs the conversion completion signal 44. Upon transmission of the conversion completion signal 44, the BUSY signal 24 is turned off and the next data is fetched. When a word other than the word I enters the reference word decoder 25, the output of the register 29b is turned off, and the counter 30 is preset to a count value with the display mode of the register 29c being higher, and starts counting. The word II data in the register 29a is multiplied by the multiplier 37 with the output of the magnification setting ROM 45 based on the range information 16, and the output is added to the off-center information 17 by the adder 38 to calculate new coordinates. The area determination ROM 39 determines which of the areas shown in FIG. 4 the new coordinates are, and outputs an END signal for stopping the processing from the symbol-based coordinate determiner 41 to the OR circuit 43 in areas other than the area "5" to complete the conversion. Output signal and reject as invalid data. In the case of the area “5”, the conversion data 21 is output from the bus buffer 42. Next, the control signal generation system of the counter 30 and the ROM 31 outputs the END signal 48, and turns off the BUSY signal 24 to take in the next data. Next, the counter 30 and the ROM 31, which are control signal generation systems, output CTLD (0), which is one of the counter control signals 49, and
Is preset for word II input processing, and counting is stopped.

When displaying a list, that is, when displaying a list that is a series of symbols, the same operation as that for displaying a symbol is performed up to the words I and II, and the counter 30 is stopped by CTDS at the end of the word II. , Preparing for the next data entry. The count restarts with the next data input,
The counter 30 and the ROM 31, which are control signal generating systems,
The c-LOAD signal 50 is output. At this time, the symbol-based coordinate determiner 41 instructs the bus buffer 42 to output the word III . Next, an END signal 48 is output,
Further, CTLD (3) which is one of the counter control signals 49
Is output, and the counter 30 is preset. This is stopped to prepare for the continuous processing of word III.

At the time of the linear display, the same operation as the symbol display is performed up to the word I and the word II.
The counter 30 is stopped by the TDS to prepare for the next data input. The count is restarted by the next data input, and the counter 30 and the ROM 31, which are control signal generation systems,
It forces out of the -LOAD signal 47. The coordinate data based on this output stores the start point coordinates, the end point coordinates, and the area where each coordinate exists in the registers 40a to 40f. Here, the counter 30 and the ROM 31, which are control signal generation systems,
The signal 51 is output to the AND circuit 32a, and the AND circuit 32a
Calculates the logical product of the register 29c and the linear display signal, starts the counter 33a and the ROM 34a, and starts the operation of the linear coordinate converter 35. Linear coordinate converter 35 start and end points, except when the area "5" shown in FIG. 4 calculates _{X L, X R, Y T} , intersection of the Y _B, and outputs to the bus buffer 42. In the case of the area "5", the data is output to the bus buffer 42 as it is. After that, the counter 30 and the ROM 31, which are control signal generation systems, output the counter control signal 4
The counter 30 is preset by stopping CTLD (3), which is one of the nine, and stopped to prepare for the next word II data.

At the time of displaying the circle and the arc, the same operation as the symbol display is performed up to the word I and the word II. At the end of the word II, the counter 30 is stopped by the CTDS to prepare for the next data input. The count restarts with the next data input,
The counter 30 and the ROM 31, which are control signal generation systems,
An Rb-LOAD signal 47 is output, and a word IV is output. At the same time, the DC0 signal 52 is output to the adder 38. This is to prevent the off-center amount from being added because the word IV is radius information. The counter 30 and the ROM 31, which are control signal generation systems in response to the word V capture, use the CTDS, one of the counter control signals 49, to control the counter 30.
Is stopped, and the SST signal 51 is output to the AND circuit 32b. The AND circuit 32b calculates the logical product of the circle and the arc display signal of the register 29c, and as a result,
b, Activate the ROM 34b and start the operation of the circle / arc coordinate converter 36. The circle / arc coordinate converter 36 is a register 4
From the center coordinates of 0c and 40d, the radii of the registers 40a and 40b, and the angle data of the register 29a, an arc angle as a displayable range is calculated and output to the bus buffer 42.
Next, a counter 30 and a ROM 31 which are control signal generation systems
Outputs CTLD (0), which is one of the counter control signals 49, to preset and stop the counter 30 to prepare for the next word II data.

The bus buffer 42 calculates the logical sum of all data by tri-state logic. Here, the required signal lines are permitted to be output only for a predetermined period by the symbol coordinate determiner 41, the linear coordinate converter 35, and the circle / arc coordinate converter 36, and are output as conversion data 21 to a subsequent circuit.

As described above, according to this embodiment, since the processing by the firmware is configured by wired logic, the coordinate conversion time can be shortened, and a smooth parallel movement can be realized in the CRT display device. In addition, it is possible to eliminate delays in operations such as range and off-center operations, and the above effects can be more remarkably obtained as the display amount increases.

In the above embodiment, the counters 33a and 33b and the ROMs 34a and 34b are assigned to the linear coordinate converter and the circular / arc coordinate converter, respectively, but these are shared and controlled by the operation of the upper address of the counter. Well,
The same effects as in the above embodiment can be obtained.

If a circuit element suitable for high-speed operation is used, it is a matter of course that further high-speed operation can be achieved depending on the characteristics of the element.

[0021]

As is apparent from the above description , according to the present invention , ROMs corresponding to each processing are separately provided.
And perform parallel processing to drive each independently.
So that the speed of coordinate transformation can be increased
As a result, the screen operation delay is suppressed within the screen display update of the CRT.
And display the parallel movement display during off-center.
Continuous display, further display delay, and display
It is possible to eliminate the limitation of the indicated capacity. Also, firmware
Introduces the concept of hardware processing, and controls the entire control with a counter and RO.
Since the process is executed with M
Even if there is, it can be easily dealt with only by replacing the ROM. Sa
In addition, the area determination ROM is controlled by a control ROM.
Refer to the data table stored in
Symbol coordinates that determine whether to output display data
It is controlled by a decision unit and a control ROM, and
Refer to the conversion data stored in the
Linear coordinate conversion circuit that performs linear coordinate conversion of data
Controlled by ROM, stored in conversion data register
Refer to the conversion data that has been
Three coordinates, such as a circle / arc coordinate conversion circuit that performs mark conversion
It is equipped with a conversion circuit so that digital data
Linear coordinate conversion, circle / arc coordinate conversion, and symbol
Data that is selectively transformed and selectively transformed
To the display of the CRT display device,
Radar video and digital data on the display
Can be superimposed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a coordinate conversion circuit according to one embodiment of the present invention.

FIG. 2 is a block diagram showing a general CRT display device.

FIG. 3 is a block diagram showing a conventional coordinate conversion circuit.

FIG. 4 is an area definition diagram.

FIG. 5 is a diagram showing an example of data for each display mode.

FIG. 6 is a diagram showing an example of ROM data for each display mode.

[Explanation of symbols]

 15 display data 16 range information 17 off-center information 21 conversion data 23 flip-flop 24 BUSY signal 25 reference word decoder 26 display mode decoder 27 load signal 28 AND circuit 29 register 30 counter 31 ROM 32 AND circuit 33 counter 34 ROM 35 linear coordinate converter 36 circle / arc coordinate converter 37 multiplier 38 adder 39 area determination ROM 40 register 41 symbol system coordinate determiner 42 bus buffer 43 OR circuit 44 conversion completion signal 45 magnification generation ROM 46 delay circuit 47 Rb-LOAD signal 48 END signal 49 Counter control signal 50 Rc-LOAD signal 51 SST signal 52 DC0 signal

Claims (2)

(57) [Claims] To 1. A on the display of the CRT display device, a radar video, a CRT display device coordinate transformation circuit causes superimposed display of the digital data selectively coordinate transformation
There, the digital data (hereinafter, referred to as "display data".) To be displayed reference word search a reference word that indicates whether to display in any display mode is detected among the display data
A circuit output, a counter which operates the output data of the reference word detecting circuit as a preset value, is stored a control flag indicating a coordinate transformation procedure,
And a control ROM which count value by the counter is the address input, said a new coordinate calculating circuit for performing an operation for obtaining the new coordinates after coordinate transformation of the display data, or coordinate transformed data belongs to viewable area A data table for determining whether or not it is stored is stored,
Based on this data table, the new coordinate calculation circuit
Whether the new coordinate data belongs to the displayable area
An area determination ROM, a conversion data register for storing conversion data which is a parameter of display data to be subjected to coordinate conversion obtained by the new coordinate calculation circuit, and an area determination RO controlled by the control ROM.
By referring to the data table stored in the M, the symbol-based seat to determine whether to output the symbol display data
A target determination unit is controlled by the control ROM, with reference to the conversion data stored in the conversion data register, and the linear coordinate transformation circuit for performing linear coordinate transformation of the display data, controlled by the control ROM is, by referring to the conversion data stored in the conversion data register, and a circular-arc coordinate conversion circuit <br/> performing circular-arc coordinate conversion of the display data, the reference word detecting circuit, a counter , Control ROM, new
Coordinate operation circuit, area judgment ROM, conversion data register
Data, symbol-based coordinate determiner, linear coordinate conversion circuit, and circle
· Arc coordinate conversion circuit, a wire over yard logic one another
CRT display device coordinate conversion circuit, characterized in that taking. 2. Coordinates for a CRT display device according to claim 1.
In the conversion circuit, the reference code detection circuit includes a decoder and a register.
Wherein, the new coordinate computing circuit, magnification setting ROM, multiplier, and includes an adder, the linear coordinate conversion circuit, counter, ROM, and includes a linear coordinate converter, the circular-arc coordinate conversion circuit , counter, C RT display device coordinate transformation circuit you comprising ROM, and a circular-arc coordinate converter.