JP2666624B2 - Gas discharge panel drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for a gas discharge panel, and more particularly, to a driving circuit for a gas discharge panel which can correspond to an arbitrary period of a synchronizing signal.

A gas discharge panel generally called a plasma display panel utilizes discharge light emission of a mixed gas of neon, nitrogen and the like, and is advantageous in that it can be made smaller, thinner and has a longer life than a CRT display. In recent years, it has been widely used as a display panel for a portable personal computer or a factory automation (FA).

[0003] Plasma display panels are generally
A high firing pulse (writing pulse) is applied between the X-axis and Y-axis electrodes, which are orthogonal to each other, to discharge the sealing gas in the discharge cells forming each pixel, and the wall charges generated by the discharge are subjected to a sustain pulse (sustain pulse). (Pulse) or by extinguishing through the application of an arc-extinguishing pulse (erase pulse) to obtain an image display through blinking control of each pixel composed of each discharge cell. .

[0004]

2. Description of the Related Art FIG. 5 is a block diagram showing a driving circuit of a conventional gas discharge panel together with a corresponding gas discharge panel. 1A shows the entire gas discharge panel and the driving circuit, and FIG. 2B shows an edge detection circuit (read start signal output means) 2 for detecting the falling of the horizontal synchronizing signal in FIG. Are shown respectively. In FIG. 1, a gas discharge panel 10 is driven by an X-side driver (X-axis selection circuit) 41 and a Y-side driver (Y-axis selection circuit) 42, and applies write, erase, and sustain pulses for each discharge cell. Is done.

[0005] In addition to outputting the sustain pulse, the X-side driver 41 receives one line of display data from a signal source such as a personal computer within the duration of the horizontal synchronizing signal, and receives the data via a shift register provided therein. And latches them, and simultaneously outputs pulses defined by the display data at a predetermined time. In addition to outputting a sustain pulse, the Y-side driver 42 receives scan data from a signal source, and applies a write / erase pulse at a predetermined timing to a Y electrode arranged at a position of a Y coordinate selected by the scan source. I do.

In the drive circuit, in addition to the selection circuits 41 and 42, the edge detection circuit 2 for generating a read start signal from a horizontal synchronization signal XHSYNC (HSYNC with a top bar, the same applies hereinafter), and a clock for controlling the entire drive circuit An oscillator 6 that outputs a signal CK, a clock signal CK is input, counts up, and is reset by a read start signal to start a new count-up. A ROM address counter 31 and an address are specified by a ROM address counter. A waveform program ROM 1 for storing a pulse train signal in which a pulse train and a generation timing of a write / erase pulse are defined, and a control unit 32 for controlling these are arranged.

The edge detecting circuit 2 is provided with a horizontal synchronizing signal XHSYNC
Is a circuit that outputs a read start signal consisting of a one-shot pulse when this level change is detected as an input. As shown in FIG. 5B, the first and second flip-flops are connected in cascade. 21 and 22, and a NAND gate 23 to which the complementary output XQ from the first flip-flop 21 and the positive-phase output Q from the second flip-flop are respectively input.

FIGS. 6A and 6B show signal waveforms in the above-mentioned conventional gas discharge panel drive circuit. FIG. 3A shows signal waveforms at various parts of the edge detection circuit 2, and FIG. 3B shows pulse waveforms output from the X-side and Y-side drivers 41 and 42. This pulse waveform
It is obtained via a pulse train signal read from the waveform program ROM 1, display data separately input to the X-side driver 41, and scan data separately input to the Y-side driver 42.

As shown in FIG. 6A, a falling level change a occurs in the horizontal synchronizing signal XHSYNC sent from the signal source, and the first flip-flop 21 in the next cycle of the clock signal CK. Falls at the output XHSA of the second flip-flop 2 receiving the output XHSA.
2 is the output XH in the next clock signal cycle.
A falling c occurs in SB. Therefore, pulse HSA and XHSB
A falling one-shot pulse (read start signal) d appears in the coincidence signal HCLR (HCLR = HSA.XHSB) of FIG.

The ROM address counter 31 starts counting up in response to a one-shot pulse in the read timing signal XHCLR, which is an inverted signal of the coincidence signal. The control unit 32 determines the first address of the waveform program ROM 1 according to the count value. , The pulse train signals are sequentially read out. The pulse train signals sequentially read from the waveform program ROM 1 are supplied as pulse control signals to the X-side and Y-side drivers 41 and 42 constituting the pulse selection circuit, respectively. The signals output from the drivers 41 and 42 to the gas discharge panel 10 are shown in FIG.

First, a sustain pulse SY of about 5 .mu.sec specified by a pulse train signal is applied to all the electrodes of the Y coordinate driven by the Y-side driver at the timing shown in FIG. As shown, a write pulse WP having a high voltage value is applied to one Y electrode corresponding to the Y coordinate during scanning for which data update is specified. Due to the output of the write pulse WP, discharge starts in all the discharge cells of the Y coordinate.

Next, the write pulse WP at the Y coordinate is
Then, a sustain pulse SX of about 5 μsec is applied to all electrodes of the X coordinate driven by the X-side driver.
The Y-coordinate sustain pulse SY and the X-coordinate sustain pulse SX constitute an AC sustain pulse. The AC sustain pulses SY and SX are shown in FIG. 6B at all coordinates according to a predetermined time interval specified in the program.
It occurs intermittently as shown in (1).

In general, the AC sustain pulses SY and SX move wall charges in the discharge cell from the wall on one electrode side to the wall on the other electrode side, and discharge light emission occurs during this movement. In the movement of the wall charges, the sustain pulse needs to be continued for a predetermined pulse duration, and if the pulse duration is insufficient, the wall charges disappear during the movement, which is not preferable.

Following the first applied AC sustain pulses SY and SX, the X-side driver 41
According to the display data for one row transferred to the X, the cancel pulse CP is simultaneously applied from the X side driver to the X electrode corresponding to the coordinates where the discharge is to be continued, and the cancel is applied to the coordinates where the discharge is to be stopped at this time. By not applying the pulse CP, an output for updating the display of one row of the Y coordinate during scanning is performed in accordance with the display data transferred from the signal source.

In a time zone in which data update is output from the X-side driver, Y corresponding to the Y coordinate being scanned is
An erasing pulse EP of about 1 μsec is applied to the electrode. Unlike the sustain pulses SY and SX, the erase pulse EP is a pulse having an extremely short duration, and can eliminate wall charges.

When the erase pulse EP is applied, the erase cell EP is canceled by the function of the cancel pulse CP in the discharge cell of the X coordinate to which the cancel pulse CP is applied. The discharge started by the write pulse WP continues, and the discharge stops in the discharge cell of the X coordinate to which the cancel pulse CP is not applied. Since the period from the writing pulse WP to the generation of the erasing pulse EP is extremely short, the light emission of the discharge cells discharged only during this period does not appear visually. The data for one row of the Y coordinate being scanned is updated by the series of pulses.

In the other Y coordinates where the scanning is not being performed and therefore no data updating is performed, the AC sustain pulses SY and SX
Since only the voltage is applied, the discharge continues to be continued in the discharge cell selected to be discharged at the time of the previous data update of the Y coordinate, and the sustain pulse generates a new discharge in the discharge cell selected to stop the discharge. Since the discharge start voltage is lower than the discharge start voltage that can be caused, the discharge stop continues.

Following the above, a falling edge appears again in the horizontal synchronizing signal XHSYNC. When the falling edge is detected by the edge detecting circuit 2 and a read start signal forming a one-shot pulse is generated at its output, the ROM address counter is reset. Therefore, the pulse train signal is sequentially read again from the first address of the waveform program ROM, and the same data update is performed for one row of the next Y coordinate newly selected.

[0019]

In a personal computer or the like serving as a signal source, the cycle of the horizontal synchronizing signal is generally set according to a transfer rate or the like inherent to the computer. It is determined by Therefore, after the falling of one horizontal synchronizing signal is detected and the reading of the waveform program ROM is started, the data update for one row is completed, and the falling of the next horizontal synchronizing signal is detected and the reading of the ROM is newly performed. The time until the start is different depending on the horizontal synchronization signal output from each computer.

However, in the driving circuit of the gas discharge panel, a sustain pulse requiring a predetermined duration is intermittently applied in accordance with the pulse train signal stored in the waveform program ROM. Therefore, when the falling of the horizontal synchronizing signal is detected at the time when the sustain pulse is applied and the read start signal is generated, the waveform program ROM
Is returned first, the application of the sustain pulse being continued is interrupted halfway, and the duration of the sustain pulse is insufficient, so that the wall charge disappears.

When the wall charges disappear, the corresponding discharge cell displays erroneous data different from the data transferred from the signal source. In addition, the timing of generating the read start signal and the output timing of the sustain pulse as described above both occur at the same timing, so that the timing coincidence continues to occur even after that, and the display of the error data is continued. It will be a continuing situation.

Conventionally, in order to prevent the disappearance of the wall charges as described above, a system as a signal source has a structure as shown in FIG.
The level change of the horizontal synchronizing signal according to the variable range A shown in (b) is output to prevent the timings from being matched, and the cycle of the horizontal synchronizing signal is output from the driving circuit of the discharge panel. The period is set according to the period of the sustain pulse, that is, the period of the pulse train signal stored in the waveform program ROM.

However, in order to determine the cycle of the horizontal synchronizing signal in accordance with the driving circuit of the gas discharge panel, the system must select an optimal cycle of the horizontal synchronizing signal in accordance with the inherent display data transfer speed and the like. However, there is a problem that setting the horizontal synchronizing signal in accordance with the waveform of the drive circuit in this way places a burden on the system side.

The present invention has been made in view of the above-mentioned problem of the conventional driving circuit of the gas discharge panel, and the discharge to be continued in the discharge cell is insufficient in the duration of the sustain pulse regardless of the cycle of the horizontal synchronizing signal on the system side. To provide an improved gas discharge panel drive circuit which has high reliability of data display and does not require a burden on the system for the horizontal synchronization signal on the system side. The purpose is to:

[0025]

FIG. 1 shows the principle of the present invention. In the figure, 1 is a storage means, 2 is a read start signal output means, 3 is a pulse control signal output means, 4 is a pulse selection circuit, 5 is a timing coincidence detection means, and 10 is a gas discharge panel.

In order to achieve the above object, a driving circuit for a gas discharge panel according to the present invention, as shown in FIG. 1, has a wall charge formed therein through an ignition pulse and a periodic sustain pulse through a sustain pulse. A plurality of discharge cells in which the wall charges are maintained and the wall charges disappear through an arc-extinguishing pulse, and a screen display is performed for each of the discharge cells by selecting the respective pulses. A storage circuit (1) in which a pulse train signal defining at least a pulse train including the sustain pulse is stored, and a periodically changing synchronizing signal is inputted, and a predetermined level of the synchronizing signal is inputted. A read start signal output means (2) for outputting a read start signal when a change is detected; and each time the read start signal is generated, the one pulse train signal is newly read from the storage means (1) and output. Pulse control signal output means for (3)
And a pulse selection circuit (4) to which at least the one pulse train signal and the display data are input and outputs each pulse for each discharge cell, wherein the read start signal and the one pulse train signal are reduced. And a timing coincidence detecting means (5) for outputting a timing coincidence signal when detecting that the read start signal is generated during the continuation of the output of the sustain pulse. ) Is, when the timing coincidence signal is generated, another pulse train signal defining a sustain pulse generated at a time different from the sustain pulse defined by the one pulse train signal instead of the one pulse train signal. The pulse output is output to the pulse selection circuit (4).

[0027]

When the output coincidence between the output timing of the sustain pulse defined by one pulse train signal read from the storage means and the generation timing of the next read start signal is detected by the timing coincidence detection means. Output a different pulse train signal, and since the generation timing of the sustain pulse is different from that of the one pulse train signal in the other pulse train signal, the output timing of the sustain pulse specified by the pulse train signal read from the ROM next time And the generation timing of the read start signal generated thereafter differs from each other, and the read start signal does not occur during the H level period of the sustain pulse, and the duration of the sustain pulse is short due to the short duration of the sustain pulse. The situation where the discharge disappears in the discharge cell is prevented.

[0028]

BRIEF DESCRIPTION OF THE DRAWINGS The invention will be further explained with reference to the drawings. FIG.
1 is a block diagram of a gas discharge panel driving circuit and a gas discharge panel according to one embodiment of the present invention. In the figure, elements performing the same operations as those in FIG. 5 are denoted by the same reference numerals.

In FIG. 2, an edge detection circuit 2 to which a synchronization signal XHSYNC is input has the same configuration as the conventional edge detection circuit shown in FIG. 5B, and outputs a read timing signal XHCLR. . The read timing signal is input to the reset terminal CLR of the ROM address counter 31 as well as to the timing coincidence detecting means 5 as in the conventional drive circuit.

The timing coincidence detecting means 5 receives the read timing signal XHCLR and outputs an inverted signal of the inverter 51, and an output signal of the inverter and an AND which receives the strobe signal STB from the pulse control circuit 32.
The gate 52 and the output signal "1" of the AND gate 52
Toggle flip-flop (T-
FF) 53 and a toggle flip-flop 5
The output of No. 3 is input to the pulse control circuit 32 as a control input. A pulse control signal output means is composed of the calanta 31 and the pulse control circuit 32.

The toggle flip crop 53 inverts its output when a pulse coincidence is detected in both signal waveforms based on the inverted signal HCLR of the read timing signal and the strobe signal STB read from the waveform program ROM. It is. Based on the inverted output, the pulse control circuit 32 selects an address at the start of reading the waveform program ROM.

FIG. 3 shows the output waveforms 1 and 2 of the pulse selection circuit obtained by the first and second pulse train signals stored in the ROM, respectively, and the strobe signal STB. In the figure, both output waveforms 1 and 2
Is the first AC sustain pulse SY, SX, write pulse W
The P, the cancel pulse CP, and the erase pulse EP are configured as output waveforms having the same waveform and the same timing.

On the other hand, the second and subsequent sustain pulses S
The generation timings of Y and SX are different from each other. Also, because of this, the sustain pulse in both drivers is
The generation timing of each strobe signal STB output simultaneously with SY and SX is also different from each other.

FIG. 4 is an explanatory diagram of the output pulses of the X and Y side driver circuits and the selection of signals read from the waveform program ROM in the above embodiment. In the figure, the power is turned on and the read timing signal XHCLR
Then, when the read start signal e1 is generated, the first pulse train signal is read out from the waveform program ROM and is output, so that the sustain pulse SY is first selected for all the Y electrodes as in the related art. The write pulse WP is applied to the Y electrode during scanning, and the sustain pulse SX is applied to all X electrodes.

Next, a cancel pulse CP is applied to a specific X electrode according to the input display data, and subsequently, an erase pulse EP is applied to all Y electrodes.
At the same time as the application of the second sustain pulse SY, the strobe signal STB is output from the pulse control signal output means 3 and input to the timing coincidence detection means 5.

When the level of the synchronizing signal from the signal source changes during the duration of the sustain pulse SX of the X electrode and the next read start signal e2 is generated as shown in FIG.
The address counter 31 is reset. At this time, if the duration of the sustain pulse SX is not sufficient as shown in the figure, a situation in which the wall charge disappears and the discharge stops in the discharge cell of the selected Y coordinate previously written according to the display data. Occurs.

The ROM address counter 31 is reset by the read start signal e2, and the AND gate 52
Detects the pulse coincidence between the strobe signal STB and the read start signal XHCLR, so that the toggle flip-flop 53 is inverted. When the toggle flip-flop 53 is inverted, the inverted output is input to the pulse control signal output means 32, and the read address of the waveform program ROM 1 is changed and read by the pulse control signal output means 32. Is read.

When the output waveform 2 is read, a write pulse WP is applied to the Y electrode of the selected Y coordinate at this time, so that a discharge cell of the Y coordinate generates a wall charge and emits light. After the data writing is performed according to the display data from the signal source, when the read start signal e3 is generated through the next level change of the synchronization signal, the generation timing of the sustain pulses SY and SX has already been changed.
The output timing of the second and subsequent sustain pulses SY and SX in the read output waveform 2 does not coincide with the generation timing of the read start signal d3.

When the Y coordinate is successively selected by the change in the level of the synchronization signal, necessary wall charges are sequentially generated at the selected Y coordinate, and normal display is performed through writing, erasing, and maintaining of the wall charges. Is performed. When the first Y coordinate is selected through a cycle of selection by the synchronization signal, the display on the screen is completely normal.

As described above, even when the cycle of the synchronization signal is set independently of the cycle of the sustain pulse stored in the waveform program ROM of the drive circuit, the output timing of the sustain pulse and the read timing of the ROM match. In this case, another pulse train signal is read out.Therefore, these two timings do not coincide with each other. Absent.

In the above embodiment, the waveform program ROM 1
Are stored and two types of pulse train signals are selected and read out. However, it is not always necessary to select from two types of pulse train signals. When the read start signal generation timing coincides, the output timing of the second and subsequent sustain pulses can be delayed by a circuit configuration.

[0042]

As described above, according to the gas discharge panel drive circuit of the present invention, when the read start signal is generated while the sustain pulse is being output, the output timing of the sustain pulse can be shifted. Therefore, regardless of the period of the synchronization signal from the signal source, it is possible to prevent a situation in which the required duration of the sustain pulse is insufficient and the required cell discharge is extinguished. The remarkable effect of avoiding the trouble of setting the period of the synchronization signal in accordance with the pulse train signal of the driving circuit in the above was achieved.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a block diagram of a driving circuit of the gas discharge panel according to one embodiment of the present invention.

3A and 3B are waveform diagrams for explaining a pulse train signal in the embodiment of FIG. 2, wherein FIGS. 3A and 3B are output waveforms 1 and 2 of a pulse selection circuit, respectively.

FIG. 4 is an explanatory diagram of signal selection in the embodiment of FIG. 2;

FIGS. 5A and 5B are block diagrams of a driving circuit of a conventional gas discharge panel, respectively.

6A and 6B are a signal waveform of an edge detection circuit and an output waveform of a pulse selection circuit in a conventional gas discharge panel drive circuit, respectively.

[Explanation of symbols]

 1: Storage means (waveform ROM) 2: Read start signal output means (edge detection circuit) 3: Pulse control signal output means 4: Pulse selection circuit 5: Timing coincidence detection means 41: X side driver 42: Y side driver 10: Gas discharge panel WP: Write pulse (ignition pulse) SY, SX: Sustain pulse (sustain pulse) EP: Erase pulse (arc extinguishing pulse) CP: Cancel pulse STB: Strobe signal

Continuation of front page (72) Inventor Hirohito Kuriyama 1015 Kamidadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited

Claims (2)

(57) [Claims] 1. A discharge cell in which wall charges are formed inside through an ignition pulse, the wall charges are maintained through a periodic sustain pulse, and the wall charges disappear through an arc extinguishing pulse. A gas discharge panel driving circuit of a type in which a plurality of discharge cells are displayed on the screen through selection of each pulse for each of the discharge cells, wherein one pulse train signal defining at least the pulse train including the sustain pulse is stored. A read start signal output means (2) for receiving a periodically changing synchronizing signal, and outputting a read start signal when a predetermined level change of the synchronizing signal is detected; A pulse control signal output means (3) for newly reading out and outputting the one pulse train signal from the storage means (1) every time a pulse signal is generated, and at least one pulse train signal and display data And at least a part of the read start signal and the one pulse train signal are input to the drive circuit having a pulse selection circuit (4) for receiving data and inputting each pulse for each discharge cell. A timing coincidence detecting means for outputting a timing coincidence signal when the start signal is detected to be generated while the sustain pulse is being output; and the pulse control signal output means for generating the timing coincidence signal. Then, instead of the one pulse train signal, another pulse train signal defining a sustain pulse generated at a different time from the sustain pulse defined by the one pulse train signal is output to the pulse selection circuit (4). A driving circuit for a gas discharge panel, comprising: 2. The storage means (1) stores the one pulse train signal and the another pulse train signal, and the pulse control signal output means (3) stores the one pulse train signal and the other pulse train signal. 2. The driving circuit for a gas discharge panel according to claim 1, wherein said pulse train signal is selectively read.