JP2670525B2 - Light receiving element and manufacturing method thereof - Google Patents

Description

TECHNICAL FIELD The present invention relates to a structure and a manufacturing method of a light receiving element using a III-V group compound semiconductor.

〔Overview〕

The present invention provides a light receiving element having a structure in which electrodes are arranged on one side of a substrate, and by arranging the electrodes in the same plane, it is possible to reduce irregularities on the element surface and to form an element having a fine pattern. It is a thing.

[Conventional technology]

Conventionally, Schottky barrier photodiodes and PIN photodiodes using GaAs-based semiconductors have been developed as light receiving elements for short wavelengths capable of high-speed response.

FIG. 7 is a perspective view of a conventional Schottky photodiode, and FIG. 8 is a sectional view taken along line CC.

This Schottky photodiode is a semi-insulating GaAs
An n ^{+ -type} GaAs layer 22 and an n ⁻ -type GaAs layer 23 are grown on a substrate 21, and a semitransparent Schottky electrode 24 is formed on the n ⁻ -type GaAs layer 23.
Is provided, and the n ⁻ -type GaAs layer 23 is removed except for the portion where the semitransparent Schottky electrode 24 is provided, and the ohmic electrode 25 is provided there. A dielectric film 26 is provided on the surface of the semitransparent Schottky electrode 24.

For details of the light-receiving element having this structure, see Wang et al., Electronics Letters, Vol. 19, No. 14, p. 554 (SYWang et al., Electron. Lett., 19 (14), 554 (198
3)).

FIG. 9 shows a sectional view of a conventional PIN photodiode.

This PIN photodiode consists of a semi-insulating GaAs substrate 31, an n ^{+ type} GaAs layer 32, an n type GaAs layer 33, and an intrinsic GaAs layer.
The layer 34 and the p-type GaAs layer 35 are epitaxially grown, the ohmic electrode 36 is provided in a partial region on the p-type GaAs layer 35, and the n ^{+ -type} GaAs layer 32 is provided in the portion other than the ohmic electrode 36. Expose the ohmic electrode there
37 is provided. A high-resistance region 38 is formed around the PIN photodiode by H ion implantation for insulation separation.

For details of the light receiving element having this structure, see Lens et al., Applied Physics Letters, Vol. 2, No. 15, No. 19.
Page 1 (Lenth. Et al., Appl. Phys. Lett., 2 (15), 191 (198
5)).

[Problems to be solved by the invention]

In order to improve the high-speed response of the light receiving element, it is necessary to reduce the capacitance of the element itself as much as possible. Therefore, in the above-described conventional example, elements are formed on a semi-insulating substrate. Further, electrodes (wire bonding pads, etc.) other than the elements are formed after the GaAs growth layer on the surface is removed by etching so that the portions do not have electrostatic capacitance.

However, it is difficult to form an element having a fine pattern because the surface of the GaAs growth layer is etched to form irregularities.

An object of the present invention is to solve the above problems and to provide a light receiving element having a structure in which there is no unevenness around the light receiving element.

[Means for solving the problem]

A first aspect of the present invention is a Schottky photodiode, which includes a first semiconductor layer formed on a substrate and a second semiconductor formed on the first semiconductor layer with a lower impurity concentration than this layer. Layer, a Schottky electrode forming a Schottky junction between the second semiconductor layer, and a light receiving element including an ohmic electrode ohmically connected to the first semiconductor layer. Is provided with a high impurity concentration region for electrically connecting the ohmic electrode and the first semiconductor layer, and the ohmic electrode is formed in substantially the same plane as the Schottky electrode.

A semi-insulating GaAs substrate is used as the substrate, an n ^{+ -type} GaAs layer is used as the first semiconductor layer, and an n ⁻ -type Ga is used as the second semiconductor layer.
As layer can be used.

It is desirable to provide a high resistance region from the surface to the substrate in the region where the ohmic electrode is not provided in the high impurity concentration region.

It is a second aspect of the present invention to manufacture such a light receiving element, and an n ^{+ -type} GaAs first semiconductor layer and an n ⁻ -type GaAs second semiconductor layer are formed on a semi-insulating GaAs substrate. In the method for manufacturing a light receiving element in which a Schottky electrode is formed on the second semiconductor layer by growing, a high impurity concentration region from the second semiconductor layer to the first semiconductor layer is formed by ion implantation of Si. Forming a high resistance region from the high impurity concentration region to the substrate, and forming an ohmic electrode ohmic-connected to the first semiconductor layer in the high impurity concentration region.

A third aspect of the present invention is a PIN photodiode,
A p- or n-type first semiconductor layer formed on the substrate;
A substantially intrinsic second semiconductor layer formed on the first semiconductor layer and a third semiconductor layer formed on the second semiconductor layer with a conductivity type opposite to that of the first semiconductor layer. And a first electrode and a second electrode respectively connected to the first semiconductor layer and the third semiconductor layer, and the third semiconductor layer diffuses impurities into the second semiconductor layer. The second semiconductor layer is provided with a high impurity concentration region having the same conductivity type as the first semiconductor layer and extending from the surface of the second semiconductor layer to the first semiconductor layer. In the light receiving element in which the first electrode and the second electrode are formed in substantially the same plane, a high resistance region from the surface to the substrate is formed in the region where the ohmic electrode is not provided in the high impurity concentration region. It is characterized by having.

A semi-insulating GaAs substrate is used as the substrate, an n ^{+ -type} GaAs layer is used as the first semiconductor layer, and an n ⁻ -type Ga is used as the second semiconductor layer.
An As layer can be used, and ap ^{+ -type} GaAs layer can be used as the third semiconductor layer.

A fourth aspect of the present invention is a method for manufacturing this PIN photodiode, comprising growing a first semiconductor layer of n ^{+ -type} GaAs and a second semiconductor layer of n ^--type GaAs on a semi-insulating GaAs substrate. A third semiconductor layer of p ^{+ -type} GaAs is formed on the surface of the second semiconductor layer, and a p-side ohmic electrode is formed on the third semiconductor layer. Forming a high impurity concentration region from the second semiconductor layer to the first semiconductor layer, forming a high resistance region from the high impurity concentration region to the substrate by H ion implantation, and forming the first semiconductor in the high impurity concentration region; When the n-side ohmic electrode ohmic-connected to the layer is formed and the third semiconductor layer is formed, Zn ions are implanted into the second semiconductor layer.

In this specification, “up” refers to the direction of epitaxial growth from a substrate. Further, "intrinsic" means that the impurity concentration is low enough to be handled as an intrinsic semiconductor.

[Action]

Si, Zn, H, etc. are ion-implanted into the semiconductor layer having a low impurity concentration to form an n ⁺ layer, a p ⁺ layer and a high resistance layer, respectively. Thereby, the light receiving element can be manufactured while keeping the surface flat. Since no irregularities can be formed around the light receiving element, it becomes easy to manufacture a fine element and the capacitance of the light receiving element can be reduced. Further, by forming the high resistance layer, the element can be insulated and separated, and the capacitance can be reduced.

〔Example〕

FIG. 1 is a sectional view of a light receiving element according to the first embodiment of the present invention,
FIG. 2 shows a perspective view. FIG. 1 is a sectional view taken along line AA of FIG.

In this embodiment, the present invention is applied to a Schottky photodiode. A semi-insulating GaAs substrate 1 is used as a substrate, and an n ^{+ -type} GaAs layer 2 is formed as a first semiconductor layer formed on the substrate. As a second semiconductor layer formed on the n ^{+ type} GaAs layer 2 with a lower impurity concentration than this layer, n ⁻
A Schottky electrode 4 forming a Schottky junction with the n ⁻ -type GaAs layer 3; and an ohmic electrode 5 ohmically connected to the n ^{+ -type} GaAs layer 2.

Here, the feature of this embodiment is that the n ⁻ -type GaAs layer 3
Is provided with a high impurity concentration region 6 for electrically connecting the ohmic electrode 5 and the n ^{+ -type} GaAs layer 2 to each other.
Are formed in substantially the same plane as the Schottky electrode 4. Further, a high resistance region 7 extending from the surface to the semi-insulating GaAs substrate 1 is provided in the region where the ohmic electrode is not provided in the high impurity concentration region 6.

Incident light transmitted through the Schottky electrode 4, n ^- is absorbed in the form GaAs layer 3. At this time, the electrons and holes generated near the depletion layer formed by the Schottky junction are decomposed by the electric field and drift in the opposite directions, and are taken out as a photocurrent by the ohmic electrode 5 and the Schottky electrode 4. .

Here, in order to improve the operation speed of the Schottky photodiode, the capacitance of the device itself should be made as small as possible. This capacitance is caused mainly by two causes. The first is the capacitance of the capacitor using the depletion layer formed by the Schottky junction as a dielectric, and the second is the capacitance of the electrode pad and the like. Is thickened or the bonding area is reduced. However, the maximum value of the thickness of the depletion layer is limited by the traveling time of electrons and holes. Therefore, in order to reduce the electrostatic capacitance, it is necessary to reduce the junction area of the element, and miniaturization technology is required. For example, cutoff frequency 30GHz
In the structure process of the device exceeding 0.1 μm, the patterning alignment margin becomes about 1 μm.

In the light receiving device of the present invention, the patterning surface is almost flat until the end of the manufacturing process. Therefore, finer patterning is possible as compared with an element having a step as shown in the conventional example.

In addition, the capacitance of the electrode pad and the like is extremely small because the resistance is increased by H injection in portions other than the light receiving portion and the ohmic electrode portion.

 FIG. 3 shows a method of manufacturing the device of this embodiment.

First, as shown in FIG. 3 (a), an n ^{+ -type} GaAs layer 2 having a carrier concentration of about 3 × 10 ¹⁸ cm ⁻³ is formed on a semi-insulating GaAs substrate 1.
An n ⁻ -type GaAs layer 3 having a carrier concentration of about 5 × 10 ¹⁵ cm ⁻³ is epitaxially grown.

Next, as shown in FIG. 3B, an implantation mask 10 is provided in the light receiving region (region where the Schottky junction is formed),
In other portions, Si is implanted so as to be distributed from the surface to the upper portion of the n ^{+ -type} GaAs layer 2. Further, after removing the implantation mask 10, Si activation treatment is performed to form a high impurity concentration region 6 of n ^{+ -type} GaAs.

Subsequently, as shown in FIG. 3C, H is implanted by the implantation mask 11 into a region other than the region where the ohmic electrode 5 is to be formed in the region where Si is implanted. As a result, the resistance of the n ^{+ -type} GaAs layer 2 and the n ⁻ -type GaAs layer 3 is increased to reduce the capacitance of the element and to perform insulation separation.

Thereafter, as shown in FIG. 3D, an n-type ohmic electrode 5 is formed. Further, as shown in FIG. 3E, a Schottky electrode 4 is formed.

FIG. 4 shows a sectional view of the light receiving element of the second embodiment of the present invention, and FIG. 5 shows a perspective view. FIG. 4 is a sectional view taken along the line BB in FIG.

In this embodiment, the present invention is applied to a PIN photodiode, and a semi-insulating GaAs substrate 1 is used as a substrate.
An n ^{+ -type} GaAs layer 2 is provided as a p-type or n-type first semiconductor layer formed on the substrate, and a substantially intrinsic second semiconductor formed on the n ^{+ -type} GaAs layer 2 is provided. The n ⁻ -type GaAs layer 3 is provided as a layer, the p ^{+ -type} GaAs layer 8 is provided as a third semiconductor layer on the n ⁻ -type GaAs layer 3, and the n ^{+ -type} GaAs layer 2 is provided.
Ohmic electrodes 5 and 9 are provided as a first electrode and a second electrode connected to the p ^{+ -type} GaAs layer 8, respectively.

The feature of this embodiment is that the p ^{+ type} GaAs layer 8 is formed.
The n ^- a layer obtained by diffusing impurities to form the GaAs layer 3,
The n ⁻ -type GaAs layer 3 is provided with a p-type high impurity concentration region 6 penetrating this layer, and the ohmic electrodes 5 and 9 are formed in substantially the same plane. Further, in the region where the ohmic electrode 5 is not provided in the high impurity concentration region 6, the high resistance region 7 extending from the surface to the insulating GaAs substrate 1 is formed.
Is provided.

 FIG. 6 shows a method of manufacturing the light receiving element of the second embodiment.

This manufacturing method differs from the method shown in FIG. 3 in that Zn is implanted using the implantation mask 12 in the step shown in FIG. 6 (b). By this step, Zn is selectively implanted from the surface to a depth of several tens to several hundreds nm (depth not reaching the n ^{+ type} GaAs layer 3) to form the p ^{+ type} GaAs layer 8.

Also in the case of this element, the capacitance can be made very small by implanting Si and H. Further, if the dose amount of Zn implantation is increased to increase the carrier concentration of the p ^{+ -type} GaAs layer 8,
It is possible to reduce the contact resistance of the p-type ohmic electrode 9 which is a problem in an element that operates at high speed, and improve the high-speed operability.

〔The invention's effect〕

As described above, in the light receiving element of the present invention, a step more than the step generated by the electrode formation cannot be made, and the patterning during the manufacturing process can be performed with the surface flat. Therefore, patterning can be performed relatively easily even with a pattern width of about 1 μm. In addition, since it has a structure in which a regulated capacity other than the joint portion is unlikely to occur, there is an effect that a light receiving element having a cutoff frequency of more than 30 GHz can be relatively easily manufactured.

[Brief description of the drawings]

FIG. 1 is a sectional view of a light receiving element according to the first embodiment of the present invention. FIG. 2 is a perspective view. FIG. 3 shows a manufacturing method. FIG. 4 is a sectional view of a light receiving element according to the second embodiment of the present invention. FIG. 5 is a perspective view. FIG. 6 is a diagram showing a manufacturing method. FIG. 7 is a perspective view of a conventional Schottky photodiode. FIG. 8 is a sectional view. FIG. 9 is a sectional view of a conventional PIN photodiode. 1, 21, 31 ... Semi-insulating GaAs substrate, 2, 22, 32 ... n ^{+ type}
GaAs layer, 3, 23 ...... n ^- form GaAs layer, 4 ...... Schottky electrode, 5,9,25,36,37 ...... ohmic electrode 6 ...... high impurity concentration regions, 7, 38 ...... high resistance Area, 8 …… p ^{+ type} Ga
As layer, 10, 11, 12 ... Implantation mask, 24 ... Semi-transparent Schottky electrode, 26 ... Dielectric film, 33 ... N-type GaAs layer, 34 ...
... intrinsic GaAs layer, 35 ... p-type GaAs layer.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yoichi Sekiguchi 2-11-13 Nakamachi, Musashino-shi, Tokyo Optical measurement technology development Co., Ltd. (56) Reference JP-A-60-177684 (JP, A) JP Sho 63-299163 (JP, A)

Claims (7)

(57) [Claims] 1. A first semiconductor layer (2) formed on a substrate (1), and a second semiconductor layer (3) formed on the first semiconductor layer with an impurity concentration lower than that of this layer. ), A Schottky electrode (4) forming a Schottky junction between the second semiconductor layer, and an ohmic electrode (5) ohmically connected to the first semiconductor layer. In the second semiconductor layer, a high impurity concentration region (6) for electrically connecting the ohmic electrode and the first semiconductor layer is provided, and the ohmic electrode is substantially the Schottky electrode. A light receiving element characterized by being formed in the same plane. 2. The light-receiving device according to claim 1, wherein the substrate includes a semi-insulating GaAs substrate, the first semiconductor layer includes an n ^{+ -type} GaAs layer, and the second semiconductor layer includes an n ⁻ -type GaAs layer. 3. The light-receiving element according to claim 1, wherein a high resistance region extending from the surface to the substrate is provided in a region of the high impurity concentration region where the ohmic electrode is not provided. 4. An n ^{+ -type} GaAs first semiconductor layer (2) and an n ⁻ -type GaAs second semiconductor layer (3) on a semi-insulating GaAs substrate (1).
And a step of forming a Schottky electrode (4) on the second semiconductor layer, the method comprising: forming a Schottky electrode (4) on the second semiconductor layer; Forming a high impurity concentration region (6) reaching one semiconductor layer; forming a high resistance region (7) extending from the high impurity concentration region to the substrate by H 2 ion implantation; And a step of forming an ohmic electrode (5) which is ohmic-connected to the first semiconductor layer. 5. An n-type first semiconductor layer (2) formed on a substrate (1), and a substantially intrinsic second semiconductor layer formed on the first semiconductor layer. (3), a p-type third semiconductor layer (8) formed on the second semiconductor layer, and a third semiconductor layer connected to the first semiconductor layer and the third semiconductor layer, respectively. A first electrode (5) and a second electrode (9), wherein the third semiconductor layer is a layer obtained by diffusing impurities into the second semiconductor layer, and the second semiconductor layer A high impurity concentration region (6) of the same conductivity type as that of the first semiconductor layer and extending from the surface of the second semiconductor layer to the first semiconductor layer; In the light receiving element formed in substantially the same plane as the electrode of, the ohmic electrode in the high impurity concentration region In a region not provided, the high-resistance region extending from the surface to the substrate (7)
A light-receiving element characterized by comprising. 6. The substrate includes a semi-insulating GaAs substrate, the first semiconductor layer includes an n ^{+ -type} GaAs layer, the second semiconductor layer includes an n ⁻ -type GaAs layer, and the third semiconductor layer is p. The light-receiving element according to claim 5, including a ^{+ -type} GaAs layer. 7. An n ^{+ -type} GaAs first semiconductor layer (2) and an n ⁻ -type GaAs second semiconductor layer (3) on a semi-insulating GaAs substrate (1).
Forming a third semiconductor layer (8) of p ^{+ -type} GaAs on the surface of the second semiconductor layer; and forming a p-side ohmic on the third semiconductor layer. A step of forming an electrode (9); and a step of forming a high impurity concentration region (6) from the second semiconductor layer to the first semiconductor layer by Si ion implantation in a method of manufacturing a light receiving element including: Forming a high resistance region (7) from the high impurity concentration region to the substrate by ion implantation of H; and an n-side ohmic electrode (Ohmic electrode) which is ohmic-connected to the first semiconductor layer in the high impurity concentration region. 5) is formed, and the p layer forming step includes a step of implanting Zn ions into the second semiconductor layer.