JP2674872B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2674872B2 JP2674872B2 JP2282483A JP28248390A JP2674872B2 JP 2674872 B2 JP2674872 B2 JP 2674872B2 JP 2282483 A JP2282483 A JP 2282483A JP 28248390 A JP28248390 A JP 28248390A JP 2674872 B2 JP2674872 B2 JP 2674872B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring
- dummy
- wirings
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 239000011229 interlayer Substances 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 16
- 229910052782 aluminium Inorganic materials 0.000 description 16
- 238000006073 displacement reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置に関し、特に、微細化パターン
を必要とする半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device that requires a miniaturized pattern.
従来の半導体装置は、第２図に示すように、長いアル
ミニウム配線１−1,…の下方に図示しない層間絶縁膜を
介してポリシリコン膜２−1,…を設け、コンタクト孔５
−1,…部でアルミニウム配線とポリシリコン膜を接続す
ることにより、モールド封入時の応力による、アルミニ
ウム配線のずれ，切れ，短絡の防止を図っていた。In the conventional semiconductor device, as shown in FIG. 2, polysilicon films 2-1, ... Are provided below long aluminum wirings 1-1 ,.
By connecting the aluminum wiring to the polysilicon film at the -1, ... parts, the aluminum wiring was prevented from being displaced, cut, or short-circuited due to the stress during molding.
この従来の半導体装置では、モールド封入時の圧力に
よるアルミニウム配線のずれ，切れ，もしくは短絡防止
の目的で下部にポリシリコン膜を配置しコンタクトをと
っているため、その部分で幅が広くなるため、アルミニ
ウム配線間隔を狭くする上で障害となり、最小寸法間隔
パターンの実現ができないという問題点があった。In this conventional semiconductor device, since a polysilicon film is arranged in the lower part for the purpose of preventing displacement, breakage, or short circuit of the aluminum wiring due to the pressure at the time of encapsulating the mold, the width is widened at that part. There is a problem in that it is difficult to realize the minimum dimensional spacing pattern because it becomes an obstacle in narrowing the aluminum wiring spacing.
〔課題を解決するための手段〕 本発明の半導体装置は、基板上に所定間隔をもって配
置された複数のダミー配線と、前記ダミー配線の設けら
れた基板を被覆し前記ダミー配線に対応した凸部を有す
る層間絶縁膜と、２つの隣接する前記凸部で挟まれて前
記層間絶縁膜を選択的に被覆する配線とを有していると
いうものである。[Means for Solving the Problems] A semiconductor device according to the present invention is configured such that a plurality of dummy wirings arranged at a predetermined interval on a substrate and a convex portion corresponding to the dummy wirings that covers the substrate provided with the dummy wirings. And an interconnect that is sandwiched between the two adjacent convex portions and selectively covers the interlayer insulating film.
次に本発明について、図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図（ａ）は本発明の一実施例の半導体装置の平面
図、第１図（ｂ）は第１図（ａ）のＸ−Ｘ線断面図であ
る。FIG. 1 (a) is a plan view of a semiconductor device according to an embodiment of the present invention, and FIG. 1 (b) is a sectional view taken along line XX of FIG. 1 (a).
半導体基板に素子などを形成したものを基板４とし、
その上にポリシリコン膜からなるダミー配線３−1,3−2
1,…が設けらている。更に層間絶縁膜６を介してアルミ
ニウム配線１−1,1−2,…が設けられている。そうし
て、ダミー配線は、隣接するアルミニウム配線の間の領
域の下方に配置されている。又、ダミー配線間の層間絶
縁膜の凹部にアルミニウム配線がきている。The substrate 4 is a semiconductor substrate on which elements and the like are formed,
Dummy wiring 3-1 and 3-2 made of polysilicon film
1, ... are provided. Further, aluminum wirings 1-1, 1-2, ... Are provided via an interlayer insulating film 6. Then, the dummy wiring is arranged below the region between the adjacent aluminum wirings. Further, aluminum wiring is provided in the recess of the interlayer insulating film between the dummy wirings.
従来例のようにポリシリコン膜とのコンタクト領域を
持っていないため、アルミニウム配線とアルミニウム配
線の間隔を、最小寸法とすることができる。Since it does not have a contact region with the polysilicon film as in the conventional example, the distance between the aluminum wirings can be minimized.
また、アルミニウム配線が層間絶縁膜の凸部によって
挟まれているので、モールド封入時の応力に強くなって
おり、モールド封入時の応力におけるアルミニウム配線
のずれ，切れ，あるいは短絡を防止できる。Further, since the aluminum wiring is sandwiched by the convex portions of the interlayer insulating film, the aluminum wiring is resistant to the stress when the mold is encapsulated, and the displacement, breakage, or short circuit of the aluminum wiring due to the stress when the mold is encapsulated can be prevented.
以上説明したように本発明は、ダミー配線を隣接する
アルミニウム配線の間の領域の下方に設けることによ
り、アルミニウム配線間隔を最小寸法にし、かつモール
ド封入時における応力によるアルミニウム配線のずれ，
切れあるいは短絡を防止し、かつ最小寸法間隔パターン
を実現できるという効果を有する。As described above, according to the present invention, by providing the dummy wiring below the region between the adjacent aluminum wirings, the distance between the aluminum wirings is minimized, and the displacement of the aluminum wiring due to the stress at the time of encapsulating the mold,
This has the effect of preventing disconnection or short circuit and realizing a minimum dimensional interval pattern.
第１図（ａ）は本発明の一実施例の平面図、第１図
（ｂ）は第１図（ａ）のＸ−Ｘ線断面図、第２図は従来
例の平面図である。 H,1−2,1−3,1−４……アルミニウム配線、２−1,2−2,
2−３……ポリシリコン膜、３−1,3−21,3−22,…，…
…ダミー配線、４……基板、５−1,5−2,5−３……コン
タクト孔、６……層間絶縁膜。1 (a) is a plan view of an embodiment of the present invention, FIG. 1 (b) is a sectional view taken along line XX of FIG. 1 (a), and FIG. 2 is a plan view of a conventional example. H, 1-2, 1-3, 1-4 ... Aluminum wiring, 2-1, 2-2,
2-3 ... Polysilicon film, 3-1, 3-21, 3-22, ...
… Dummy wiring, 4 …… Substrate, 5-1,5-2,5-3 …… Contact hole, 6 …… Interlayer insulating film.
Claims (3)
のダミー配線と、前記ダミー配線の設けられた基板を被
覆し前記ダミー配線に対応した凸部を有する層間絶縁膜
と、２つの隣接する前記凸部で挟まれて前記層間絶縁膜
を選択的に被覆する配線を有していることを特徴とする
半導体装置。1. A plurality of dummy wirings arranged on a substrate at a predetermined interval, an interlayer insulating film covering a substrate provided with the dummy wirings and having a convex portion corresponding to the dummy wirings, and two adjacent wirings. A semiconductor device having wiring that is sandwiched between the convex portions and selectively covers the interlayer insulating film.
１記載の半導体装置。2. The semiconductor device according to claim 1, wherein the dummy wiring is made of a polysilicon film.
１又は２記載の半導体装置。3. The semiconductor device according to claim 1, wherein the wiring is insulated from the dummy wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2282483A JP2674872B2 (en) | 1990-10-19 | 1990-10-19 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2282483A JP2674872B2 (en) | 1990-10-19 | 1990-10-19 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04155926A JPH04155926A (en) | 1992-05-28 |
| JP2674872B2 true JP2674872B2 (en) | 1997-11-12 |
Family
ID=17653027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2282483A Expired - Lifetime JP2674872B2 (en) | 1990-10-19 | 1990-10-19 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2674872B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63240045A (en) * | 1987-03-27 | 1988-10-05 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JPH0713962B2 (en) * | 1987-10-21 | 1995-02-15 | 日本電気株式会社 | Semiconductor device having multilayer wiring structure |
-
1990
- 1990-10-19 JP JP2282483A patent/JP2674872B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04155926A (en) | 1992-05-28 |
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