JP2675155B2 - Amplitude equalization circuit and reproducing apparatus including the equalization circuit - Google Patents

Description

The present invention relates to an amplitude equalization circuit for correcting the frequency characteristic of a signal reproduced from a recording medium and a reproducing apparatus using the equalization circuit.

[Conventional technology]

The conventional device has a proportional constant k and ω ₃ <ω ₁ <ω ₄ , ω ₃ <ω ₂ <ω _{4 as} disclosed in Japanese Patent Laid-Open No. 64-49309.
By the angular frequencies ω ₁ , ω ₂ , ω ₃ and ω _{4 of the} relation However, it had the transfer characteristic H (S) defined by the equation S = jω.

That is, the above characteristics are frequency Is flat, from frequency ₃ to frequency Up to -6 dB / octave, decreasing from frequency ₁ to frequency Until flat again, from frequency ₂ to frequency Has an amplitude characteristic of rising +6 dB / octave on the contrary, returning to a flat shape at frequencies of _{4 and} above, correcting the differential characteristics of the reproducing head from frequencies ₃ to ₁ and from frequencies ₂ to ₄ It corrects high frequency components that are attenuated by various factors such as loss.

[Problems to be solved by the invention]

However, even if the above-mentioned conventional technique is suitable for recording and reproducing a digital signal in the base band as in R-DAT, for example, the present inventors have previously disclosed the Japanese Patent Laid-Open No. 63-1714.
As in the recording / reproducing apparatus proposed in No. 02, there is a problem in the case of modulating a digital signal in a carrier band and superimposing and recording on the video signal and a dedicated head respectively.

The apparatus proposed in Japanese Patent Laid-Open No. 63-171402 described above records and reproduces FM audio signals, PCM audio signals and video signals in the above order by using dedicated heads having different azimuth angles, respectively. In order to avoid interference with the color signal of the image, the signal is not phase-band-recorded as in R-DAT but is phase-phase modulated and recorded in the carrier band. Therefore, since the recording is not performed in the low frequency region where the differential characteristic of the reproducing head is visible, the correction is not necessary and, on the contrary, there is a problem that the interference from the color signal to the PCM audio signal is promoted.

Further, the reproduction frequency characteristic of the PCM audio signal is remarkably deteriorated because it is overwritten and erased by the video signal. Therefore, there is a problem that the + dB / octave rise characteristic cannot be completely corrected.

The object of the present invention is to solve the above-mentioned problems and to provide an amplitude equalization circuit having a flat rising characteristic outside the required equalization band and a steep rise characteristic within the required equalization band and a reproduction using the equalization circuit. To provide a device.

[Means for solving the problem]

In order to achieve the above object, the amplitude equalization circuit according to the present invention has a proportional constant k and angular frequencies ω ₁ , ω ₂ , ω ₃ and ω ₄ having a relation of ω ₁ <ω ₂ , ω ₃ <ω _4. Due to Has a transfer characteristic H (S) defined by
₁ and ω ₃ , and ω ₂ and ω ₄ are set to be substantially equal.

 That is, the above equation (2) is expressed as follows.

[Operation] The characteristic shown by the above equation (3) is Is flat, from frequency ₁ to frequency Up to + 12dB / octave, it has amplitude characteristics that frequency _{2 and} above returns to flat again. Therefore,
Set frequency ₁ near the lower limit of the required equalization band, and
By setting ₂ near the upper limit of the required equalization band,
It is possible to suppress the interference from the color signal of the image and sufficiently perform the original purpose of correcting the frequency characteristic.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an amplitude equalizing circuit according to the present invention, in which 1 is an input terminal, 2 is an output terminal, and 100 is an output terminal.
Is a proportional constant _{K, T 1> T 2,} T 3> constant T ₁ when T ₄ the relationship,
With T ₂ , T ₃ and T ₄ , The equalization circuit has a transfer characteristic H (S) defined by the following equation. Here, the feature of the present invention is that the time constants T ₁ and T ₃ , T ₂ and T ₄ are approximately equal, and the polarity of the time constant T ₃ is negative. As a result, the above equation ((4) is expressed as follows.

Incidentally, the above equations (4) and (5) and the above-mentioned (2) and (3)
The relationship with the formula is as follows.

The operation of this embodiment will be described below with reference to FIG.

FIG. 2 is a diagram showing frequency characteristics of the equalization circuit 100 having the transfer characteristic H (S) expressed by the equation (5). (A) is frequency vs. amplitude characteristics, (b) is frequency vs. group delay characteristics. Indicates.
First, the amplitude characteristic of (a) is
₁ and below, the frequency of _two or more bands in the flat charge of from ₁
It rises with a slope of +12 dB / octave between ₂ . Therefore, make sure that the required equalization band is between ₁ and ₂ , ₁
And ₂ should be set.

Next, as shown in FIG. 2 (b), the group delay characteristic is flat up to around frequency ₂ . In digital transmission, not only the amplitude characteristic but also the phase characteristic, in other words, the group delay characteristic is an important characteristic, and it is desirable that the group delay characteristic is flat. Therefore, if the group delay characteristic is deteriorated because the amplitude characteristic is corrected, it is impossible to know what the equalization is for. Especially when trying to perform amplitude equalization with a slope of +12 dB / octave as in the present invention, the equalization of the group delay characteristic becomes an important issue.

Therefore, in the present invention, as described above, by making the characteristic of the time constant T ₃ negative, the group delay characteristic is flattened.

That is, the transfer characteristic H (S) shown in the equations (4) and (5).
The group delay characteristic τ (ω) in is expressed by the following equation.

Then, by making the time constants T ₁ and T ₃ equal and reversing their polarities, the group delay characteristics due to T ₁ and T ₂ are canceled out, and flattening is achieved.

FIG. 3 is a block diagram showing another embodiment of the amplitude equalization circuit according to the present invention, in which the equalization circuit 100 includes a proportional constant K ₁ and a T
_By the time constants T ₁ and T _{2 of the} relation ₁ > T ₂ , By the first equalization circuit 10 having the transfer characteristic H ₁ (S) defined by the following equation, the proportional constant K _2, and the time constants T ₃ and T _{4 in the} relation of T ₃ > T ₄ , The second equalization circuit 20 has a transfer characteristic H ₂ (S) defined by the following equation. The time constant T ₁
It is similar to the embodiment of FIG. 1 that T ₃ , T ₂ and T ₄ are made approximately equal and the characteristic of the time constant T ₃ is negative.

From this, the total transfer characteristic H of the equalization circuit 100 is
(S) is H (S) = H ₁ (S) · H ₂ (S) When K = K ₁ · K ₂ (13), the equations (4) and (5) are the same.
That is, also in this embodiment, the amplitude characteristic and the group delay characteristic shown in FIG. 2 are obtained, the group delay characteristic is flat, and +12 dB /
Octave amplitude equalization is achieved.

FIG. 4 is a circuit diagram showing a specific example of the embodiment shown in FIG. 3, in which the first equalizing circuit 10 is composed of resistors 11 and 13, a capacitor 12 and a buffer amplifier 14, Equalization circuit
20 to resistors 21, 22 and 24, capacitor 23, differential amplifier 2
It is composed of 5.

Here, the resistance values of the resistors 11 and 13 are R ₁₁ and R ₁₃ , the capacitance value of the capacitor 12 is C ₁₂ , and the buffer amplifier 1
Assuming that the amplification factor of 4 is A ₁₄ , the transfer characteristic of the first equalization circuit 10
H ₁ (S) is expressed by the following equation.

T ₁ = C ₁₂ · R ₁₁ … (15b) Therefore, the equation (14) is the same as the equation (9).

In addition, the resistance values of the resistors 21, 22 and 24 can be changed to R ₂₁ , R ₂₂ and R
₂₄ , the capacitance value of the capacitor 23 is C ₂₃ , and the differential amplifier 2
If the amplification degree of 5 is A ₂₅ , the transfer characteristic of the second equalization circuit 20
H ₂ (S) is Represented by Therefore, equation (16) is the same as equation (10).

Then, to make T ₁ T ₃ and T ₂ T ₄ , for example, C ₂₃ = C ₁₂ (18a) What is necessary is just to set it.

FIG. 5 is a circuit diagram showing another specific example of the amplitude equalization circuit according to the present invention. The first equalization circuit 10 and the second equalization circuit 20 are active circuits using operational amplifiers 18 and 26, respectively. It is configured.

Here, assuming that the resistance values of the resistors 15 and 17 are R ₁₅ and R ₁₇ , the capacitance value of the capacitor 16 is C ₁₆ , and the operational amplifier 18 is an ideal amplifier, the transfer characteristic of the first equalization circuit 10 is assumed.
H ₁ (S) is And the transfer characteristic H of the second equalization circuit 20.
₂ (S), assuming that the operational amplifier 26 is an ideal amplifier, It is expressed as Therefore, K ₁ = 1 (21a) T ₁ = C ₁₆ (R ₁₅ + R ₁₇ ) (21b) In other words, the equation (19) is the same as the equation (9) and the equation (20) is the same as the equation (10), and the equalization characteristic described above is achieved.

In addition, C ₂₃ = C ₁₆ (23a) R ₂₄ R ₁₇ (23b) Then, T ₁ T ₃ and T ₂ T ₄ can be set.

In the embodiment of FIG. 5, the order of the first equalizing circuit 10 and the second equalizing circuit 20 is reversed from that of the embodiments of FIGS. 3 and 4, but the overall transfer characteristics are the same. Therefore, it goes without saying that the function of amplitude equalization does not change at all.

FIG. 6 is a block diagram showing another embodiment of the amplitude equalizing circuit according to the present invention. 3 is an input terminal, 4 is an output terminal, and 30 is an output terminal.
Reference numerals 40 and 40 denote a low pass filter (LPF), and reference numeral 150 denotes an amplitude equalizing circuit of this embodiment. LPF30 and
40 is for attenuating unnecessary noise components outside the required equalization band, and its cutoff frequency is higher than the upper limit of the required equalization band and corresponds to the time constant T _2. It is set in the vicinity.

FIG. 7 is a diagram showing frequency-amplitude characteristics of the amplitude equalization circuit 150 shown in FIG. Thus, the S / N is improved by attenuating unnecessary noise components outside the necessary equalization band by the LPFs 30 and 40.

Although the LPF is inserted before and after the amplitude equalization circuit 100 in the embodiment shown in FIG. 6, the present invention is not limited to this, and may be configured only in the front stage or only in the later stage. Needless to say.

FIG. 8 is a circuit diagram showing a specific example of the embodiment shown in FIG. In FIG. 8, 5 is an output terminal, and LPF3
0 is composed of resistors 31 and 32, capacitors 33, 34, 36 and 37, and amplifier 35, and the first equalization circuit 10 is composed of resistors 11, 13 and 62, capacitors 12, 61 and 63, and transistor 19, The second equalization circuit 20 is composed of resistors 21, 22 and 24, capacitors 23, 27 and 28, and an amplifier 29, and the LPF 40 is composed of resistors 41, 42 and 46, capacitors 43 and 44, and a transistor 45. For example, 50 is a single power source of + 5V, 51 and 54 are resistors, 52 is a variable resistor, 53 is a transistor, and 55 is a capacitor.

Capacitors 36, 37, 61, 63, 27, 28, and 55 are coupling capacitors having a large capacitance value that can be regarded as an AC short circuit at least in a frequency equal to or higher than the required equalization band. Amplifier 35
And 29 are operated by a single power source, and their input / output terminals each have a predetermined bias voltage. Transistor 19,
45 and 53 are resistors 62 and 46 that determine the bias current, respectively.
And 54 form an emitter follower type output circuit.

Therefore, LPF30 and 40 are both well known 2
Next active LPF, first and second equalization circuit 1
0 and 20 are basically equivalent to the circuit shown in FIG. Thus, in this embodiment, the LPF3 operates with a single power source.
Since 0 and 40 use active filters that do not use inductance, they are effective in reducing costs. Further, as the output of the LPF 40, an output signal is taken out from the collector of the transistor 45 in a constant current drive format. Thereby, the output level adjustment by the resistor 51 and the variable resistor 52 and the output circuit by the transistor 53 and the resistor 54 can be directly connected, and the circuit is rationalized.

Also in this embodiment, the time constants T ₁ and T ₃ and T ₂ and T ₄ are made substantially equal to each other, the cutoff frequencies of the LPFs 30 and 40 are higher than the upper limit of the required equalization band, and the frequency ₂ corresponding to the time constant T ₂ is set. Needless to say, it should be set close to.

FIG. 9 is a block diagram showing an embodiment of a reproducing apparatus according to the present invention, 101 is a magnetic tape, 102 is a magnetic head, and 10 is a magnetic head.
3 is an amplifier circuit, 104 is a demodulation circuit, and 105 is an output terminal. An information signal is recorded on the magnetic tape 101 using a predetermined modulation method suitable for the recording medium.
At 102, the modulated and recorded information signal is reproduced, and the amplifier circuit 1
Amplify to the specified level with 03. The output signal of the amplifier circuit 103 is greatly attenuated in the high frequency component due to various factors such as the loss of the magnetic tape 101 and the magnetic head 102. Therefore, the above-described amplitude equalization circuit 150 according to the present invention performs equalization so as to compensate for the above high frequency component, and the demodulation circuit 104 restores the original information signal and outputs it from the output terminal 105.

As described above, in the present embodiment, even under the condition that the recording / reproducing characteristics of the magnetic tape 101 and the magnetic head 102 are deteriorated rapidly in the high frequency range, it can be corrected with the inclination of +12 dB / octave. As a result, there is an effect that the reliability of the information signal after demodulation is improved.

FIG. 10 is a block diagram showing another embodiment of the reproducing apparatus according to the present invention shown in FIG.
The amplitude equalization circuit according to the present invention is applied to the reproducing section of the recording / reproducing apparatus proposed in No. 171402.

In FIG. 10, 201 is a magnetic tape on which FM audio signals, PCM audio signals and video signals are recorded in a predetermined track, 202 is a rotary cylinder, and 203a, 203b, 204a, 204b, 205a and 205b are rotary cylinders 202. A magnetic head is attached, F indicates the running direction of the magnetic tape 201, and R indicates the rotating direction of the rotary cylinder 202.

The FM audio signal recorded in the deep magnetic layer of the magnetic tape 201 is reproduced by the magnetic heads 203a and 203b, amplified by the amplifier circuit 211, and input to the FM audio reproduction processing circuit 212. The FM audio processing circuit 212 demodulates the FM-modulated audio signal and outputs the demodulated 2-channel audio signal to the output terminals 213L, 2 respectively.
Output from 14R.

The video signal recorded on the surface layer of the magnetic layer of the magnetic tape 201 is reproduced by the magnetic heads 205a and 205b, amplified by the amplifier circuit 231, and input to the video reproduction processing circuit 232. The video reproduction processing circuit 232 converts the FM-modulated luminance signal and the low-frequency-converted color signal into the original luminance signal and color signal, respectively, and synthesizes them to output from the output terminal 233.

The above is the playback unit of the so-called "HiFi VTR".

On the other hand, P recorded on the magnetic layer middle layer portion of the magnetic tape 201
The CM audio signal is reproduced by the magnetic heads 204a and 204b, amplified by the amplifier circuit 221, and input to the amplitude equalization circuit 150 according to the present invention. In the amplitude equalization circuit 150, the high frequency component is largely erased and attenuated by the video signal recorded over the surface layer.
As described above, the PCM audio signal is amplitude-equalized with a tilt of +12 dB / octave. Next, O-QPSK (Offset Quadrature
Phase shift keying) Demodulate in the demodulation circuit 222, perform error correction processing in the digital signal processing circuit 223, perform digital-analog conversion in the DA converter 224, and output the reproduced two-channel audio signals to the output terminals 225L and 225R, respectively. Output more.

As described above, in the present embodiment, even if the reproduction frequency characteristic is significantly deteriorated due to the overwriting and deletion of the video signal, it can be corrected, and as a result, the demodulated PC
The reliability of the M voice signal, in other words, the code error rate characteristic can be improved.

[Effect of the Invention] According to the present invention, the outside of the required equalization band is flat, and within the required equalization band, there is an amplitude characteristic that rises sharply at +12 dB / octave, and a flat group delay characteristic is obtained. It is possible to realize an amplitude equalizing circuit that has, and it is possible to sufficiently correct even a signal having a bad frequency characteristic that is rapidly attenuated in a high frequency range.

[Brief description of the drawings]

1 is a block diagram showing an embodiment of an amplitude equalizing circuit according to the present invention, FIG. 2 is a diagram showing frequency characteristics of the embodiment shown in FIG. 1, and FIG. 3 is another example of an amplitude equalizing circuit according to the present invention. FIG. 4 is a block diagram showing an embodiment of FIG. 4, FIG. 4 is a circuit diagram showing one concrete example of the embodiment of FIG. 3, FIG. 5 is a circuit diagram showing another concrete example of the embodiment of FIG. 3, and FIG. Is a block diagram showing another embodiment of the amplitude equalizing circuit according to the present invention, FIG. 7 is a diagram showing frequency characteristics of the embodiment of FIG. 6, and FIG. 8 is a specific example of the embodiment of FIG. 9 is a block diagram showing an embodiment of a reproducing apparatus according to the present invention, and FIG. 10 is a block diagram showing another embodiment of the reproducing apparatus according to the present invention. Explanation of symbols 10 …… First equalizer circuit, 11,13 …… Resistance, 12 …… Capacitor, 14 …… Buffer amplifier, 20 …… Second equalizer circuit, 21,22,24 …… Resistance, 23 ... Capacitor, 25 ... Differential amplifier, 30,40 ... LPF, 100, 150 ... Amplitude equalization circuit.

Claims (20)

(57) [Claims] 1. A proportional constant (K) and a first time constant (T ₁ )
And a second time constant (T ₂ ) smaller than the first time constant
And a third time constant (T ₃ ) and a fourth time constant (T ₄ ) smaller than the third time constant, It has a transfer characteristic (H ₂ (S)) defined by the following equation, and the first time constant (T ₁ ) and the third time constant (T ₃ ) are substantially equal to each other. An amplitude equalization circuit characterized by the above. 2. The amplitude equalization circuit according to claim 1, wherein the second time constant (T ₂ ) and the fourth time constant (T ₄ ) are selected to be substantially equal to each other. 3. A proportional constant (K) and a first time constant (T ₁ )
And a second time constant (T ₂ ) smaller than the first time constant
And a third time constant (T ₃ ) approximately equal to the first time constant
And a fourth time constant (T ₄ ) approximately equal to the second time constant
And by A circuit having a transfer characteristic (H (S)) defined by the following equation and a reduction filter, and the cutoff frequency (fc) of the reduction filter corresponds to the _second time constant (T ₂ ). 2 frequencies An amplitude equalization circuit characterized by being set to the following values. 4. A first proportional constant (K ₁ ), a first time constant (T ₁ ), and a second time constant (T ₂ ) smaller than the first time constant, A first circuit having a _first transfer characteristic (H ₁ (S)) defined by the following equation, a second proportional constant (K ₂ ), a third time constant (T ₃ ), and With the fourth time constant (T ₄ ) which is smaller than the time constant of 3, And a second circuit having a _second transfer characteristic (H ₂ (S)) defined by the following equation, and the first time constant (T ₁ ) and the third time constant (T ₃ ) are approximately An amplitude equalization circuit characterized by being selected equally. 5. The amplitude equalizing circuit according to claim 4, wherein the time constant (T ₂ ) of the second term and the fourth time constant (T ₄ ) are selected to be substantially equal to each other. 6. A first proportional constant (K ₁ ), a first time constant (T ₁ ), and a second time constant (T ₂ ) smaller than the first time constant, A first circuit having a _first transfer characteristic (H ₁ (S)) defined by the following equation, a second proportional constant (K ₂ ), and a third time approximately equal to the first time constant. By the constant (T ₃ ) and the fourth time constant (T ₄ ) which is approximately equal to the second time constant, A second circuit having a _second transfer characteristic (H ₂ (S)) defined by the following equation and a reduction filter, and the cutoff frequency (f _C ) of the reduction filter is equal to the second time constant. Corresponding second frequency An amplitude equalization circuit characterized by being set to the following values. 7. A first proportional constant (K ₁ ), a first time constant (T ₁ ), and a second time constant (T ₂ ) smaller than the first time constant, A first circuit having a _first transfer characteristic (H ₁ (S)) defined by the following equation, a second proportional constant (K ₂ ), and a third time approximately equal to the first time constant. By the constant (T ₃ ) and the fourth time constant (T ₄ ) which is approximately equal to the second time constant, A second circuit having a _second transmission and characteristic (H ₂ (S)) defined by the following equation and first and second reduction filters, and the cutoff frequency (f _C1 ) Is a second frequency corresponding to the second time constant A fourth frequency that is set to the following value and the cutoff frequency (f _C2 ) of the second reduction filter corresponds to the fourth time constant. An amplitude matching circuit characterized by being set to the following values. 8. The second circuit comprises: A third circuit having a _third transfer characteristic (H ₃ (S)) defined by A fourth circuit having a _fourth transfer characteristic (H ₄ (S)) defined by the following equation, and a subtraction circuit for subtracting the output signals of the third and fourth circuits. The amplitude equalization circuit according to claim 4. 9. The amplitude equalization circuit according to claim 8, further comprising a differential amplifier circuit in place of the subtraction circuit. 10. The second circuit comprises: A third circuit having a _third transfer characteristic (H ₃ (S)) defined by A fourth circuit having a _fourth transfer characteristic (H ₄ (S)) defined by the following equation, and a subtraction circuit for subtracting the output signals of the third and fourth circuits: The amplitude equalizing circuit according to claim 5, wherein 11. The amplitude equalization circuit according to claim 10, wherein:
An amplitude equalization circuit comprising the subtraction circuit. 12. The second circuit comprises: A third circuit having a _third transfer characteristic (H ₃ (S)) defined by A fourth circuit having a _fourth transfer characteristic (H ₄ (S)) defined by the following equation, and a subtraction circuit for subtracting the output signals of the third and fourth circuits: The amplitude equalizing circuit according to claim 6, 13. The amplitude equalization circuit according to claim 12, wherein:
An amplitude equalization circuit comprising a differential amplifier circuit in place of the subtraction circuit. 14. The second circuit comprises: A third circuit having a _third transfer characteristic (H ₃ (S)) defined by A fourth circuit having a _fourth transfer characteristic (H ₄ (S)) defined by the following equation, and a subtraction circuit for subtracting the output signals of the third and fourth circuits: The amplitude equalization circuit according to claim 7. 15. The amplitude equalization circuit according to claim 14,
An amplitude equalization circuit comprising a differential amplifier circuit in place of the subtraction circuit. 16. The amplitude equalization according to claim 3, wherein the means for reproducing the signal recorded on the recording medium, the circuit for amplifying the output signal of the reproducing means, and the frequency characteristic of the output signal of the amplifier circuit are corrected. A reproducing apparatus comprising: a circuit; and a circuit for demodulating an output signal of the amplitude equalization circuit. 17. The recording medium is a magnetic recording medium, and the reproducing means is a magnetic head.
Reproduction device described in 16. 18. The magnetic recording medium is a magnetic tape,
18. The reproducing apparatus according to claim 17, wherein the magnetic head is a magnetic head attached to a rotary cylinder. 19. A magnetic tape in which a video signal consisting of a frequency-modulated luminance signal and a low-frequency-converted color signal and a four-phase phase-modulated digital audio signal are recorded on a predetermined track in an overlapping manner. An apparatus for reproducing, a first magnetic head group for reproducing the digital audio signal, and a first magnetic head group for amplifying a reproduction output signal of the first magnetic head group.
And the amplitude equalization circuit according to any one of claims 1 to 15 for correcting the frequency characteristic of the output signal of the first amplification circuit, and the output of the amplitude equalization circuit. A first reproduction processing circuit for demodulating the signal, performing error correction processing, and reproducing the original audio signal by digital-analog conversion; a second magnetic head group for reproducing the video signal; Second for amplifying the reproduction output signal of the magnetic head group of
And a second reproduction processing circuit that demodulates the output signal of the second amplification circuit and restores the original luminance signal and chrominance signal. 20. A video signal comprising a frequency-modulated luminance signal and a low-frequency-converted color signal, a frequency-modulated first audio signal, analog-digital conversion, and further four-phase phase modulation. A device for reproducing a magnetic tape in which a second audio signal and a second audio signal are recorded on a predetermined track, the first magnetic head group reproducing the first audio signal, and the first magnetic head group. For amplifying the reproduction output signal of the first
An amplifier circuit, a first reproduction processing circuit that demodulates the output signal of the first amplifier circuit and converts it into an original audio signal, a second magnetic head group that reproduces the second audio signal, A second amplifier for amplifying the reproduction output signal of the second magnetic head group
And the amplitude equalization circuit according to any one of claims 1 to 15 for correcting the frequency characteristic of the output signal of the second amplification circuit, and the output of the amplitude equalization circuit. A second reproduction processing circuit for demodulating the signal, performing error correction processing, and reproducing the original audio signal by digital-analog conversion; a third magnetic head group for reproducing the video signal; For amplifying the reproduction output signal of the magnetic head group of
And a third reproduction processing circuit that demodulates the output signal of the third amplification circuit and restores the original luminance signal and chrominance signal.