JP2676382B2 - Scanning oscilloscope - Google Patents

Description

The present invention relates to automation of a scanning time setting operation in a scanning oscilloscope.

The scanning oscilloscope in the present invention is a generic term for an oscilloscope having a function of ending one operation by scanning. That is, basically, the sweep operation is 2 in one scan.
It is an oscilloscope that is used more than once. However, there are various embodiments in practice, and generally the operation is completed by one sweep operation, that is, it has a function of an ordinary oscilloscope. In addition, for the method of repeating the sweep two or more times (this operation is also referred to as scanning), the sweep bright line displayed by this sweep operation is also called the scan line.
There is a basic scanning method. Here, SWEEP is used to mean a method in which each scanning line starts sweeping and repeats scanning by the arrival of a trigger signal of each scanning line, and does not mean sweeping of a general single-sweep emission line oscilloscope.
SCAN means that the first scan line that starts scanning is activated and swept by an incoming trigger signal, and the second and subsequent scan lines are swept regardless of the incoming trigger signal. Immediately after completion, the next sweep is repeated. When the sweep of the set number of scanning lines is completed, one scan is completed,
Hereinafter, they are used to mean a method of repeating the same operation, and these are merely used for clarifying the description of the present invention, and are not intended to be specified. Further, although various methods of inputting a trigger signal to each scanning line have been proposed, a case where the SCAN operation is performed by the arrival of a trigger signal having one waveform will be described here. Furthermore, in order to stabilize the scan repetition time in SCAN, a method of controlling the sweep length and a method of controlling the start-up sweep of each scan line by a time-controlled trigger signal have been proposed. The number of pulses having a stable frequency is counted and controlled by the set count value, and the setting operation of the scanning time is basically the same. Therefore, the former case will be described in the description of the present invention. The former is called the sweep length control method and the latter is called the trigger signal control method. Here, the scanning time means the time for repeating the sweep, but it may also mean the time from the start to the end of one scanning operation. The numerical control of the scanning time makes it possible to obtain a stable scanning time surface even when the number of scanning lines is increased or when partial enlargement is performed. In SWEEP, each scan line is swept by the trigger signal of the observed waveform, so there is no continuity in the display time, so stabilization of the scan time is meaningless.
It is about SCAN. The counter always outputs the pulse of the set numerical value, clears the counter at the same time when the trigger of the first scanning line is activated, starts counting from 0, and finishes counting the set count value Clear and repeat. By this method, the counting pulse and the trigger signal are synchronized. In the sweep length control method, when the sweep waveform is formed up to a certain potential (usually the potential corresponding to the horizontal display width), the counting pulse stops the shaping operation at that potential and restores the sweep waveform, and after a certain time (Hold-off period, etc.) Immediately when the next sweep is performed by self-excitation or by an end pulse for a certain period of time, etc., it is superimposed on the sweep waveform and forcedly reaches the above-mentioned certain potential to stop modeling, or It is used as a superposition pulse in the method of forcibly stopping the modeling by superimposing it on a certain electric potential. In addition, it is well known that various techniques related to these sweep length control exist depending on the embodiment of the sweep circuit, and the insertion position of the counting pulse is
It is changed appropriately. In the trigger signal control method, the counting pulse is used as a trigger pulse for starting and sweeping the second and subsequent times. In this way, the scanning time is controlled by the counting pulse, but the count value must be set by the measurer. For example, when the scanning time is 1 ms, the set value is 1 ms. However, when the traveling time is unknown, the scanning time is read by the sweep time and the sweep length and is set later, and this setting operation is complicated. Therefore, the present invention
This setting operation is automated.

First, the operation method proposed in the sweep length control method will be described. The observed waveform is a sine wave of 1 KHz (however, the frequency is unknown before the observation) and one phenomenon is observed. (Procedure 1) Set the number of scanning lines to about 3 to 10 and adjust the sweep time so that the sine wave is 1 in the tube width (usually 10 divisions).
The period (which varies depending on the purpose of observation) is set to be displayed, and adjustment is performed so that the sine waves displayed on the second and subsequent scanning lines are arranged vertically. (Procedure 2) The scanning time is read in this state. If the read value is 1.0 ms, the set value is 1.0 ms.
So, after finishing the setting, increase the sweep length by about 1 div,
Turn on the sweep length control and enter control mode. (Procedure 3) The observation digit, that is, the number of scanning lines is increased / decreased, the partial enlargement by the sub-sweep is performed, and the lower digit is further set or changed, and the operation is completed. In this operation, (procedure 2) is complicated, and in particular, the scanning time is often changed due to a change in the observed waveform. When (procedure 2) is automated, other operations are extremely simple. Accordingly, one object of the present invention is to provide a scanning oscilloscope with automatic scanning time reading and setting.

Another object of the present invention is to provide a scanning oscilloscope capable of storing set values, setting recall, programming, etc. by electrically changing set values.

Other objects and advantages of the invention will be apparent to those skilled in the art from the following detailed description of the preferred embodiments of the invention. However, the following examples do not disclose and limit all of the present invention, but are merely for those skilled in the art to fully understand the principle and application of the present invention, and those skilled in the art can appropriately make various changes and modifications. It will be appreciated that variations can be made.

FIG. 1 is a flock diagram in a scanning oscilloscope which is a preferred embodiment of the present invention. In FIG. 1, the present invention is located in the part of the frame of the chain line (24).
The vertical axis has (1) and (2) input terminals, and the input terminal of (1) is a pulse with time axis fluctuation, that is, jitter (2).
A pulse with no time axis fluctuation, that is, jitter, is input to the input terminal of. (3) and (5) are the input attenuation of each vertical axis,
It is a buffer and is converted to an appropriate voltage level in this part. (4) and (6) are associated with the output of the trigger signal in the amplification section of each vertical axis. (7) is a display mode switching unit for switching between individual display, alternate display (ALT), time division display (CHOP), addition display (ADD), and the like. Further, the staircase waves from (13) are combined by the switching section of (7) to make the scanning states of the vertical axes the same. (8) is an output unit for vertically deflecting the cathode ray tube (22). (9) is a trigger signal selection unit that selects the trigger signals from (4) and (6), the waveform of the external trigger signal (20), etc., and outputs them to the trigger formation unit (10). The trigger forming section (10) forms a trigger signal to the main sweep section (11). In the main sweep section (11), the main sweep return pulse is sent to the staircase wave forming section (12), and the pulse in the blanking period is the brightness modulation section (15).
The main sweep waveform is output to the horizontal output section (17). The sub-sweep section (16) sweeps the trigger signal received from (14). The sub-sweep period is input to the brightness modulation section (15) as an unblanking signal. The main sweep waveform and the sub-sweep waveform are selected by the switch (21) and input to the horizontal output section (17). Here, the voltage is set so that the cathode ray tube (22) can be horizontally deflected. In the staircase wave forming unit (12), at the same time as the main sweep is completed, the staircase wave is modeled one step at a time, and when the set number of scanning lines is modeled, the model is restored to complete one modeling operation, that is, scanning. The shaped staircase wave is input to the staircase wave conversion unit (13) and the staircase waveshape is deformed. The deformed staircase wave is combined with the vertical axis at the switching section (7). In this way, the CRT surface is horizontal,
Vertical deflection and scanning are performed to obtain the observed waveform in (23). Since the waveform from (1) is accompanied by jitter, the falling portions are arranged in a curved line (observed waveform in the upper portion), and in the waveform without jitter from (2), the falling portions are arranged in a straight line (lower portion). The observed waveform of the part (1) can be observed, and such a scanning oscilloscope is a known technique, and various modifications can be appropriately made depending on the embodiment.

The pulse at the scanning start point passes through the path (28) and the counter (18)
Is input to This pulse may have any shape as long as it has a waveform capable of extracting the first main sweep start point of the scanning line. Main sweep period pulse, that is, main sweep blanking pulse is routed (25)
It is also input to the count (18) through. In Fig. 1, since the scan time is stabilized by the sweep length control method, the sweep length of the main sweep unit (11) is controlled through the route (26) where the count value pulse is output from the counting unit (18). It The reference pulse for counting and the main sweep start pulse of the counting unit of (18) are routed (27)
And is input to the delay counting section (19). Delay counter (1
After counting the count value set in 9), it is input to the delay trigger forming unit as a delay pulse through the path (29). Therefore, the sub-sweep section (16) trigger-sweep with the delay pulse set numerically, so only the switching jitter that occurs in the circuit during the scanning period is eliminated, and the jitter in the trigger pick-off circuit of a general oscilloscope is eliminated, and the sub-scanning of all scanning lines is performed. At, a stable delay time is set. In this way,
In the observation plane, a stable scanning plane is obtained in which the main sweep section and the sub-sweep section are numerically controlled. The above-described stabilization method is a known technique, and can be variously modified and changed depending on the embodiment. The present invention relates to automation of the above-mentioned numerical value setting, which will be described in detail with reference to FIG. 2 which is a preferred embodiment. FIG. 2 is a schematic circuit diagram, FIG. 3 is a time course diagram of each waveform, and the left part is an enlarged view of time. As described above, these also merely set the principle of the present invention. Reference numeral (30) is a clock oscillator capable of changing the frequency, and the resistance (31) finely changes the frequency. This fine adjustment covers the continuous scanning time adjustment by counting and enables continuous adjustment. The clock frequency is set to 20.0000MHz by the crystal oscillator (hereinafter simply referred to as 20MHz). The minimum setting digit is 50 ns and the maximum setting digit is 1 s (second unit digit). The minimum value for automatic setting is 100ns. These values are for the purpose of easily understanding the following description, and it will be apparent that the circuits and setting conditions also differ depending on these values. (32) is a flip-flop (hereinafter simply referred to as FF), and the input of the NAND gate of (33)
Set to 10MHz (abbreviation of 10.0000MHz). (34) (3
5) (36) and (37) are the counting units that continuously count the set values of (41), (42) and (43). (34) is the FF to count the least significant digit, and (35), (36) and (37) are decimal counters for 0.1 μs and 1 μs.
Count the digits of s and 1s. There are other intermediate girders between (36) and (37), and they are omitted in the parallel dotted line. Similarly, the other parts are omitted. (38), (39) and (40) are decimal equal comparators. When the data of (41), (42) and (43) and the count values of (35), (36) and (37) match, a logical positive matching pulse is routed. Appears in (44). NAND gate (45) (46)
The NAND gates of (48) and (48) are binary equal comparators, and when the data of the value setting FF (47) and the value of the counting FF (34) match, a matching pulse is output to the path (49) and the inverter of (51) And (50) form a minimum pulse width that can be cleared by the NAND gates, and the counters (34) to (37) and the multiplier / restore (170) clear the counter. In this way, a counting pulse appears on the path (52), and this pulse controls the sweep length. However, if it remains as it is, it will not be synchronized with the sweep section, so there will be an input terminal (53) to the NAND gate (48).
Then, the scanning start pulse (308) of FIG. 3 is input, and the counter is unconditionally cleared by the pulse of (311) at the scanning start point. As a result, counting is started from the start of scanning, so that a cycle is set. (303) Observed waveform (1) in Fig. 1
Is the input waveform to. Reference numeral (304) is a trigger signal based on the observed waveform (303), which is the output waveform of the trigger forming unit (10) in FIG. The main sweep waveform (305) starts SCAN at the trigger point (301) and sweeps five times, that is, scans with five scanning lines. The trigger start point is the scan start point of (301) and SCAN
The (304) trigger signal during operation is ignored. (306) is a staircase wave, and the shaping operation is performed at each main sweep end point of the main sweep (305). The overshoot waveform like (302) is mixed at the rising point of each staircase to prevent the staircase from being switched during the sweep. (Since the number of stairs is set in this part, the number of scanning lines can be changed. Adjustment is surely set for each line). In FIG. 1, it is the output waveform of the staircase wave forming unit (12).
(307) in FIG. 3 is a pulse during the main sweep period, that is, a blanking pulse. In FIG. 1, it is taken out by the main sweep section (11). During the main sweep period of (307), the pulse is input to the input terminal (54) of FIG. With a positive edge clock, RS type FF (55) cooperates with resistor R and capacitor C to form a one-shot multi, and is shaped into a short-time pulse like (309) and output to path (57). . Switch (5
6) is a switch (56) in cooperation with resistor R and capacitor C
When is pressed, a positive differential pulse appears in the path (58).
The FF (59) is inverted by the operation of the switch (56), and the light emitting diode (61) lights up when the path (60) is logically positive. NAND gate (62) (63) when the path (60) is logically negative
Prevents the logical passage of other gates. Therefore, the output terminals (64) and (65) are logically positive. Therefore, when the path (60) is in a logic negative steady state, that is, when the light emitting diode (61) is off, the path (75) is a logic positive, and the waveform of the path (57) (309) has a preset FF ( The path (71) that is the output of 69) is logically negative, and the path (72) is logically positive. At this time, the NAND gate (82) outputs 20 MHz and outputs counting pulses to the path (52) with the numerical values set by the up / down counters (41) to (43). But the output terminal (65)
The output is blocked by the logic negative of path (60). On the other hand, since the NAND gate (33) does not output 10 MHz due to the negative logic of the path (71), the up / down counters (41) to (43) are counted by the pulse of the path (78). Next, when the switch (56) is pressed and the FF (59) is inverted, the RS type FF (66) is unlocked by the path (60) (the state is maintained), and the NAND gate (6) is released.
7) waits for the waveform (308) input to the route (73).
When the pulse (311) of the waveform (308) arrives, it passes through the NAND gate (67), the FF (69) is inverted, the path (71) becomes logically positive, and the path (72) becomes logically negative. The rising edge from the logic negative to the logic positive outputs a short pulse of the logic negative in the dotted frame (70), passes through the path (77), and goes up / down counter (41).
~ (43) is instantly data set and ready for counting. Since the data value is 0, the set numerical value is 0. NAND gate (33) is turned on by logic positive of path (71)
MHz is output, and the up / down counters (41) to (43) start counting from 0. At this time, the logic positive of the path (71) passes through the NOR gate (81) and the up / down counters (41) to (43) are set to UP. On the other hand, the logic negative of the path (72) blocks the passage of 20 MHz through the NAND gate (82), and the counters (34) to (37) stop counting. The dotted line frame (170) is a frequency multiplier and a restorer, which forms a half-cycle pulse at the rising and falling edges of the input pulse, doubles the frequency, or further multiplies it by 4 to restore it to the original 20MHz by FF. To do. In this part, high-speed IC such as ECL is used, and the restoration counter such as FF passes the clear pulse of other counter (52).
Receive from The clear pulse is formed in a shorter time. That is, the dotted line frame (170) increases the counting frequency to reduce the count jitter generated at the trigger activation point. In the dotted frame (68), there is a change from logic positive to logic negative, so the route (8
Since 3) is not changed, FF (66) is not reversed. Route (5
When the pulse of (310) of waveform (309) of 7) arrives, FF
(69) is inverted and the path (71) is logically negative. Dotted frame (7
Since 0) is a change from logic positive to logic negative, its output does not change. The NOR gate (81) receives the input of other terminals. At the same time, the NAND gate (33) blocks the output of 10 MHz, and the up-down counters (41) to (43) are up.
Counting is stopped, and the count value becomes the value in the stopped state.
On the other hand, in the path (72), it becomes logically positive and the NAND gate (82)
Since 20 MHz is output, the counting pulse is output to the path (52) at the count value of (312) counted by the up / down counters (41) to (43). Further, in the dotted line frame (68), since the change is from logic negative to logic positive, the route (83) outputs logic negative.
Invert FF (66). Therefore, the path (79) becomes logically positive, and the NAND gate (63) outputs the counting pulse of the path (52) by the logical positive of the path (60). This counting pulse is output to the output terminal (65) as a sweep length control signal. FF (6
The waveform (309) from the path (57) is input for each sweep in 9), but the status does not change because the path (72) is already logic positive. After that, the operation continues while the light emitting diode (61) is lit. That is, when the switch (56) is pressed to turn on the light emitting diode (61), the time of (312) is counted, and the sweep length after the second sweep is controlled by the count value counted in the first sweep. Similarly, since the waveform (313) is output to the output terminal (64) by the NAND gate (62), the circuit of the sweep length is released by this control signal or the operation is made longer than the sweep length of the control state. That is, the sweep length when the sweep length is controlled cannot be controlled stably unless it is in a state of operating longer than the sweep length before the control. This is a certain reaching potential in the circuit that sets the sweep length (potential equivalent to 10 division of the tube surface width),
This can be easily done by increasing the number with this control signal. In this way, the sweep length is stably controlled during the sweep. In the sweep length control method, when the sweep length is controlled,
The length of the sweep length, that is, the length of the scanning line is different between the first and second scanning lines. Waveform (316) is a sweep length control pulse at regular intervals. The first sweep length of the waveform (315) is from the trigger start point (301) to the time sweep of (318). However, since the blanking period is included in the second and subsequent lines, the sweep time becomes (319) and becomes shorter, but the delay time (320) does not cause a time shift. Waveform (321) is a delayed pulse. When the switch (56) is pressed again, the path (60) becomes logically negative.
Therefore, the sweep length control signal at the output terminal (65) is blocked, the control signal at the output terminal (64) is also stopped, and the sweep length returns to the state set by the sweep circuit (normally 10 divisions of the tube surface width).
The output path (74) of the FF (66) is locked to the logic positive.
The output of the NAND gate (67) is blocked by the negative logic of the path (60). This state is when the light emitting diode is off, and the sweep length is not controlled. In this way, the sweep length is controlled / stopped by the switch (56), the light emitting diode (61) is turned on during the control, and the light emitting diode (61) is turned off by the stop. Further control
When turned on, the sweep time (312) during control stop is automatically set as the sweep length control time. Next, the change of the numerical value after the automatic setting will be described. FF (86) is an RS type FF that holds the state of being pressed by the switches (84) (85).
That is, when the switch (84) is pressed, the path (87) becomes logically positive, and the up / down counters (41) to (43) enter a state of counting up. After that, even if you press the switch (84), FF
(86) does not change. Press the switch (85) to select FF
(86) is inverted, the path (87) becomes logically negative, and the up / down counters (41) to (43) are in a state of counting down. After that, pressing the switch (85) does not change FF (86). When the switches (84) (85) are continuously pressed in the dotted line frame (171), a short period of positive logic pulse is output to the path (173) after a certain period of time. Therefore, switch (84) (8
If you press and hold 5) for a certain period of time, counting pulses will be output automatically. This is to activate the one-shot multi for about 1 second when it changes from the logic positive to the logic negative, and make the AND configuration of this pulse and the logic negative, and oscillate the multi-vibrator of about 10Hz when 1 second elapses, and count it. It is a well-known technique to continuously output a pulse when the switch is kept pressed, such as when a pulse is applied. The switch (88) inverts the FF (90) and NANDs it with the NAND gates (91) to (93).
Controls passage / blocking of gates (94)-(96). Here, the dotted line frame (97) is the counting part of the main sweep quote, and the dotted line frame (98)
Is a sub-quote counting unit. Therefore, the main sweep reference and the sub sweep reference are switched by the FF (90), that is, the switch (88). (101) is an up / down counter, and up / down is switched by the output of FF (103). Switch (9
9) sets the output of the FF (103) to the logical positive and sets the up-down counter (101) to the up state. By operating this switch, the up / down counter (10
1) counts up. The switch (100) is FF (10
The output of 3) is made logically negative, and the up-down counter (101) is in the down-counting state, and the same switch (100) is operated to down-count through the capacitor C. As for the counting data of the up / down counter (101), one of the gates of the NAND gates (104) to (106) becomes logically positive by the data selector (102). At this time, switch (84)
The positive differential pulse is input to the NAND gate (80) through the capacitor C by the operation of (85). The path (79) is a NAND gate (80) because the sweep length is logically positive during control.
The operation pulse of the output switch (84) or (85) is output. This operation pulse is applied to the selected NAND gate (10
It passes through one of 4) to (106) and appears on the route (111). At this time, when the path (105) is made logically positive by the switch (88), an operation pulse is output to the path (78). The diagram from the data selector (102) to the route (78) is an abbreviated figure.
The D gate (106) is connected to the NAND gate (91) and is connected to the up / down counter (43) through the NOR gate (107). On the other hand, the NAND gate (104) is connected to the NAND gate (93) and is connected to the FF (47). The other middle digits are omitted. The dotted line frame (98) outputs a trigger signal for sub-scan reference by setting a numerical value, and constitutes the same circuit as the dotted line frame (97) which is the counting unit of the main scanning unit. NAND gate (11
2) is the same as the NAND gate (48), the NAND gate (48) receives the path (73), but the NAND gate (112) is connected to the logic positive, and its output is output to the path (114) and the output terminal (115). ) Is output. FF (113) is the same as FF (34) and receives a 20MHz clock. The waveform of the path (49) is automatically set in (314). Since 20MHz is not input in the first main sweep, (31)
The pulse of 7) is not output. The waveform of (316) is obtained in the second scan automatically set, and the sweep length is controlled from the first main sweep. In this case, the sweep length control of the main sweep for the first time is controlled by the count value from the trigger start rotation of (301), and the sweep length control for the second and subsequent times is the time including the blanking period, so The sweep length is shortened by the blanking period as described above.
It is the same as the above description of the dotted line frame (97) that the dotted line frame (98) counts with the set numerical value. FF (116) (117)
(118) is an FF with set reset. The waveform (309) is output to the path (57) for each main sweep regardless of whether the sweep length control is ON or OFF. Therefore, a logical positive pulse, which is the main sweep start point of the waveform (309), is used to pass through the inverter. (12
5) is logically positive. The path (114) outputs a count pulse and outputs a logical negative when the count value arrives. The logic negative of this counting pulse causes the FF (118) to invert, making the path (125) logic negative. The counter (11
3) The following data is cleared and the cleared state is retained, so the counting operation stops when it is 0. Next waveform (30
9) Logic positive, that is, the path (120) becomes logic negative due to the start of the main sweep, FF (118) is inverted and path (125) becomes logic positive,
The clear state is released and counting starts from 0. When the count value arrives, the count is stopped and cleared, and FF (118)
Is reversed and the clear state is locked. Therefore, this counting pulse starts counting from 0 at the same time as the start of the main sweep and outputs the pulse to the path (114) with the count setting value. Therefore, the sub-sweep is delayed by trigger-triggering the sub-sweep by this counting pulse. Will be swept. Since the counting pulse is output only once in the period of one main sweep, one sub-sweep is performed once for each main sweep. This is because, depending on the delay time setting, the count pulse may be output twice or more when a small numerical value is set or when the sub-sweep time is short.
Since the sub-sweep is triggered by the arrival of a trigger, that is, a counting pulse, the observed waveforms before and after the time may intersect depending on the sweep time of the sub-sweep, and this is prevented. In addition, the set value of the delay time may be set to exceed the main sweep time, and in such a case, the scanning lines due to the sub-sweep will be skipped and not displayed. The dotted line frame (124) is the NAND gate (5
0) and the inverter (51). FF (1
16) (117) outputs the logic negative by the dotted line frame (124) when the signal rises from the logic negative to the logic positive at the main sweep start point, that is, the path (122) is the logic negative, (123) becomes logically positive at the output terminal (121). If a delayed pulse occurs within the main sweep time, the path (11
4) becomes logically negative, so FF (117) is inverted and the path (123)
Is a logic negative, and the output terminal (121) is a logic positive and does not change. However, if the delay pulse is output outside the main sweep time, that is, after the main sweep is completed, the path (122) becomes logically positive due to the clear pulse of the path (52), and the path (123) holds the logical positive. Therefore, the output terminal (121) is logically negative. In this way, when the delay time is set outside the main sweep time, the output of the delay pulse can be stopped, or the indicator light or the like can alert the measurer. In the above, after the automatic setting in the main sweep, the numerical value can be arbitrarily changed in the sub-sweep, but a method of storing the set numerical value and calling the numerical value will be described. (126) is the scanning time storage part for the main sweep and the path (128)
The data is received from and is set by the logic positive of the route (129). The numerical value of the delay time is stored in (127) and (1
It has the same configuration as the scanning time storage section of the main sweep section in 26). FIG. 4 shows a schematic circuit diagram in a typical embodiment of each storage unit. The memory of FIG. 4 stores four main scanning times and four delay times, and (156) to (159) as storage elements are 74670 in the TTL-IC and the middle digit is omitted. The switches (136) to (139) are connected to a logic positive potential through a resistor R. (132) is an FF with set / reset, and the dotted line frame (131) is a short time from a logic negative in a steady state to a logic positive by pushing the switch (136) to the path (168) in cooperation with the capacitor C resistance R. Generate a pulse of. The dotted line frames (133) to (135) have the same configuration as the dotted line frame (131), and each switch is pressed to generate a short pulse of logic positive from logic negative in the steady state. Since each gate of NOR gate (141) is logic negative, the steady state of path (142) is logic positive. The inverters (143) (144) and the resistor R capacitor C cooperate to delay the pulse of the path (142). (145) is an RS type FF. Dotted frame (131) ~
Since the steady states of the outputs of (133) to (135) are logically negative, the outputs of the NAND gates (150) and (151) are logically positive,
Paths (175) (176) are logically positive. Route (175) (17
Since 6) is connected to the memory addresses of the memories (156) to (159), the address of "11" becomes active. The output terminal (163) is connected to the data inputs of the up-down counters (41) to (43) in the main sweep section in FIG.
The output terminal (164) is connected to the path (128) in FIG. 2 to store and set the main scanning time. (158) and (159) are delay time memory setting sections, which are similar to the main sweep section and are connected to the dotted frame (98) in FIG. 2, and the output terminal (166) is for outputting data.
Output terminal (167) is a data input. Since the output terminal (165) is connected to the output terminal (130) in FIG. 2, operation of the switch (88) in FIG.
The operations of 2) to (155) are selected. Therefore, when the main sweep section is selected by the switch (88) in FIG. 2, the path (181) is logically positive, and the NAND gate (15
2) Accept the input of the other gate of (154). Similarly, when the delay time section is selected by the switch (88), the path (181) becomes logically negative, and the NAND gates (153) (155) receive the inputs of other gates. In this way, the main scanning section and the delay time section are selected by the switch (88) in FIG. In the steady state, the path (179) is logically negative, so the paths (177) and (178) are logically positive. The path (177) is connected to the input of the read command of the memories (156) and (157), and the path (178) is connected to the input of the write command of the memories (156) and (157). The same applies to the delay time storage units (158) and (159). When the switch (136) is pressed, a short-time logical positive pulse is output to the route (168), a short-time logical positive pulse is output to the route (179), and the route (180) (1
Since (81) is logically positive, the path (177) becomes logically negative for a short time. Therefore, the data of the address "11" is output to the output terminal (163). In steady state, path (179) is logically negative, so path (172) is logically positive and switch (1)
Path (172) outputs a short duration negative pulse due to the negative short duration pulse appearing on path (142) when 36) is pressed. The output terminal (162) is connected to the path (12
Since it is connected to 9), a logical negative is output for a short time on the path (77), and the data in the memories (156) (157) are loaded into the up / down counters (41) to (43). That is, if the switch (88) is set to the main scanning section, the switch (136)
By pressing, the address data of "11" is set to the main scanning time. Similarly, when the switch (88) is set to the delay time section, pressing the switch (136) sets the address data of "11" to the delay time section. Inverter (146) (147), NAND gate (14
8) (149), NOR gate (150) (151), switch (1
Set the address of 37) (138) (139), and each switch
The address of 01.10.00 is output to the routes (175) and (176).
Therefore, if the switch (88) is set to the scanning time section, pressing the switch (137) sets the address data "01" to the scanning time section. Similarly, when the switch (138) is pressed, the address "10" is displayed on the switch (139).
Press to set the address of "00". Next, press switch (140) to invert FF (145) and route (169)
Becomes a logic positive, the light emitting diode (161) lights up, and the NAND
Gates (154) and (155) receive inputs from other gates. When the switch (136) is pressed here, a short time logical positive pulse appears on the path (179) and a short time logical negative pulse is output to the path (178). Since the output terminal (164) is connected to the path (128) in FIG. 2, the data of the up / down counters (41) (42) (43) is stored in the memory (156) (1).
57) has been entered. In addition, the route (178) is the memory (156)
Since it is connected to the write command terminal of (157), the scanning time is recorded at the address "11". Meanwhile, the route (142)
Short time logic negative pulse of the inverter (143) (144)
And the capacitor C and the resistor R output a time-delayed logic negative pulse, and the FF (145) is inverted and the light emitting diode (16
1) goes out and returns to the original state. Therefore, the switch (140) is a memory switch, and when the light emitting diode (161) is lit, when the switches (136) to (139) are pressed, the scanning time is stored in the address corresponding to the pressed switch. Is
Return to the read state. The same applies to the delay time setting section, so press the switch (88) in Fig. 2 to select FF (90).
And the path (105) is logically negative, the NAND gate (15
3) (155) accepts input from other gate. Therefore, the switches (136) to (139) are operated by the same operation as the scanning time section.
When one of the switches is pressed, the data input from the output terminal (167) to the address corresponding to the switch is recorded in the memories (158) (159). Then, in a short time, the original state of the reading state is restored. The short-time pulse width is a pulse width that is equal to or longer than the sum of the memory writing / reading time and the timing of each gate. Even if the switches (136) to (139) are pressed at the same time, if there is a switch that is not pressed, the pulse width (for example, 10 μs) of a short time is set so that the probability of reading or writing the address of the switch is reduced. In addition, the inverter (14
3) The delay time due to (144) and the capacitor C resistance R may be longer than the writable time of the memory. In practice, data is taken out from the output terminals (164) (167) so that the numerical values of scanning time and delay time are digitally displayed. In addition, the scan time display and delay time display switching signals are output terminal (16
Enter from 5). In this way, the scanning time and the delay time can store four times each and can be set for calling. After setting, you can change the value freely, you can change the set digit, you can change the value from that digit, and carry is performed. In addition, the unit step (15, 25, 35, 45 at 10 μs
(μs etc.) can be set, which is an effective setting method when changing the delay time.

By automatically counting and automatically setting the scanning time as described above, the above-mentioned (Procedure 2) can be automated, so that the setting operation of the scanning time becomes extremely simple, and the numerical value set by using the setting circuit can be set. It will be possible to freely store and recall it and set it. It is possible to automate the setting of numerical values, so it will be possible to easily program it. Therefore, it is possible to provide a scanning oscilloscope having improved operability and the like by adding the configuration according to the principle of the present invention. In the above description, the scanning time is counted by the first scanning line and the subsequent scanning time is automatically set. However, when numerical control is not performed, the scanning time of the first scanning line is different from the scanning time of the second scanning line and thereafter. In such a case, it is possible to count the scanning time of the second and subsequent stable scanning lines and automatically set the scanning time from the second scanning. However, it does not depart from the gist of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram of a scanning oscilloscope, which is a typical embodiment of the present invention, and examples of observed waveforms in two phenomena. FIG. 2 is a schematic circuit diagram of the automatic scanning time setting unit of the present invention, which includes a delay time setting unit. FIG. 3 is a waveform chart. FIG. 4 is a schematic circuit diagram of the storage unit.

Claims (1)

(57) [Claims] 1. A sweep section including a step wave generation circuit for starting sweeping and scanning by a trigger signal, a clock signal generating section having a cycle sufficiently higher than the sweep cycle, and the clock at the same time when the first sweep of a scanning line is started. The counting operation is stopped when the first sweep is completed and the counting operation is stopped, and the stopped count value is set in the numerical setting section. In the second and subsequent sweeps, the counting pulse can be output continuously with the set numerical value. The scanning line includes a configuration including a counting unit including a circuit and a sweep control unit capable of controlling the sweep time, that is, the scanning time by starting or stopping the sweep for the second and subsequent sweeps by the counting pulse. The second and subsequent scanning times are set to the time counted by the first scanning line and scanning is performed, and means for automating the setting operation of the scanning time is included. Scanning oscilloscope having characterized in that the automated operation.