JP2704597B2 - Semiconductor wafer heat treatment equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer heat treatment apparatus for performing a donor killer heat treatment on a silicon wafer, for example.

[0002]

2. Description of the Related Art As a method for producing a silicon single crystal, a CZ (Czochralski) method for growing a single crystal from dissolved silicon in a quartz crucible is widely used. However, when the silicon single crystal is pulled, the quartz crucible is slightly melted, and oxygen is mixed into the dissolved silicon. Oxygen dissolved in the dissolved silicon enters the crystal as the single crystal silicon grows, and remains as a thermal donor due to the thermal history of the subsequent pulling process.

[0003] Therefore, it is difficult to obtain a pure silicon single crystal because the thermal donor is doped into the grown single crystal. When a silicon wafer doped with a thermal donor is used in the manufacture of a semiconductor device, the resistivity of the silicon wafer becomes non-uniform due to the impurities, so that the quality of the semiconductor becomes unstable.
That is, the thermal donor negates a small amount of impurities in the acceptor, and makes the silicon wafer N-type. On the other hand, when a donor impurity is doped, a low resistivity is exhibited despite unintended intention.

Therefore, it is necessary to reduce the number of thermal donors before the semiconductor device manufacturing process in order to keep the quality of the semiconductor device constant. As one method of the donor killer, heat treatment has been conventionally performed. That is, the grown silicon is sliced into a plurality of wafers, and lapping and etching are performed by a skilled person. After the etching treatment, heat treatment (donor killer) is performed at 500 ° C. or more to reduce the thermal donor. FIG. 8 shows the relationship between the time required for the heat treatment and the temperature. As can be understood from the straight line A in this figure, as the heat treatment time increases, the temperature of the silicon wafer increases. The activation energy is 2.7 eV.

[0005] However, such a conventional donor killer heat treatment process is susceptible to fluctuations in thermal energy. For example, unless the silicon wafer after the heat treatment is rapidly cooled at around 450 ° C., the thermal donors are regenerated rather than reduced.
Such a problem occurs remarkably in a large silicon wafer such as 8 inches. Further, when the silicon wafer is heated at about 700 ° C. for a long time, another donor called a new donor due to oxygen is generated. Therefore, accurate temperature control is required for a semiconductor wafer heat treatment apparatus.

In recent years, as the degree of integration of semiconductor integrated circuits has increased, the size of circuit elements has become smaller, and larger silicon wafers have been used. Many semiconductor elements are formed on a single large silicon wafer, and many semiconductor devices are required to have uniform manufacturing quality. Therefore, in manufacturing a semiconductor device, a large silicon wafer is required to have uniform characteristics, and for this purpose, the heat treatment process of the silicon wafer must be accurately controlled. Such a heat treatment is also involved in the formation of a precipitation nucleus of oxygen in intrinsic gettering.

FIG. 7 shows a first conventional heat treatment system. This heat treatment system generally includes a cassette loader 1,
It has a heating zone 2 and a cooling zone 3.
In this heat treatment system, a predetermined number of silicon wafers in the cassette 4 are linearly arranged on the boat 1a. The boat 1a is transported into the tubular horizontal heating furnace 2a in the heating zone 2 and enters the heating area C1. Silicon wafer 5 is heated in horizontal heating furnace 2a according to a temperature profile predetermined by control unit 2b. At this time, the boat 1a remains stationary in the horizontal heating furnace 2a.

After the heat treatment, the boat 1a is placed in the horizontal heating furnace 2
a and subsequently conveyed to the cooling zone 3. The cooling zone 3 includes a plurality of cooling fans 3a, and the cooling fan 3a blows cool air onto the silicon wafer 5 on the boat 1a. Cold air is silicon wafer 5
Is cooled rapidly, and its temperature is rapidly reduced at around 450 ° C. At this time, the boat 1a remains stationary in the cooling zone 3.

FIG. 8 shows a second conventional heat treatment system. This heat treatment system is provided with a tubular vertical heating furnace 6a that is erected vertically, and the heating area of the vertical heating furnace 6a is a portion indicated by reference numeral C2. The silicon wafer 7 is loaded from a cassette 8 on a vertical boat 9a by a cassette loader 9, and the boat 9a is inserted from the bottom of an upright vertical heating furnace 6a. The boat 9a also remains stationary in the vertical heating furnace 6a. The control unit 6b follows the predetermined temperature profile and sets the vertical heating furnace 6a
Is to control the temperature. After the heat treatment, the boat 9a is taken out of the vertical heating furnace 6a, and the silicon wafer 7 is removed.
Is rapidly cooled by a cooling fan similar to the cooling fan 3a described above. Such a vertical heating furnace 6a is suitable for a large-sized one such as an 8-inch silicon wafer.

FIG. 9 shows a third conventional heat treatment system using a rapid heating furnace. This heat treatment system
It comprises a heating furnace 10a surrounded by a radiator 10b and a tungsten halogen lamp array 10c. The inlet of the heating furnace 10a is covered with a furnace port flange 10d, and the gas purge nozzle 10e is inserted into the heating furnace 10a. The radiation thermometer 10f measures the temperature inside the heating furnace 10a, and the quartz susceptor 10g measures the temperature inside the heating furnace 10a.
It is arranged in.

The silicon wafer 11 is a quartz susceptor 10
g, a tungsten halogen lamp array 1
0c irradiates infrared rays to the heating furnace 10a to heat the silicon wafer 11. Heating furnace temperature is 500 ℃ ～ 700 ℃
The temperature is higher than those of the first and second heat treatment systems described above. However, even in this heat treatment system, the silicon wafer 11 is not
It remains stationary within 0a.

[0012]

The above-described first and second conventional heat treatment systems take the silicon wafers 5 and 7 from 600.degree.
The heating is performed at 50 ° C. for 30 to 60 minutes. Oxygen donors tend to increase at such relatively low temperatures, but the heat treatment is stable. However, in the first and second conventional heat treatment systems, problems such as poor operability, erroneous operation, low productivity, and uneven heat treatment have occurred. More specifically, a predetermined number of silicon wafers 5 placed on the boats 1a and 9a,
7 is heated simultaneously in the heating furnaces 2a and 6a. However, if the boats 1a, 9a are not filled with the silicon wafers 5, 7, it is necessary to place dummy wafers together with the silicon wafers 5, 7 on the boats 1a, 9a in order to make the heat capacity uniform. is there. For this reason, in the first and second conventional heat treatment systems, it is necessary to determine whether or not a dummy wafer is placed on each of the boats 1a and 9a, which is inferior in operability. there were.

Further, if the heating furnaces 2a and 6a are long enough to store a large number of boats 1a and 9a, it is possible to simultaneously heat silicon wafers of the same size. However, if different sizes of silicon wafers are placed on any of the boats, the heat treatment system becomes unsuitable for these silicon wafers. Therefore, as a problem inherent to the first and second conventional heat treatment systems, the possibility that an erroneous operation may occur can be raised as a second problem.

The third problem is that the heating furnace 2 by batch processing is used.
a, 6a. Since the boats 1a, 5a remain stationary in the heating furnaces 2a, 6a, the operator needs to replace the boats 1a, 5a in the heating furnaces 2a, 6a, and as a result, the heating furnaces 2a, 6a Each time, the temperature fluctuated. Therefore, the first and second conventional heat treatment systems have a problem of low productivity.

A fourth problem in the first and second prior arts relates to non-uniform heat treatment. This is because the boats 1a and 5a hold the silicon wafers 5 and 7, and the temperature of the portion where they are in contact with each other is likely to decrease. As a result, the resistivity of the wafer has become non-uniform, resulting in defective semiconductor devices. Thus, the conventional first and second heat treatment systems have various problems.

In the third conventional heat treatment system provided with a rapid heating furnace, since the silicon wafer 11 is mounted on the quartz susceptor 10g, the problems in the first and second prior arts arise. Absent. However, in a heating furnace for batch processing, there is a problem that productivity is low. In addition, when the state of the surface of each silicon wafer is different, the variation of the surface temperature becomes large in the middle temperature region of 500 ° C. to 700 ° C. due to the difference of the infrared emissivity. If the surface condition of the silicon wafer is not uniform, a non-uniform temperature distribution occurs in one silicon wafer. As a result, the resistivity of the silicon wafer processed by the third conventional heat treatment system tends to be non-uniform.

[0017]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to improve operability, prevent erroneous operation, improve productivity, and enable uniform heat treatment in a semiconductor wafer heat treatment apparatus.

[0018]

According to the first aspect of the present invention, there is provided a wafer supply means (21) for supplying semiconductor wafers one by one, a wafer discharge means (23) for discharging the semiconductor wafer after the heat treatment, A heat treatment means (22) interposed between the wafer supply means (21) and the wafer discharge means (23), wherein the heat treatment means (22)
Provided between (21) and the wafer discharge means (23), while transferring the semiconductor wafer from the wafer supply means (21) to the wafer discharge means (23) at a predetermined transfer speed, the transfer speed can be changed Transfer means (27a to 27f, 44), a plurality of heating units (22ba to 22be) each capable of independently heating a semiconductor wafer to a target temperature, and the plurality of heating units (22ba to
22be) and a plurality of cooling units (22ca to 2ca), each of which can independently cool the semiconductor wafer to the target temperature.
2ce) and memorize at least one temperature profile,
The respective temperatures of the plurality of heating units (22ba to 22be), the respective temperatures of the plurality of cooling units (22ca to 22ce), and the transfer speed in the transfer means (27a to 27f, 44) are controlled according to the temperature profile. A control unit (24).

[0019]

In the semiconductor wafer heat treatment apparatus according to the present invention, the semiconductor wafers are transferred one by one by the transfer means from the wafer supply means to the wafer discharge means. And
The semiconductor wafer is heated and cooled by the heat treatment means in the middle of the transfer path.

That is, the donor killer heat treatment can be continuously performed for each semiconductor wafer. Assuming that the heating unit is composed of, for example, a heat treatment furnace, and that this heat treatment furnace has a considerable heat capacity and is maintained at a constant temperature, wafers are loaded one by one into the heat treatment furnace. Heated. Further, for example, in a cooling zone constituting a cooling unit, the wafer is similarly cooled at a constant speed. As a result, the stability of the heat treatment can be dramatically improved. Further, a cassette loader as disclosed in Japanese Patent Application Laid-Open No. 62-259906 is provided for the wafer supply means and the wafer discharge means.
By mounting the cassette from the cassette loader to the heat treatment furnace, and from the heat treatment furnace to the cassette loader, the lot can be easily identified because the wafer is at the same cassette position before and after the heat treatment.

In the present invention, a plurality of heating sections and a plurality of cooling sections are provided, each of which can independently control the temperature of the semiconductor wafer. The optimum condition (temperature profile) that preferably satisfies both conditions can be set. As a result, according to the heat treatment apparatus, it is possible to improve the productivity of a silicon wafer having a suitable resistivity distribution and uniform oxygen precipitation characteristics.

For example, as shown in FIG. 6, the time required for the donor killer heat treatment is 24 minutes at 565 ° C., 100 seconds at 590 ° C., 31 seconds at 685 ° C., and 21 seconds at 700 ° C. Further, the time required to maintain the temperature at 685 ° C. can be further shortened since the donor disappearance is performed before the temperature is reached. When rapid heating is performed in this manner, there is no risk of contamination of the silicon wafer.

Further, according to the present invention, the silicon wafers are automatically transferred from the heating section to the cooling section by the transfer means sequentially one by one. Therefore, the following effects can be obtained as compared with a conventional heat treatment apparatus that performs heat treatment for each boat having a plurality of wafers. That is, it is not necessary to use a dummy wafer to equalize the heat capacity of each boat. Further, since the wafers are heat-treated one by one, heat treatment can be easily performed even for wafers having different sizes.

[0024]

1 to 5 show a semiconductor wafer heat treatment apparatus according to an embodiment of the present invention. As shown in FIG. 1, the heat treatment apparatus generally includes a cassette loader 21, a heating zone 22, a cassette unloader 23, and a control unit 24, and is disposed in a clean room 25 including a fan 25a and an air purifier 25b. I have.

The clean room 25, the fan 25a, and the air purifier 25b form a circulation path of air, and are configured to remove dust and dirt from the air. The cassette loader 21 includes a turntable 21a, a robot hand 2
1b, a bridge table 21c is provided, and a cassette 26 holding a wafer W is configured to circulate on the turntable 21a. Each cassette 26 holds a plurality of silicon wafers W, and a bridge table 21c
It moves intermittently toward the supply position in front of the.

The robot hand 21b sequentially takes out the silicon wafers W one by one from the cassette 26 and places them on the bridge table 21c. When all the silicon wafers W have been removed from the cassette 26, the empty cassette 26 moves away from the front of the bridge table 21c, and the next cassette 26 moves to this position. The empty cassette 26 is removed from the turntable 21a and replaced with another cassette 26 holding the silicon wafer W.

The heating zone 22 includes a transport mechanism 22
a, a heating unit 22b and a cooling unit 22c. The transport mechanism 22 a extends in the heating zone 22 and has an entrance near the cassette loader 21 and an exit leading to the cassette unloader 23. The transport mechanism 22a
The heating unit 22b and the cooling unit 22c communicate with the outlet. Heating unit 22b, cooling unit 2
When passing through 2c, each silicon wafer W is cooled after being heated, and the thermal donor is effectively reduced by the heat treatment.

FIGS. 2 and 3 show a part of the transport mechanism 22a in the heating unit 22b. The transport mechanism 22a is constituted by a walking beam transport mechanism, and five-stage walking beam sections are assigned to the heating unit 22b. Each walking beam section assigned to the heating unit 22b has six walking beams 27a, 27b, 27c, 27d, 2
7e, 27f, and these walking beams 27a to 27f are disposed in a quartz tube 28.

The hollow quartz tube 28 has a substantially rectangular cross section. A silicon wafer W is mounted on the walking beams 27a to 27f provided in the quartz tube 28, and the silicon wafer W is transported to the next walking beam section. Although not shown, a gas nozzle is provided at one end of the quartz tube 28 so that an inert gas (for example, nitrogen gas) flows into the hollow quartz tube 28. As shown in FIG. 3, the nitrogen gas is sucked by a suction nozzle 30 disposed at the other end of the quartz tube 28. Therefore, the heating unit 22
When passing through b, the silicon wafer W is confined in nitrogen gas and does not come into contact with the atmosphere.

The heating unit 22b includes a quartz tube 2
8, each of the upper and lower heaters 29a having a predetermined length,
29b are provided. These heaters 29a, 29
It is also possible to use an infrared lamp instead of b. The length of the heaters 29a and 29b is 1500 millimeters, and can heat the silicon wafer W at 600 ° C. or higher. The five walking beam sections correspond to the heater blocks 22b of the heating unit 22b of FIG.
a, 22bb, 22bc, 22bd, and 22be, and the five heater blocks 22ba to 22be can be independently controlled. In this case, the five heater blocks 22ba to 22be are each set to a predetermined temperature as described later. That is, even if a plurality of silicon wafers W are sliced from the same silicon crystal, the silicon wafers W do not have exactly the same characteristics. in this case,
According to the optimum temperature profile set for each silicon wafer W, the thermal donor of the silicon wafer W can be effectively reduced.

Next, the operation of the heat treatment apparatus according to this embodiment will be described. A test silicon wafer is cut out from the top and bottom portions of columnar single-crystal silicon, and an optimum temperature profile is experimentally found for each silicon wafer. That is, a thermocouple (not shown) is attached to each test silicon wafer to monitor temperature fluctuations, and the resistivity of the silicon wafer after the heat treatment and the amount of precipitated oxygen are measured. The thermal energy supplied to the test wafer is, for example, 700
C. for 21 seconds, 685 ° C. for 31 seconds, 590 ° C. for 100 seconds.
For 1 second at 565 ° C. for 24 seconds (24 minutes) (FIG. 8). By the above-described method, a simulation of the heat treatment is performed on the test wafer. The temperature profile for each wafer cut from the same silicon single crystal can be further optimized by using a test wafer, and the transfer speed is determined according to the temperature profile.

FIG. 4 shows a control range in which precipitation of thermal donor and oxygen does not occur. A curve P1 in this figure shows a boundary condition for a thermal donor of a silicon wafer W cut out from the bottom of single crystal silicon.
According to the conditions shown in the region on the left side of the curve P1 showing the relationship between the transfer speed and the temperature of the wafer W in the quartz tube 28, a considerable amount of thermal energy is applied to the silicon wafer W cut from the bottom of the silicon single crystal. The donor remains, and it is almost impossible to satisfy the specifications of the semiconductor device. On the other hand, under the condition on the right side of the curve P1, the thermal donor in the silicon wafer W cut out from the bottom of the silicon single crystal can be sufficiently reduced, and the thermal donor and the like become equal to or less than the reference value of the design standard.

P2 in the figure shows the relationship between the temperature and the transfer speed of the silicon wafer W cut out from the top of the silicon single crystal. That is, according to the condition of the region on the left side of the curve P2, the silicon wafer W cut out from the upper part of the silicon single crystal contains a considerable amount of thermal donor, and it is almost impossible to satisfy the standard of the semiconductor device. Become. However, according to the conditions in the region on the right side of the curve P2, the thermal donor in the silicon wafer W cut out from the bottom of the silicon single crystal can be sufficiently reduced, and the silicon wafer W is acceptable for high-density device fabrication. Can be done.

P3 indicates a boundary condition for oxygen precipitation characteristics, and is applied to a silicon wafer W cut out from both the top and bottom portions of a silicon single crystal. According to the conditions in the region on the right side of the curve P3, oxygen of the silicon wafer W is precipitated, and the silicon wafer W
Are unsuitable for the manufacture of integrated circuits. On the other hand, according to the conditions in the region on the left side of the curve P3, the amount of precipitated oxygen decreases, and the silicon wafer W becomes suitable for manufacturing a semiconductor integrated circuit.

As a result, as long as the condition represented by the region R3 surrounded by the curves P2 and P3 is followed, regardless of the position of the silicon single crystal, the silicon wafer W must be designed in consideration of the controllability of the resistivity. It will satisfy you. The region R3 is approximately represented by first, second, and third approximate straight lines, and the first approximate straight line includes a first coordinate PT1 (5 millimeters / second, 650 ° C.) and a second coordinate PT2 (21 millimeters / second). Second, 695 ° C.). The second approximate straight line is a third coordinate PT3 (2.5 mm / sec, 6 mm).
55 ° C.), fourth coordinate PT4 (8 mm / sec, 6
80 ° C.). The third approximate straight line is determined by the fifth coordinate PT5 (13 mm / sec, 695 ° C.) and the sixth coordinate PT5 (21 mm / sec, 710 ° C.).

Region R surrounded by curves P1 and P2
2 applies only to a silicon wafer W cut from the top of a silicon single crystal. The region R1 cannot be applied to all silicon wafers. The silicon wafer W cut out from the top of the silicon single crystal requires high-temperature and long-time heating, and by lowering the transport speed, oxygen of the silicon wafer W is precipitated in a relatively wide temperature range. These tendencies are observed irrespective of whether the silicon wafer W is P-type or N-type. The curve P3 shows the applicable conditions regardless of the position of the silicon single crystal. However, the decrease in the precipitated oxygen is remarkable when the silicon wafer cut from the bottom of the silicon single crystal is heated at a high temperature. It appears in. Furthermore, oxygen is likely to precipitate at the center of the silicon wafer.

In the heat treatment, not only the thermal donor and oxygen deposition amount but also BMD (bulk micro-defe
ct). FIG. 5 shows the relationship between the amount of BMD, the temperature of the quartz tube 28, and the transfer speed of the silicon wafer for a crystal having a low oxygen concentration (1.1 to 1.3 × 10 ¹⁷ atoms / cm ³ ). . A thin solid line, a broken line, and a thick solid line indicate that the transport speed is 14 mm / sec, 20 mm / sec, and 24 mm / sec, respectively. A silicon wafer having a low oxygen concentration is subjected to a high-temperature heat treatment so that its B
MD decreases. This is taken into account when controlling the transport speed and temperature of the quartz tube 28.

In FIG. 1, information on the optimum transport speed and temperature is stored in a data storage section of a control section 24 constituted by a computer system, and the control section 24 controls the walking beam section according to this information. . Each of the plurality of thermometers 31 is embedded in the heater blocks 22ba to 22be, and the temperature of each heater block is measured by the thermometer 31. Information on the temperature of each heater block is sent to the control unit 24, and the heater 29 according to the temperature profile stored in the data storage unit.
a and 29b are to be controlled. Heating unit 22
Since the heat capacity of b is much larger than that of the silicon wafer W, heat treatment under substantially the same conditions is possible for a large diameter wafer of 3 inches to 8 inches.

The five walking beam sections are provided corresponding to the cooling unit 22c, and each walking beam section is constituted by six quartz walking beams. When the heat-treated silicon wafer W reaches the outlet of the transfer mechanism 22a, the silicon wafer is sequentially moved from the heating unit 22b to the cooling unit 2b.
2c. The silicon wafer W proceeds in the tunnel of the cooling unit 22c and is exposed to a cooling gas.
The cooling gas is supplied by a circulation system or a non-circulation system. Although not shown, a thermometer is provided in the cooling unit 22c to inform the control unit 24 of the temperature in the tunnel. The control unit 24 controls the amount of the cooling gas blown to the silicon wafer W and the walking beam section, and controls the silicon wafer W
The silicon wafer W is rapidly cooled at around 450 ° C. in order to prevent a thermal donor from being generated.

The cassette unloader 23 has a turntable 23a, a robot hand 23b, a bridge table 2
3c is provided. The empty wafer cassette 32 goes around on the turntable 23a and reaches the front position of the bridge table 23c. The silicon wafer W is sequentially carried to the cooling unit 22c, and the robot hand 23b inserts the silicon wafer Wx into the empty wafer cassette 32 at the unloading position. When a predetermined number of silicon wafers Wx are mounted on the wafer cassette 32, the wafer cassette 3
2 moves intermittently.

As a result, the wafer cassette 32 filled with the silicon wafer Wx leaves the unloading position, and a newly empty wafer cassette 32 reaches the unloading position. As described below,
Wafer cassette 26 holding silicon wafer Wx
Moves to the loading position and robot hand 2
1b is the silicon wafer Wx from the wafer cassette 26
Is supplied to the transport mechanism 22a via the bridge table 21c.

The silicon wafer Wx is sent to the walking beam section and passes at a speed of 20 mm / sec through the quartz tube 28 provided with the heaters 29a and 29b. For example, the final heater block 22be is 6
The temperature is adjusted to 85 ° C., and the silicon wafer Wx passes through the final heater block 22be in 15 seconds. Also,
Assuming that the thickness tx of the silicon wafer W is 625 μm, the transfer speed V is as follows. That is, V =
(0.3T-a) · (lx / 900) · (650 / t)
x) = 9.5 to 44.3 mm / sec.

Here, T is 685 ° C., lx is 1500 mm, and a is 180 to 200. The constant a is determined in advance based on the silicon wafer Wx cut out from the top of the silicon single crystal. If the silicon wafer Wx is cut from the top of the silicon single crystal, the range of the constant a is 187 to 1
93, and the silicon wafer Wx is heated for a relatively long time. This is because it is difficult to remove the thermal donor at the top of the silicon single crystal. Accordingly, the transfer mechanism 22a is controlled at a speed of 21.7 to 32.1 mm / sec, and the silicon wafer W
The thermal donor at x is to be removed.

The silicon wafer Wx is supplied to the heating unit 2
From 2b, it goes to the cooling unit 22c and is continuously transported by the walking beam section. While the silicon wafer Wx passes through the cooling unit 22c, the silicon wafer Wx is rapidly cooled so that thermal donors do not regenerate, and the temperature of the silicon wafer Wx reaches 60 ° C. at the outlet of the transfer mechanism 22a. Since the thermal donor tends to increase at about 450 ° C., the silicon wafer Wx needs to be cooled rapidly around 450 ° C.
It may be slightly lower than ° C. For example, even if the temperature of the silicon wafer Wx is 440 ° C., there is no problem in the heat treatment process.

When the silicon wafer Wx reaches the exit of the transfer mechanism 22a, the silicon wafer Wx advances to the bridge table 23c, and the robot hand 23b inserts the same into the empty wafer cassette 32. When the wafer cassette 32 is filled with the silicon wafer, the wafer cassette 32 separates from the turntable 23a and stops at a predetermined position.

Therefore, according to the semiconductor wafer heat treatment apparatus of the present embodiment, no dummy wafer is required, so that complicated operations can be avoided. A predetermined number of silicon wafers W are taken out of the wafer cassette and transferred to an empty wafer cassette. This means that all silicon wafers have the same size. Furthermore, since the quartz tube 28 heats a large number of silicon wafers at a high temperature, heat treatment can be performed efficiently. Further, since the heat treatment apparatus according to the present embodiment is provided in a clean room, it is possible to prevent dust and the like from adhering to the silicon wafer.
In addition, while the silicon wafer W is being conveyed by the walking beam system, high-temperature air is blown over the entire surface thereof. As a result, uniform heat treatment can be performed on the entire silicon wafer.

That is, it has both advantages of the stability of the batch heat treatment furnace and the operability of the rapid heating furnace, regardless of the number of lots, and it is only necessary to replace the cassette for wafers of different diameters. Donor killer heat treatment and this reliability can be improved. In addition, a uniform heat treatment can be performed on the entire surface of a silicon wafer, the resistivity of the entire surface of the wafer can be accurately evaluated, and a wafer having oxygen precipitation characteristics suitable for device manufacturing conditions can be manufactured. it can.

Next, a semiconductor wafer heat treatment apparatus according to a second embodiment of the present invention will be described.

FIG. 10 shows a heating zone 2 according to this embodiment.
2, a block diagram of the control unit 24 and the like. As described above, the heating zone 22 includes the heating unit 22b and the cooling unit 22c, and is controlled by the control unit 24. Heating unit 22
b is divided into five heater blocks 22ba to 22be, and heaters 43a to 43e and a thermometer 31 are provided corresponding to each of the heater blocks 22ba to 22be. The heater blocks 22ba to 22be are
3a to 43e, each heater block 22
The temperatures of ba to 22be are detected by a thermometer 31. The signal of the temperature detected by the thermometer 31 is converted into digital data by an A / D converter (not shown), and then input to the interface 24f via the bus system 47. The control unit 24 determines the power to be applied to each of the heaters 43a to 43e based on this signal, and independently controls the temperatures of the heater blocks 22ba to 22be.

The cooling unit 22c is also divided into five cooling blocks 22ca to 22ce, and the control valves 46a to 46ce correspond to the respective cooling blocks 22ca to 22ce.
46e, a thermometer 31 is provided. Control valves 46a-
A bus system 47e controls the amount of cooling gas supplied to the cooling blocks 22ca to 22ce.
The configuration is controlled by the control unit 24 via the. Therefore, the temperatures of the cooling blocks 22ca to 22ce are independently controlled. The gas circulation device 45 is for supplying a cooling gas to the cooling unit 22c.

The walking beams 27 a to 27 f are driven by a beam driving device 44, and the transport speed in the beam driving device 44 can be controlled by the control unit 24.
Accordingly, the time during which the wafer W passes from the heating unit 22b to the cooling unit 22c can be changed.

The control unit 24 includes a CPU 24a, a memory system 24g, a bus system 24e, an interface 2
4f. The memory system 24g includes a program memory 24b, a data table 24c, a working memory 24d, and the like.
Reading and writing of data is performed by the CPU 24a via 4e. The instruction code is written in the program memory 24b, and the CPU 24a executes a predetermined program by sequentially reading the instruction codes.

The data of the standard temperature profile in the heating process is written in the data table 24c. The temperature profile data is stored in the heater block 22.
ba to 22be, data representing the control target temperature at each time for each of the cooling blocks 22ca to 22ce,
And data representing the transport speed of the walking beam at each time. It is also possible to add data of a new temperature profile to the data table 24c.

In preparing these temperature profile data, a thermocouple is provided on a test wafer,
It is transported from the heating unit 22b to the cooling unit 22c. Then, the tester manually adjusts the temperature of each block of the heating unit 22b and the cooling unit 22c, and the transport speed of the walking beam, and determines an optimal temperature profile by repeating trial and error. The data of the temperature profile obtained in this way is written to the data table 24c.

The working memory 24d is used as an operation area of the CPU 24a, and stores a stack pointer and the like. When reading the data of the temperature profile from the data table 24c, the CPU 24a stores the data in the working memory 24d. The CPU 24a generates control signals for the heaters 43a to 43e, the control valves 46a to 46e, and the beam driving device 44 based on the data.

The interface 24 f has an input / output buffer, and the heaters 43 a to 43
e, a control signal is transmitted to the control valves 46a to 46e and the beam driving device 44, and a signal from the thermometer 31 is received. Other configurations are the same as those of the above-described semiconductor wafer heat treatment apparatus according to the first embodiment, and thus description thereof is omitted.

Next, the operation of the semiconductor wafer heat treatment apparatus according to the present embodiment will be described with reference to the flowcharts of FIGS. First, when the power is turned on to the heat treatment apparatus, the CPU 24a sets the apparatus to an initial state (step S1). Then, the CPU 24a reads the state of switches and the like on an operation panel (not shown) and determines the temperature profile selected by the operator. When the temperature profile is determined (step S
2) The CPU 24a reads the temperature profile data from the data table 24c and
Store in d. FIG. 11 shows an example of the temperature profile data. The horizontal axis in this figure is the heater blocks 22ba to 22be and the cooling block 22ca of the silicon wafer.
The vertical axis represents the surface temperature of the silicon wafer. As can be seen from this figure, the silicon wafer was heated from the heater blocks 22ba to 22ba.
The surface temperature rises by sequentially passing through 22be,
The surface temperature drops rapidly by passing through the cooling blocks 22ca to 22ce. Note that the temperature profile used in the present embodiment is not limited to the temperature profile shown in FIG.

In step S3, the CPU 24a detects the temperatures of the heating unit 22b and the cooling unit 22c. That is, the CPU 24 a
The data of the detected temperature is requested from the thermometer 31 provided in each of the ba to 22be and the cooling blocks 22ca to 22ce, and this data is temporarily stored in the working memory 24d. The CPU 24a assigns the data of the detected temperature to the temperature profile, and the blocks 22ba to 22b
e, it is determined whether or not the current temperatures of 22ca to 22ce satisfy the temperature profile. If each temperature deviates from the target value (NO in step S4), C
The PU 24a generates control signals for the heating unit 22b and the cooling unit 22c according to the data table generated in Step S5.

The CPU 24a proceeds to step S6 to output a control signal to each of the heaters 43a to 43e, the control valves 46a to 46e, and the beam driving device 44. However, the beam driving device 44 does not drive the walking beam at this stage. After step S6, the CPU 24a returns to step S3, and sets the heater blocks 22ba to 22ba.
be, the processes of steps S3 to S6 are repeatedly executed until the temperatures of the cooling blocks 22ca to 22ce reach the target values.

The heaters 43a to 43e and the control valve 46a
When the temperature of each of the heater blocks 22ba to 22be and the cooling blocks 22ca to 22ce is adjusted to the target value, the determination result of step S4 becomes YES, and the preparation for the heat treatment is completed. The CPU 24a proceeds to step S7,
It is checked whether the cassette loader 21, the cassette unloader 23, and the walking beam 27 have already been operated. When the CPU 24a passes step S7 for the first time, the determination result in step S7 is NO,
24a is a cassette loader 21, a cassette unloader 23
Is started (step S8). Further, in step S9, the CPU 24a starts the walking beam 27, and the cassette loader 21 supplies a silicon wafer to the walking beam 27. The silicon wafers are heated one by one by the heating unit 22b and thereafter cooled by the cooling gas.

Since the heater blocks 22ba to 22be and the cooling blocks 22ca to 22ce are set to target temperatures, the temperature of each silicon wafer changes according to the temperature profile shown in FIG. As a result, the number of thermal donors can be effectively reduced.

The CPU 24a proceeds to step S10 and checks whether at least one silicon wafer remains in the cassette loader. If a silicon wafer is found in the cassette loader (NO in step S10),
The CPU 24a proceeds to step S11. The CPU 24a checks the operation panel to confirm whether the temperature profile has been changed (step S11). If the temperature profile has not been changed (NO in step S11), the process returns to step S3 of the CPU 24a. The CPU 24a repeatedly executes the processing of steps S3 to S7, S10, and S11, and as a result, the silicon wafer matches the given temperature profile.

The CPU 24a determines in steps S3 to S7, S1
0, S11, the heater blocks 22ba to 22be and the cooling block 22ca
The temperature of ~ 22ce deviates from the target temperature. In this case, the determination result of step S4 is NO, and the CPU 24
a generates a control signal again (step S5),
3a to 43e, the control valves 46a to 46e, and the beam driving device 44 (Step S6). Heaters 43a to 43
e, the control valves 46a to 46e adjust the temperature of each block, and the beam driving device 44 controls the walking beam 2
7 is controlled. When the current temperature returns to the target value, the determination result of step S4 becomes YES,
The CPU 24a returns to the loop including steps S3 to S7, S10, and S11.

When all the silicon wafers are supplied to the cassette loader and carried out of the cassette unloader,
Since the decision result in the step S10 is YES, the CP
Stop the operation of the U24a cassette loader (step S
12). Then, the CPU 24a examines the operation panel and determines whether or not the heat treatment has been completed. If the supply of one silicon wafer is only delayed, the determination result in step S13 is NO, and the CPU 24a returns to the loop including steps S3 to S7, S10, and S11.

If it is necessary to process a new silicon wafer according to another temperature profile, the operator selects another temperature profile by operating the operation panel. Then, the determination result of step S11 is N
O, the CPU 24a proceeds to step S14. CP
U24a removes all the supplied silicon wafers and the heat treatment apparatus, and stops the operations of the cassette loader, the cassette unloader, and the walking beam. As a result,
The CPU 24a returns to step S2 and reads a new temperature profile from the operation panel. The CPU 24a enters a loop consisting of steps S3 to S6, where the heater blocks 22ba to 22be and the cooling blocks 22ca to 22c
e so that the temperature of the heater 43a matches the new target value.
To 43e, and supply control signals to the control valves 46a to 46e. When the heater blocks 22ba to 22be and the cooling blocks 22ca to 22ce are adjusted to the new target temperatures, the result of the determination in step S4 becomes YES, and the CPU 2
4a returns to the loop consisting of steps S3 to S7, S10 and S11.

When the operator attempts to terminate the operation, when the operator operates the operation panel, no new silicon wafer is supplied to the cassette loader. When the CPU 24a confirms that the result of the determination in step S10 is YES, the CPU 24a stops the cassette loader (step S12). Since the operator has already instructed to end the operation, the determination result in step S13 is YES, and the CPU 24a discharges all the silicon wafers from the present system (step S15).
The CPU 24a proceeds to step S16, and stops the operations of the heater blocks 22ba to 22be, the control valves 46a to 46e, and the walking beam. Thus, the operation of the heat treatment apparatus according to the present embodiment is completed.

It should be noted that modifications may be made to the above-described embodiment without departing from the spirit of the present invention. For example, the semiconductor wafer heat treatment apparatus according to the present embodiment can be applied to germanium semiconductors, compound semiconductors, and the like. Further, the robot hand 23b may be configured by using a means utilizing a suction force. Furthermore, the semiconductor wafer heat treatment apparatus according to the present embodiment may be applied to natural intrinsic gettering and annealing after ion implantation. In addition, a plurality of quartz rollers may be provided every 20 to 30 millimeters instead of the walking beam to convey the silicon wafer at a predetermined speed.

[0068]

Therefore, in the semiconductor wafer heat treatment apparatus according to the present invention, the following effects can be obtained.

(1) According to the present invention, the silicon wafers are automatically transferred from the heating section to the cooling section by the transfer means sequentially one by one. Therefore, the following effects can be obtained as compared with a conventional heat treatment apparatus that performs heat treatment for each boat having a plurality of wafers. There is no need to use dummy wafers to equalize the heat capacity of each boat. Since the wafers are heat-treated one by one, heat treatment can be easily performed even for wafers having different sizes. Since the wafers are heat-treated one by one, the temperature fluctuation of the heating furnace can be reduced as compared with the case where the heat treatment is performed for each boat on which a plurality of wafers are mounted. Compared with the case of the batch processing, the heating processing can be performed continuously and automatically for each wafer, so that the productivity can be improved. Since the wafer is exposed without being stored in the boat, a uniform heat treatment can be performed over the entire wafer. (2) According to the heat treatment apparatus for a semiconductor wafer according to the present invention, the temperature control can be automatically performed by the control unit automatically, so that a uniform heat treatment can be performed while suppressing temperature variations. (3) Since the heat treatment apparatus performs rapid heating, the heat treatment can be completed in a short time.

That is, according to the present invention, it is possible to provide a heat treatment apparatus capable of improving operability, preventing erroneous operations, improving productivity, and performing uniform heat treatment.

[Brief description of the drawings]

FIG. 1 is a front view showing a semiconductor wafer heat treatment apparatus according to a first embodiment of the present invention.

FIG. 2 is a perspective view showing a heating furnace of the semiconductor wafer heat treatment apparatus according to the first embodiment of the present invention.

FIG. 3 is a sectional view showing a heating furnace of the semiconductor wafer heat treatment apparatus according to the first embodiment of the present invention.

FIG. 4 is a graph showing a range of a furnace temperature / transport speed satisfying oxygen precipitation characteristics and donor elimination by the heat treatment apparatus according to the first embodiment of the present invention.

FIG. 5 is a graph showing a generation state of BMD in an oxygen precipitation treatment by the heat treatment apparatus according to the first embodiment of the present invention.

FIG. 6 is a perspective view schematically showing a heat treatment step of a semiconductor wafer using a conventional horizontal furnace.

FIG. 7 is a perspective view schematically showing a heat treatment step of a semiconductor wafer using a conventional vertical furnace.

FIG. 8 is a graph showing a relationship between a donor disappearance time and a holding temperature in a donor killer heat treatment according to the present invention.

FIG. 9 is a sectional view schematically showing a conventional heat treatment apparatus.

FIG. 10 is a block diagram of a heat treatment apparatus according to a second embodiment of the present invention.

FIG. 11 is a graph showing a temperature of a silicon wafer in each heater block and each cooling block according to the second embodiment of the present invention.

FIG. 12 is a flowchart illustrating an operation of the heat treatment apparatus according to the second embodiment of the present invention.

FIG. 13 is a flowchart illustrating an operation of the heat treatment apparatus according to the second embodiment of the present invention.

[Explanation of symbols]

 21 cassette loader 22 heating zone 22c cooling unit 23 cassette unloader 24 control unit W silicon wafer

Claims (1)

(57) [Claims] 1. A wafer supply means (21) for supplying semiconductor wafers one by one, and a wafer discharge means for discharging semiconductor wafers after heat treatment.
(23), the wafer supply means (21) and the wafer discharge means (23)
And a heat treatment means (22) interposed between the wafer supply means (22) and the wafer supply means (21) and the wafer discharge means (23).
Means for supplying a semiconductor wafer
(21) to the wafer discharge means (23) at a predetermined transfer speed and a transfer means (27a
To 27f, 44), a plurality of heating sections (22ba to 22be) each capable of independently heating a semiconductor wafer to a target temperature, and a plurality of heating sections (22ba to 22be) connected to each other, and A plurality of cooling units capable of cooling the semiconductor wafer to a target temperature (22ca to 22ce), at least one temperature profile is stored, and the respective temperatures of the plurality of heating units (22ba to 22be), the plurality of cooling units Section (22ca ~ 22ce), the transport means (27a
27f, a control unit (24) for controlling the transfer speed in accordance with the temperature profile.