JP2734185B2 - Method for manufacturing field effect transistor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a field-effect transistor, and more particularly to a field-effect transistor having a low-resistance gate electrode.

(Prior Art) A high-frequency low-noise field-effect transistor made of a group III-V compound, particularly a Schottky barrier type field-effect transistor, has a gate to reduce noise when used in a microwave / millimeter-wave band. It is important to reduce the gate length as well as the electrode resistance. In view of this, a gate is known as a normal low-noise Schottky barrier type field effect transistor described in Japanese Patent Application Laid-Open No. 61-77370, "Pattern Forming Method". FIGS. 3 (a) to 3 (a) show the formation method and the gate electrode to be formed described in the publication.
It is shown in (c). That is, first, as shown in FIG. 3A, a low-sensitivity positive resist 51 is applied on the semiconductor substrate 50,
Then, a high-sensitivity positive type resist 52 is applied on the low-sensitivity positive type resist 51 and exposed by an electron beam 53. Then, after a phenomenon, a T-shaped resist pattern was obtained,
By depositing a metal 54 as shown in FIG. 3 (b) and removing the resists 51 and 52 and the deposited metal 54 on the resist 52 by organic cleaning, a T-shape is formed as shown in FIG. 3 (c). A mold electrode 55 is formed to reduce the electrode resistance.

(Problems to be Solved by the Invention) The above-described gate electrode having a T-shaped cross section is improved in comparison with an electrode formed by a conventional single-layer resist in that the resistance of the electrode can be reduced. Since the length is determined by the opening width of the lower resist, it becomes more difficult to obtain a fine electrode length as the thickness of the lower resist increases. Therefore, as the gate electrode length becomes shorter, the overhanging portion of the T-shaped gate in cross section becomes closer to the substrate, and as a result, the capacitance between the source electrode and the gate electrode increases, and the low noise characteristics deteriorate. Will be done.

An object of the present invention is to provide a method for manufacturing a field-effect transistor having a fine electrode with reduced resistance, which eliminates such conventional disadvantages.

(Means for Solving the Problems) According to a method for manufacturing a field effect transistor of the present invention, a step of forming at least an active layer required to operate as a field effect transistor on a semiconductor substrate, and forming a source electrode and a drain electrode Forming a gate having a desired length on the active layer region of the semiconductor substrate, forming a gate connection longer than the gate length on the non-active region, and then applying a resist on the entire surface. Forming an opening by light exposure on the source electrode, the drain electrode, and the gate connecting portion; forming a metal film so as to cover the entire surface; applying a resist again on the entire surface; Exposure so that the resist remains on the part and the gate electrode, and after removing the exposed unnecessary metal film, the remaining resist is organically washed or ashed. It is characterized by having a step of removing by processing.

(Operation) In the present invention, since the low-resistance portion of the gate electrode is formed in the air above the high-resistance portion, the low-resistance portion does not approach the substrate even if the gate length is reduced, and the floating between the gate electrode and the source electrode. The capacity can be reduced, and deterioration of low noise characteristics can be prevented. Further, the low resistance portion of the gate electrode can be formed simultaneously with the formation of the source electrode and the drain electrode pads. Further, the constituent metal of the low-resistance portion of the gate electrode may be different from the constituent metal of the high-resistance portion of the gate electrode only for the purpose of reducing the resistance.

(Example) Next, an example of the present invention will be described with reference to the drawings.

1 (a) to 1 (c) are schematic views of an electrode section showing the present invention, and FIGS. 2 (a) to 2 (i) are views showing an example in the order of steps. (B), (c), (e),
(G) and (h) are cross-sectional views taken along the line CC 'of FIG. 2 (a) from the direction of the arrows, and FIGS. 2 (d), (f) and (i).
Is a cross-sectional view taken along the line DD ′ of FIG. FIG. 1A shows the gate electrode 21 formed from the upper surface, and FIG. 1B and FIG.
(C) shows AA 'and B- in FIG. 1 (a), respectively.
This is a view of the cross section at B '. The process is performed by a Schottky gallium arsenide field effect transistor (Ga
AsMESFET) will be described as an example. First, as shown in FIG. 2A, a substrate 10 including an active layer 13 and a non-active layer 16 is formed.
A source electrode 11 and a drain electrode 12 are formed on an active region (for example, an n region having a thickness of 0.1 μm and doped with silicon (Si) as an impurity in GaAs at 10 ¹⁷ cm ⁻³ units) 13. Then, a high-resistance gate electrode (for example, titanium / aluminum (Ti / Al), Ti thickness 10 nm or more, Al thickness 100 nm or more, gate length 0.25 μm or less) 14 is placed between the source electrode 11 and the drain electrode 12. At the same time, a gate connection 15 is formed on a non-active layer (for example, a semi-insulating GaAs layer) 16. Next, as shown in FIGS. 2C and 2D, a resist 17 is formed on the entire surface.
After the application, an opening 18 is formed on the gate connection portion 15, the source electrode 11, and the drain electrode 12. Then the second
As shown in FIGS. 7E and 7F, a metal film 19 (for example, titanium / gold (Ti / Au), Ti having a thickness of 10 n) covers the entire surface.
m, Au thickness 400 nm or more), and then a resist 20 is applied and formed so as to cover the entire surface of the metal film. Then the second
Exposure is performed so that the resist 20 remains on the opening 18 and the gate electrode 14 as shown in FIG. Then, argon (A
r) The metal film 19 exposed by the milling 21 is removed. Next, as shown in FIGS. 2 (h) and 2 (i), unnecessary resists 17 and 20 are removed, so that the low-resistance portion 22 of the gate electrode is formed above the high-resistance portion gate electrode 14 in parallel in the air above. Then, the high-resistance portion gate electrode 14 and the low-resistance portion gate electrode 22 can be connected on the two inactive layers 16.

The dimensions of each part of the gate formed as described above are such that the low resistance part 22 is 0.8 μm × 0.4
μm (horizontal × vertical), high resistance part 14 is 0.25 μm × 0.3 μm
(Gate length × height). The active layer 13 at the bottom of the low resistance part
The distance from above can be controlled by the thickness of the resist 17, and is not limited by the gate length, and a distance of 1 μm or more can be selected by selecting the resist 17. In a conventional T-type gate, the distance between the low-resistance portion and the active region is determined by the gate length. For example, with a 0.1 μm gate, it is about 0.15 μm, and it is difficult to take a distance of 0.5 μm. Therefore, according to the present invention, the floating capacitance (distance 1 μm) between the gate and the substrate formed by the low-resistance portion is improved to 1/6 or less as compared with the conventional T-type gate (distance 0.15 μm). . The above embodiment is a GaAs MESFET
However, it is only necessary to be able to form a field-effect transistor using a metal as a Schottky electrode, which is for describing a process, for example, forming a two-dimensional electron gas. High mobility transistor (HEMT). Ti as gate metal for high resistance part
/ Al was used to explain the process,
If a semiconductor and a Schottky electrode are formed, for example, tungsten (W) or tungsten silicide (WS)
i) or aluminum (Al). Further, although Ti / Au is used as the metal of the low resistance portion, a metal having a low line resistance can be used.

(Effects of the Invention) In the present invention, since the low-resistance portion of the gate electrode is formed in the air above the high-resistance portion, the low-resistance portion does not approach the substrate even when the gate length is reduced, and the gap between the gate electrode and the source electrode is reduced. Can reduce the stray capacitance, and can prevent the deterioration of the low noise characteristic. Further, the low resistance portion of the gate electrode can be formed simultaneously with the formation of the source electrode and the drain electrode pads. Further, the constituent metal of the low-resistance portion of the gate electrode may be different from the constituent metal of the high-resistance portion of the gate electrode only for the purpose of reducing the resistance.

[Brief description of the drawings]

FIG. 1 is a schematic view of an electrode part showing one embodiment of the present invention, and FIG.
FIG. 3 is a schematic view of an electrode part showing a manufacturing process of the present invention, and FIG. 3 is a schematic view of an electrode part showing a conventional method for forming a fine electrode in the order of steps. 10, 50 ... semiconductor substrate, 11 ... source electrode, 12 ... drain electrode, 13 ... active area, 14 ... gate electrode (high resistance part), 15 ... gate connection part, 16 ... non-active area , 17,20
... Resist, 18 ... Opening, 19 ... Metal film, 21 ... Argon milling, 22 ... Gate electrode (low resistance part), 51 ...
… Low-sensitivity positive resist, 52… high-sensitivity positive resist, 53… electron beam, 54… deposited metal, 55… electrode

Claims (1)

(57) [Claims] 1. A step of forming at least an active layer of a field effect transistor on a semiconductor substrate, and a step of forming a gate having a desired length on an active layer region of the semiconductor substrate on which a source electrode and a drain electrode are formed. Forming a gate connection longer than the gate length on the non-active layer region, and then applying a resist over the entire surface to form an opening by light exposure on the source electrode, the drain electrode and the gate connection. And forming a metal film so as to cover the entire surface, and then again applying and forming a resist on the entire surface, and performing exposure so that the resist remains on the opening and the gate electrode of the resist. And removing the remaining resist by organic cleaning or ashing after removing the metal film.