JP2734751B2 - Digital type time limit relay - Google Patents

Description

Description: BACKGROUND OF THE INVENTION (Industrial Application Field) The present invention relates to a digital type time limit relay, and more particularly, to a method for quickly returning after confirming operation during an operation test.

(Prior Art) As a conventional digital type time limit relay, for example, as shown in FIG. 4, a current transformer 3 is attached to a power system 2 for supplying power to a protected object 1 and passes through the power system 2. The current value is detected and sent to the digital time limit relay 6, and the digital time limit relay 6 monitors a change in the current value and detects an abnormal current. The power supply from the power system 2 to the protected object 1 is cut off to prevent an abnormal current from being supplied to the protected object 1.

The operation of the time limit relay 6 will be specifically described. A current value passing through the power system 2 is detected by the current transformer 3 and sent to the time limit relay 6 as an input current value I. On the other hand, a current set value _Iset is set in advance in the time limit relay 6, and a difference ΔI from the input current value I can be obtained by the following equation.

ΔI = I−I _set (1) This difference ΔI is obtained at every fixed sampling period and is sequentially integrated to obtain an integrated value ΣΔI.

A limit set value t is set in advance in the digital type time limit relay 6, and the product of the time limit set value t and the current set value I _set is multiplied by a proportional coefficient K to obtain the following equation. The time limit set value K _A is obtained.

K _A = K · I _set · t (2) This set time limit value K _A and the integrated value ΣΔI are compared for each sampling period, and the integrated value ΣΔI is set to the set time limit value K _A.
Is exceeded, a cutoff signal is output to a circuit breaker on the power system 2 (not shown).

The proportional coefficient K can be changed by adjustment using a lever or the like (not shown), and the ratio (%) between the detected input current value I and the current set value I _set when the proportional coefficient K is switched. FIG. 3 shows the relationship between the operation time and the operation time (second).

As shown in FIG.
In the case where the ratio of the detected input current value I _{exceeding the} current set value _Iset is small, the distance between the axes required for the operation is long, and when the ratio is large, the time required for the operation is short. By switching the lever according to the overcurrent withstand characteristic of the protected object 1 and changing the proportional coefficient K, the protected object 1 can be appropriately protected.

(Problems to be Solved by the Invention) By the way, various arithmetic processes in the conventional digital type time limit relay described above are executed by a built-in microcomputer, and a difference ΔI calculated for each sampling cycle is counted using a counter, and the difference ΔI is calculated. The integrated value ΣΔI has been obtained by adding or subtracting the count value according to the sign of ΔI.

When conducting an operation test of this digital type time limit relay, after confirming the performance by measuring the time until the operation by adding a current value equal to or more than the current set value I _set and then confirming the input current value I, Decrease it below the set value I _set to obtain the integrated value ΣΔ
It is necessary to decrease the value of the counter until I becomes zero. Therefore, if the original use is started without clearing the value of the counter to zero, a positive value remains in the integrated value ΣΔI in the initial state, and the operation timing is advanced, which causes a malfunction. In other words, the conventional digital type time limit relay is
Even after the operation test, a reset operation for applying a low current value for a certain period of time was required to bring the digital type time limit relay into the initial state, which hindered the efficiency of the operation test.

The operation test and the subsequent return will be described with reference to a specific example. In the operation characteristic diagram of FIG. 3, for example, a coefficient K is set to # 10 by lever adjustment, and 120% of the current set value _Iset is _set .
When the current value is applied, the operation time becomes about 38 seconds. If the time for the return is further added, one operation test requires one minute or more.

As described above, since the return time in the operation test is meaningless for the test itself and only hinders the efficiency of the test, the time when the input current value I decreases to a predetermined value equal to or less than the current set value _Iset A digital type time limit relay has been proposed in which the value of a counter for counting the integrated value ΣΔI is forcibly reset to shorten the return time.

However, in the case of this reverse time limit relay, for example, when used for an intermittent operation in which the current value repeatedly fluctuates between zero and a certain value like an electric heater of a heating furnace, the integrated value ΣΔI Is reset, and a normal function as a digital type time limit relay cannot always be obtained.

The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to provide a digital type capable of performing normal operation even when an object to be protected intermittently operates and performing an operation test efficiently. It is to provide a time limit relay.

(Means for Solving the Problems) In order to achieve the above object, the present invention obtains a difference between a voltage value or a current value detected from a power system and a preset set value, and calculates the difference between the values. A digital type time limit relay that generates a cutoff signal when the integrated value exceeds a preset allowable value, which is provided on the relay body,
A changeover switch for switching the mode to the normal use mode or the operation test mode and visually recognizing the mode state, and a switch below the reset value which has been set to a value lower than the settling value in the state switched to the operation test mode. When a voltage value or a current value is detected, integrated value clear means for clearing the integrated value up to that point is provided.

(Operation) In the present invention, the switch is switched to the operation test mode by providing the switch for switching between the normal use mode and the operation test mode and visually confirming the mode state in the digital type time limit relay body. After the operation test in the state, if a voltage value or a current value equal to or lower than a reset value lower than a preset set value is detected, the integrated value up to that point is cleared and the recovery time is shortened. Further, when the changeover switch is in the normal use mode, even if a voltage value or a current value equal to or lower than the reset value is detected, the integrated value is not cleared and the normal operation is performed for intermittent operation.

Further, since the setting mode can be easily visually recognized by the changeover switch, it is possible to prevent the setting between the operation test and the normal use from being confused.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram showing an embodiment in which the present invention is applied to a digital type time limit relay operated by a current value.

In the figure, a digital type time limit relay 4 is provided with an operation mode switching operation switch 5 at an easily visible position on the surface of the main body, and can be selectively switched between an operation test mode and a normal use mode. In the figure, the operation test mode is set by switching to the closed state.

The digital type time limit relay 4 has a fourth
As in the conventional example shown in the figure, the current set value _Iset and the time limit set value t are set in advance, and the time set value t, the current set value _Iset, and the proportional coefficient K are used to _{calculate the} inverse of the equation (2). Time limit setting
K _A is obtained. This proportional coefficient K can be similarly adjusted and changed using a lever or the like (not shown).

A current transformer 3 attached to the power system 2 detects and inputs an input current value I passing through the power system 2 to the digital type time limit relay 4.

In both the operation test mode and the normal operation mode, the input current value I and the current set value I _set are compared every sampling cycle, the difference ΔI is sequentially integrated, and the integrated value ΣΔI is set to the inverse time limit value K. _{If A} is exceeded, power system 2
It outputs a cutoff signal for opening a circuit breaker (not shown) installed above.

Here, in the case of the normal operation mode, the calculation of the integrated value ΣΔI is further continued while the cutoff signal is output, and the integrated value ΣI
When ΔI becomes equal to or less than the set time limit value K _A , the output of the cutoff signal is stopped. As a result, an excessive current
When the power is supplied to the protected object 1 via the power system 2 and exceeds the overcurrent withstand characteristic of the protected object 1, the circuit breaker installed in the power system 2 is opened to stop the current supply and to be protected. Protect subject 1.

In the case of the operation test mode, at the time it is further continued calculation of the integrated value ΣΔI while outputting a blocking signal, the input current value I is lowered to below the reset current I _rs current setpoint I _{The set} The integrated value ΣΔI is forcibly cleared, the output of the cutoff signal is stopped, and the operation test ends. The reset current value _Irs set here is appropriately about one half of the current set value _Iset in consideration of malfunction or the like.

Thus, in the operation test mode, the current set value I
_{After conducting} an operation test by applying a current equal to or greater than _set , the current set value I
A current equal to or less than _set is added and the integrated value ΔΣI
Is unnecessary, and the time required for the operation test can be reduced to about half of the conventional time.

FIG. 2 is a flowchart systematically showing the processing described above.

 Hereinafter, the operation will be described with reference to this flowchart.

First, when the operation is started by turning on the power, the operation switch 5 for mode setting is checked (step 20).
1). If the operation switch 5 is in the open position, the normal use mode is set, and the flag under test is reset (step 202).

If the operation switch 5 is in the closed position, the operation test mode is set, and the flag under test is set (step 203).

Next, the input current value I flowing through the power system 2 is
(Step 204).

Further, the difference ΔI is obtained by comparing the input current value I with the current set value _Iset (step 205). If the difference ΔI obtained here is positive, the obtained values are sequentially added to calculate an integrated value ΣΔI (step 206), and the flow proceeds to step 211.

In step 205, the input current value I and the current set value I
_If the difference ΔI from _set is negative, the state of the flag under test is confirmed (step 207), and if the flag is reset, the difference ΔI is subtracted from the integrated value ΣΔI (step 21).
0).

If the flag state during the test is the set state, the input current value I is compared with the reset current value _Irs (step 208),
If the input current value I is greater than the reset current I _rs proceeds to step 210, it subtracts the difference ΔI than the integrated value ShigumaderutaI.

Further, if the input current value I is less than the reset current I _rs clears the integrated value ΣΔI to 0 (step 20
9), and further reset the operation output of the relay installed to output the break signal to the circuit breaker (step 21)
2).

On the other hand, after steps 206 and 210, the process proceeds to step 211,
Comparing an integrated value ΣΔI and Hankiri setting value K _A. If the result of the comparison indicates that the integrated value ΣΔI is smaller than the set time limit value K _A , the process proceeds to step 212, where the operation output of the relay is reset. If the integrated value ΣΔI is equal to or greater than the set time limit value K _A , the process proceeds to step 213, where the operation output of the relay is set, and the cutoff signal is output to the circuit breaker. By repeating the above processing cyclically, the function as the digital type time limit relay 4 is realized.

As shown in this flowchart, in this embodiment,
By setting the operation switch 5 during the test by switching the flag, the input current I after the operation of the operation test integrated value ΣΔI at the time of lower than the reset current I _rs is forcibly cleared, immediately initial state Return. As a result, the time required for the operation test of the digital type time limit relay is reduced, and the efficiency of the operation test is improved.

In the figure, a digital type time limit relay for monitoring only the electric power system 2 is shown. However, in the case of a three-phase electric power system, a relay for monitoring the current for each phase is provided, and they are connected to the same unit. And the mode of each relay is commonly switched by using the common operation switch 5.

Although the embodiment has been described with respect to a digital type time limit relay for detecting a current value, the present invention can be similarly applied to a digital type time limit relay for monitoring a change in voltage.

(Effect of the Invention) As described above, according to the present invention, the integrated value is cleared when the input value falls below a predetermined value after the operation test is performed by switching the operation test mode. It is possible to shorten the operation time, and the efficiency of the operation test is improved.

Further, when the mode is switched to the normal use mode, the integrated value is not cleared even if the input value decreases, so that it is possible to operate normally even for the protected target that is operated intermittently.

Furthermore, by making the setting mode of the changeover switch easily visible, it is possible to prevent confusion between the setting of the operation test and the setting of normal use.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of the present invention, FIG. 2 is a flowchart showing the processing operation of the embodiment, FIG. 3 is a characteristic diagram showing the relationship between input current and operation time, and FIG. It is a schematic structure figure showing an example. 1 ... protected object, 2 ... power system, 3 ... current transformer, 4
…… Digital type time limit relay, 5 …… Operation switch,
I: input current value, I _set: current set value, I _rs: reset current value, ΔI: difference, ΣΔI: integrated value, K:
Proportional coefficient, K _A …… Reverse time setting value, t …… Time setting value

Claims (1)

(57) [Claims] A difference between a voltage value or a current value detected from an electric power system and a preset set value is obtained, and when an integrated value of the difference exceeds a preset allowable value. In a digital type time limit relay that generates a cutoff signal, a changeover switch that is provided on the relay body and switches between the normal use mode and the operation test mode and allows the user to visually check the mode state. When a voltage value or a current value that is equal to or lower than a reset value set in advance to a value lower than the set value is detected, an integrated value clearing unit that clears the integrated value up to that point. Digital type time limit relay.