JP2742863B2 - Flexible circuit board manufacturing method and mask - Google Patents
Flexible circuit board manufacturing method and maskInfo
- Publication number
- JP2742863B2 JP2742863B2 JP15732593A JP15732593A JP2742863B2 JP 2742863 B2 JP2742863 B2 JP 2742863B2 JP 15732593 A JP15732593 A JP 15732593A JP 15732593 A JP15732593 A JP 15732593A JP 2742863 B2 JP2742863 B2 JP 2742863B2
- Authority
- JP
- Japan
- Prior art keywords
- mask
- pattern
- circuit board
- flexible circuit
- support
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000005530 etching Methods 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 239000010410 layer Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000010019 resist printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Preparing Plates And Mask In Photomechanical Process (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、フレキシブル回路基板
の製造方法及びマスクの構造に関する。The present invention relates to a method of manufacturing a flexible circuit board and a structure of a mask.
【０００２】[0002]
【従来の技術】従来のフレキシブル回路基板用マスク
は、図２に示す様に、マスク基材１上にフレキシブル回
路基板の配線パターンに相当する本パターン２を形成し
た構造であった。このマスクを使って露光、現像後、銅
をエッチングし、銅パターンを配したフレキシブル回路
基板を供給していた。なお、回路基板が完成した際に支
持体が無く、銅パターンのみが形成される一層構造部分
マスク上相当部３、銅パターンと一層もしくは多層の支
持体で形成された多層構造部分マスク上相当部４を図２
に示しておく。2. Description of the Related Art A conventional flexible circuit board mask has a structure in which a main pattern 2 corresponding to a wiring pattern of a flexible circuit board is formed on a mask substrate 1 as shown in FIG. After exposing and developing using this mask, copper was etched to supply a flexible circuit board having a copper pattern. In addition, when the circuit board is completed, there is no support, and only the copper pattern is formed. The corresponding portion 3 on the one-layer structure partial mask is formed. 4 to FIG.
Will be shown below.
【０００３】[0003]
【発明が解決しようとする課題】しかし、前述の従来構
造では、エッチング時に本パターンと本パターンの間の
空隙部にエッチング液が集中し、他の部分に比べて、空
隙部に隣接するパターンのエッチング量が多くなり、パ
ターン形状精度の劣るフレキシブル回路基板を供給せざ
るをえないという課題を有する。そこで本発明はこのよ
うな課題を解決するもので、その目的とするところは、
パターンの形状精度の高いフレキシブル回路基板を供給
するところにある。However, in the above-mentioned conventional structure, the etching solution concentrates in the gap between the present patterns during the etching, and the pattern adjacent to the gap is more concentrated than the other portions. There is a problem in that the amount of etching increases, and a flexible circuit board with inferior pattern shape accuracy must be supplied. Therefore, the present invention solves such a problem, and the purpose thereof is to:
The point is to supply a flexible circuit board with high pattern shape accuracy.
【０００４】[0004]
【発明が解決するための課題】本発明のフレキシブル回
路基板の製造方法は、支持体上及び前記支持体が無い領
域上に連続して設けられた金属膜をエッチングし複数の
配線パターンを設けるフレキシブル回路基板の製造方法
において、前記支持体上及び前記支持体が無い領域上に
連続して設けられる複数の前記配線パターンを作成する
第１のマスクパターンと、前記配線パターン間に設けら
れ、かつ前記支持体が無い領域上にのみ設けられるダミ
ーパターンを作成する第２のマスクパターンとを前記金
属膜上に露光現像する工程、エッチングにより、前記第
１及び第２のマスクパターン以外の前記金属膜を除去
し、前記金属膜の前記ダミーパターンを離脱させ、所望
の配線パターンを形成する工程を有することを特徴とす
る。また、本発明のマスクは、支持体上及び前記支持体
が無い領域上に連続して設けられた複数の配線パターン
をエッチングにより設けるためのマスクにおいて、複数
の前記配線パターンを作成する第１のマスクパターン
と、前記配線パターン間に設けられ、かつ前記支持体が
無い領域上にのみ設けられるダミーパターンを作成する
第２のマスクパターンを有することを特徴とする。SUMMARY OF THE INVENTION The flexible circuit of the present invention
The method of manufacturing a circuit board is a method of manufacturing a flexible circuit board in which a plurality of wiring patterns are formed by etching a metal film continuously provided on a support and a region where the support is not provided, wherein the support and the A first mask pattern for creating a plurality of the wiring patterns continuously provided on the region without the support, and a dummy pattern provided between the wiring patterns and provided only on the region without the support. Exposing and developing a second mask pattern to be formed on the metal film, removing the metal film other than the first and second mask patterns by etching, and separating the dummy pattern of the metal film; And a step of forming a desired wiring pattern. Further, the mask of the present invention is a mask for forming a plurality of wiring patterns continuously provided on a support and a region where the support is not provided by etching, wherein a first plurality of the wiring patterns is formed. The semiconductor device is characterized by having a mask pattern and a second mask pattern for creating a dummy pattern provided between the wiring patterns and provided only on a region where the support is not provided.
【０００５】[0005]
【実施例】本発明はフレキシブル回路基板において、マ
スク上の本パターンの空隙部に最終的には消滅するダミ
ーパターンを設け、そのマスクを使って、パターンを露
光工程で焼き付け、現像し、エッチング時にダミーパタ
ーンがエッチング液による銅の浸食の緩衝壁になる事に
より、ダミーパターンに隣接する銅の本パターンの形状
精度を向上させ、形状精度の高いフレキシブル回路基板
を供給することを可能にする、フレキシブル回路基板用
マスク構造。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention provides a flexible circuit board with a dummy pattern which finally disappears in a void portion of the pattern on a mask, and using the mask, prints the pattern in an exposure process, develops the pattern, By making the dummy pattern a buffer wall for the erosion of copper by the etchant, the shape accuracy of the copper main pattern adjacent to the dummy pattern can be improved, and a flexible circuit board with high shape accuracy can be supplied. Mask structure for circuit board.
【０００６】以下に本発明の実施例を図面にもとづいて
説明する。図１は本発明のフレキシブル回路基板用マス
クの平面図、図２は従来のフレキシブル回路基板用マス
クの平面図である。An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of a mask for a flexible circuit board of the present invention, and FIG. 2 is a plan view of a conventional mask for a flexible circuit board.
【０００７】本発明のフレキシブル回路基板用マスク
は、マスク基材１上にフレキシブル回路基板の配線パタ
ーンに相当する本パターン２を形成し、さらに、本パタ
ーンと本パターンの空隙部にダミーパターン５を形成し
た構造である。フレキシブル回路基板を製造する際には
本発明のマスクを使って露光し、現像後、銅をエッチン
グして、配線パターンを形成するのであるが、本発明の
マスクを使えば、エッチングの際にシャワー状に降り注
ぐエッチング液に対する緩衝壁として、ダミーパターン
５が機能し、ダミーパターン５に隣接する本パターン２
へ注ぐシャワー状のエッチング液の勢いを柔らげること
になる。これにより、ダミーパターン５に隣接する本パ
ターン２の過剰エッチングを緩和することができる。な
お本パターン２は、多層の支持体で形成された多層構造
部分に、つながっている為、脱落しないが、ダミーパタ
ーン５は銅パターンのみが形成される一層構造部分内に
あり、多層の支持体で形成された多層構造部分と、切り
離されている為、エッチング完了後、脱落し、消滅す
る。この後、必要に応じ、ソルダーレジスト印刷、メッ
キを行い、形状精度の高いフレキシブル回路基板が完成
する。In the mask for a flexible circuit board according to the present invention, a main pattern 2 corresponding to a wiring pattern of a flexible circuit board is formed on a mask substrate 1, and a dummy pattern 5 is formed in a gap between the main pattern and the main pattern. It is a formed structure. When manufacturing a flexible circuit board, exposure is performed using the mask of the present invention, and after development, copper is etched to form a wiring pattern. With the use of the mask of the present invention, a shower is formed during etching. The dummy pattern 5 functions as a buffer wall for the etching solution falling in the shape of the main pattern 2 adjacent to the dummy pattern 5.
This will soften the momentum of the shower-like etching solution poured into the chamber. Thus, over-etching of the main pattern 2 adjacent to the dummy pattern 5 can be reduced. Note that the present pattern 2 does not fall off because it is connected to a multilayer structure portion formed of a multilayer support, but the dummy pattern 5 is in a single-layer structure portion where only a copper pattern is formed. Since it is separated from the multi-layered structure formed by the above, it drops off and disappears after etching is completed. Thereafter, if necessary, solder resist printing and plating are performed to complete a flexible circuit board with high shape accuracy.
【０００８】[0008]
【発明の効果】以上述べたように本発明では、ダミーパ
ターンを有することにより、配線パターンの形状精度を
向上させることができる。また、支持体がない領域上に
のみダミーパターンを有することにより、特別な工程を
加えることなく、エッチング終了後は不要になるダミー
パターンを除去できるという効果を有するものである。 As described above, according to the present invention, the dummy
By having turns, the shape accuracy of the wiring pattern can be improved
Can be improved. Also, on areas where there is no support
Special process by having only dummy pattern
Dummy that becomes unnecessary after etching without adding
This has the effect that the pattern can be removed.
【図１】 本発明のフレキシブル回路基板用マスクの平
面図。FIG. 1 is a plan view of a mask for a flexible circuit board of the present invention.
【図２】 従来のフレキシブル回路基板用マスクの平面
図。FIG. 2 is a plan view of a conventional mask for a flexible circuit board.
１‥‥マスク基材 ２‥‥本パターン ３‥‥一層構造部分マスク上相当部 ４‥‥多層構造部分マスク上相当部 ５‥‥ダミーパターン 1} Mask base material 2} Pattern 3) Part corresponding to one layer structure partial mask 4} Part corresponding to multilayer structure partial mask 5) Dummy pattern
Claims (2)
連続して設けられた金属膜をエッチングし複数の配線パ
ターンを設けるフレキシブル回路基板の製造方法におい
て、 前記支持体上及び前記支持体が無い領域上に連続して設
けられる複数の前記配線パターンを作成する第１のマス
クパターンと、前記配線パターン間に設けられ、かつ前
記支持体が無い領域上にのみ設けられるダミーパターン
を作成する第２のマスクパターンとを前記金属膜上に露
光現像する工程、 エッチングにより、前記第１及び第２のマスクパターン
以外の前記金属膜を除去し、前記金属膜の前記ダミーパ
ターンを離脱させ、所望の配線パターンを形成する工
程、 を有することを特徴とするフレキシブル回路基板の製造
方法。1. A method for manufacturing a flexible circuit board , wherein a plurality of wiring patterns are formed by etching a metal film continuously provided on a support and a region where the support is not provided, wherein the support and the support are provided. A first mask pattern for forming a plurality of the wiring patterns continuously provided on the region where there is no support, and a dummy pattern provided between the wiring patterns and provided only on the region where the support is not provided. Exposing and developing a second mask pattern on the metal film; removing the metal film other than the first and second mask patterns by etching to separate the dummy pattern of the metal film; method of manufacturing a flexible circuit board characterized by having a step, to form a wiring pattern.
連続して設けられた複数の配線パターンをエッチングに
より設けるためのマスクにおいて、 複数の前記配線パターンを作成する第１のマスクパター
ンと、前記配線パターン間に設けられ、かつ前記支持体
が無い領域上にのみ設けられるダミーパターンを作成す
る第２のマスクパターンを有することを特徴とするマス
ク。2. A mask for providing a plurality of wiring patterns continuously provided on a support and on a region where there is no support by etching, a first mask pattern for forming a plurality of the wiring patterns. And a second mask pattern for forming a dummy pattern provided between the wiring patterns and provided only on a region where the support is not provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15732593A JP2742863B2 (en) | 1993-06-28 | 1993-06-28 | Flexible circuit board manufacturing method and mask |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15732593A JP2742863B2 (en) | 1993-06-28 | 1993-06-28 | Flexible circuit board manufacturing method and mask |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0683035A JPH0683035A (en) | 1994-03-25 |
| JP2742863B2 true JP2742863B2 (en) | 1998-04-22 |
Family
ID=15647234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15732593A Expired - Fee Related JP2742863B2 (en) | 1993-06-28 | 1993-06-28 | Flexible circuit board manufacturing method and mask |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2742863B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007048963A (en) * | 2005-08-10 | 2007-02-22 | Sharp Corp | Printed wiring board manufacturing method, printed wiring board photomask, and photomask creation program |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5878150A (en) * | 1981-11-02 | 1983-05-11 | Nec Corp | Glass mask |
| JPS62299852A (en) * | 1986-06-19 | 1987-12-26 | Toshiba Corp | Exposure mask |
| JPS6459832A (en) * | 1987-08-31 | 1989-03-07 | Toshiba Corp | Manufacture of semiconductor device |
-
1993
- 1993-06-28 JP JP15732593A patent/JP2742863B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0683035A (en) | 1994-03-25 |
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