JP2744540B2 - Digital signal receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal receiving apparatus used in a wireless network for transmitting high-speed digital signals such as a cellular phone and a LAN, and more particularly, to a digital signal receiving apparatus shown in FIG.
As such, the frequency F _C of the carrier, the symbol rate F _B of the modulated digital _{signal, | F C -F L | ≧} (1/2) · F B becomes receiving relationship with the reference signal of frequency F _L with high frequency a phase detection means for detecting a baseband signal from the signal, the phase of the baseband signal detected by the detecting means that the frequency F _C -F _L in which by a / D conversion at [pi / 2 intervals relative to the phase rotation and quadrature component deriving means Ru <br/> to derive straight interlinked baseband signal component, the quadrature component data and one time slot before modulated digital signal and a quadrature component data converted to digital data by the quadrature component deriving means And a delay detection means for calculating and deriving the following.

[0002]

2. Description of the Related Art The above-mentioned digital signal receiving apparatus includes a delay detecting means for calculating and deriving a modulated digital signal from the orthogonal component data converted by the orthogonal component deriving means and the orthogonal component data one time slot before. As shown in FIG.
Sea urchin, shea for the quadrature component data one time slot delayed
A delay circuit composed of a shift register and three or four multipliers and adder / subtracters are provided so as to calculate and derive a modulated digital signal as in the following equation (Japanese Patent Application No. Hei 2-2).
52338). Now, the n-th symbol in the I-th symbol
A / D converted baseband signal is assumed to be Si (n)
If the number of samples per bol is M,

[0003]

(Equation 1)

[0004] a Si (n) = Acos (πΣ (j = 0, i) S (j) + (M · (i-1) + n) π / 2) ............... (1). However, 1 ≦ n ≦ M. From this, to obtain a modulated digital signal, I (i, n) = Si (n) .Si-1 (n) + Si (n-1) .Si-1 (n-1) (2) ) Q (i, n) = - Si (n) · Si-1 (n-1) + Si (n-1) · Si-1 (n) applying operation of ............... (3). I (i, n) = Si (n) · Si-1 (n) + Si (n-1) · Si-1 (n-1) = Acos (πΣ (j = 0, i) S (j) + ( M (i-1) + n) π / 2) Acos (πΣ (j = 0, i-1) S (j) + (M (i-1) + n) π / 2) + Acos (πΣ (j = 0 , i) S (j) + (M (i-1) + n-1) π / 2) Acos (πΣ (j = 0, i-1) S (j) + (M (i-1) + n-1 ) π / 2) = A ² ｛(cosπΣ (j = 0, i) S (j) cos (M (i-1) + n) π / 2 − sinπΣ (j = 0, i) S (j) sin ( M (i-1) + n) π / 2) × cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n) π / 2 − sinπΣ (j = 0, i-1 ) S (j) sin (M (i-1) + n) π / 2) + cosπΣ (j = 0, i) S (j) cos (M (i-1) + n-1) π / 2−sinπΣ ( j = 0, i) S (j) sin (M (i-1) + n-1) π / 2) × cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n -1) π / 2 − sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n-1) π / 2)｝ = A ² ｛(cosπΣ (j = 0, i ) S (j) cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n) π / 2 cos (M (i-1) + n) π / 2 − cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) cos (M (i-1) + n) π / 2 sin (M (i-1) + n) π / 2 − sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 cos (M (i-1) + n) π / 2 + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 sin (M (i-1) + n ) π / 2 + cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n-1) π / 2 cos (M ( i- 1) + n-1) π / 2 − cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) cos (M (i-1) + n-1) π / 2 sin (M (i-1) + n-1) π / 2 − sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1 ) + N-1) π / 2 cos (M (i-1) + n-1) π / 2 + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n-1) π / 2 sin (M (i-1) + n-1) π / 2｝ = A ² ｛cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (cos (M (i-1) + n) π / 2 × cos (M (i-1) + n) π / 2 + cos (M (i-1) + n-1) π / 2cos (M (i-1) + n-1) π / 2) − cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) (cos (M ( i-1) + n) π / 2 × sin (M (i-1) + n) π / 2 + cos (M (i-1) + n-1) π / 2sin (M (i-1) + n-1) π / 2) − sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (sin (M (i-1) + n) π / 2 × cos (M (i− 1) + n) π / 2 + sin (M (i-1) + n) π / 2cos (M (i-1) + n-1) π / 2) + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) (sin (M (i-1) + n) π / 2 × sin (M (i-1) + n) π / 2 + sin (M (i-1) + n-1) π / 2sin (M (i-1) + n-1) π / 2)｝ where cos (M (i-1) + n-1) π / 2 = cos ((M (i-1) + n) π / 2−π / 2) = sin (M (i-1) + n) π / 2, sin (M (i-1) + n-1) π / 2 = sin ((M (i-1) + n) π / 2−π / 2) = − cos (M (i−1) + n) π / 2, so I (i, n) = A ² ｛cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (cos (M (i-1) + n) π / 2 cos (M (i-1) + N) π / 2 + sin (M (i-1) + n) π / 2sin (M (i-1) + n) π / 2) − cosπΣ (j = 0, i) S (j) sinπΣ (j = 0 , i-1) S (j) cos (M (i-1) + n) π / 2 sin (M (i-1) + n) π / 2 −sin (M (i-1) + n) π / 2cos ( M (i-1) + n) π / 2 − sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 cos (M (i-1) + n) π / 2 −cos (M (i-1) + n) π / 2sin (M (i-1) + n) π / 2 + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 sin (M (i-1) + n) π / 2 + cos (M (i-1 ) + n) π / 2cos ( M (i-1) + n) π / 2} = A 2 {cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j)｝ = A ² cos (πΣ (j = 0, i) S (j) −πΣ (j = 0 , i-1) S (j))) = A ² cosπS (i) …………… (4) Q (i, n) = − Si (n) · Si-1 (n-1) + Si (n -1) · Si-1 (n) = -Acos (πΣ (j = 0, i) S (j) + (M (i-1) + n) π / 2) Acos (πΣ (j = 0, i- 1) S (j) + (M (i-1) + n-1) π / 2) + Acos (πΣ (j = 0, i) S (j) + (M (i-1) + n-1) π / 2) Acos (πΣ (j = 0, i-1) S (j) + (M (i-1) + n) π / 2) = A 2 {(-cosπΣ (j = 0, i) S (j ) cos (M (i-1) + n) π / 2 − sinπΣ (j = 0, i) S (j) sin (M (i-1) + n) π / 2) × cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n-1) π / 2 − sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n-1) π / 2) + cosπΣ (j = 0, i) S (j) cos (M (i-1) + n-1) π / 2 − sinπΣ (j = 0, i) S (j) sin (M (i-1) + n-1) π / 2) × cosπΣ (j = 0, i-1) S (j) cos (M ( i-1) + n) π / 2 − sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2)｝ = A ² ｛(cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n) π / 2 cos (M (i-1) + n-1) π / 2 + cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) cos (M (i-1) + n) π / 2 sin (M (i-1) + n-1) π / 2 + sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 cos (M (i-1 ) + N-1) π / 2 − sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 sin ( M (i-1) + n-1) π / 2 + cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) cos (M (i-1) + n- 1) π / 2 cos (M (i-1) + n) π / 2 − cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) cos (M (i -1) + n-1) π / 2 sin (M (i-1) + n) π / 2 − sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1) + n-1) π / 2 cos (M (i-1) + n) π / 2 + sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1 ) S (j) sin (M (i-1) + n-1) π / 2 sin (M (i-1) + n) π / 2｝ = A ² ｛-cosπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (cos (M (i-1) + n) π / 2 × cos (M (i-1) + n-1) π / 2−cos ( M (i-1) + n-1) π / 2cos (M (i-1) + n) π / 2) + cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) (cos (M (i-1) + n) π / 2 × sin (M (i-1) + n-1) π / 2-cos (M (i-1) + n-1) π / 2sin ( M (i-1) + n) π / 2) + sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (sin (M (i-1) + n) π / 2 × cos (M (i-1) + n-1) π / 2−sin (M (i-1) + n) π / 2cos (M (i-1) + n) π / 2) − sinπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) (sin (M (i-1) + n) π / 2 × sin (M (i-1) + n-1) π / 2−sin (M (i-1) + n-1) π / 2sin (M (i-1) + n) π / 2)｝ = A ² ｛cos πΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) (cos (M (i-1) + n) π / 2 × sin (M (i-1) + n-1) π / 2−cos (M (i -1) + n-1) π / 2sin (M (i-1) + n) π / 2) + sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) (sin (M (I-1) + n) π / 2 × cos (M (i-1) + n-1) π / 2− sin (M (i-1) + n-1) π / 2cos (M (i -1) + n) π / 2)｝ where cos (M (i-1) + n-1) π / 2 = cos ((M (i-1) + n) π / 2−π / 2) = sin (M (i-1) + n) π / 2, sin (M (i-1) + n-1) π / 2 = sin ((M (i-1) + n) π / 2−π / 2) = − cos (M (i-1) + n) π / 2, Q (i, n) = A ² ｛cosπΣ (j = 0, i) S (j) sin πΣ (j = 0, i-1) S (j) (− cos (M (i−1) + n) π / 2 × cos (M (i−1) + n) π / 2−sin (M (i− 1) + n) π / 2sin (M (i-1) + n) π / 2) + sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j) sin (M (i-1) + n) π / 2 × sin (M (i-1) + n) π / 2 + sin (M (i-1) + n) π / 2cos (M (i-1) + n) π / 2)｝ = A ² ｛−cosπΣ (j = 0, i) S (j) sinπΣ (j = 0, i-1) S (j) + sinπΣ (j = 0, i) S (j) cosπΣ (j = 0, i-1) S (j)｝ = A ² sin (πΣ (j = 0, i) S (j) -πΣ (j = 0, i-1) S (j))) = A ² sinπS (i) (5) As described above, the modulated digital signal is reproduced.

[0005]

However, in the above-mentioned conventional digital signal receiving apparatus , the phase detecting means is orthogonal.
The baseband signal to obtain a modulated digital signal
Signal from phase detector to A / D conversion for
Eliminates the need for one of the processing circuits, reducing the number of parts and
The board area was reduced accordingly.
Modulated digital from orthogonal baseband signal obtained from
Before the signal is obtained, three or four multipliers and adder / subtractor
Reduced the number of components such as ICs and mounting them
From the viewpoint of reducing the substrate area, it is desired to further reduce the size and cost, and an object of the present invention is to meet these requirements.

[0006]

In order to achieve the above object, a digital signal receiving apparatus according to the present invention is characterized in that the differential detection means is arranged so that the quadrature component deriving means makes the delay detection means equal to π / 2.
Two orthogonal component data A / D converted with different phases
Angle component data corresponding to one of the orthogonal component data from
This is configured to convert and output the modulated digital signal to calculate and derive a modulated digital signal from the angle component data and the angle component data one time slot before.

[0007]

The frequency F _C −F _{L is} calculated by the orthogonal component deriving means.
At any point in the baseband signal where the beat is occurring at
And digital data in which conversion, phase π from that point
The angle component data indicating the phase angle of the baseband signal at that time is derived from the two orthogonal component data consisting of the digital data converted at the time point shifted by 1/2 and the angle component data at the same timing one time slot before. Compare with. That is, in the case of BPSK, the angle component data one time slot before and the current angle component data are subtracted, and if the value is 0, it can be determined that the phase is in-phase, and if the value is π, the phase is opposite.

[0008]

According to the present invention, an arithmetic unit for calculating and deriving a modulated digital signal can be constituted by a single subtractor.
It has become possible to provide a digital signal receiving device in which the size and cost of the device are further reduced.

[0009]

Embodiments will be described below. As shown in FIGS. 1 and 2, the data transmission rate (symbol rate F _B) 1M
Two-phase modulation with bps modulated digital signal [BPSK]
The digital signal receiving apparatus that receives the high-frequency signal having the frequency of 150 MHz, includes a high-frequency amplifier 1 that amplifies the received high-frequency signal,
Frequency F _C of the carrier, for the symbol rate F _B of the modulated digital _{signal, | F C -F L | ≧} (1/2) · F detects a baseband signal by a reference signal of frequency F _L with _B the relationship Phase detecting means 2 for performing
The baseband signal detected by the above is converted to the frequency F _C −
Straight and A / D conversion [pi / 2 intervals relative to the phase rotation of F _L
Orthogonal component deriving means 3 for deriving an intersecting baseband signal component; delay detection means for calculating and deriving a modulated digital signal from the orthogonal component data converted by the orthogonal component deriving means 3 and the orthogonal component data one time slot before. 4 is provided.

The high frequency amplifying means 1 includes a filter BPF for detecting a signal having a carrier frequency of 150 MHz among the signals received from the antenna, a high frequency amplifier 10 for amplifying the output thereof, and an automatic high frequency amplifier 10 for controlling the output level of the high frequency amplifier 10. It comprises a gain controller AGC.

[0011] The phase detection means 2 is provided with | F _C -F _L | ≧
(1/2) · F _B and the reference signal generator 20 for generating a reference signal of frequency F _L (148MHz) satisfying, phase detection for detecting a baseband signal from an output signal of the RF amplifier 10 and the reference signal Demodulator as filter 21 and filter L for removing high-frequency components from its output
It comprises a PF and an amplifying means 22 for amplifying the output of the filter LPF. Therefore, the baseband signal detected by the phase detector 2 has a frequency of 2 MHz (= 15 MHz).
(0 MHz-148 MHz). The amplifying means 22 is composed of a capacitor 23 for AC coupling and an operational amplifier 24, and its output is input to the automatic gain controller AGC.

The orthogonal component deriving means 3 has a frequency of 8 MHz.
z clock oscillator 30 and an A / D converter 31 that converts the baseband signal into a digital signal in synchronization with the clock signal from the clock oscillator 30 and has a frequency F _C −F _L (= A / D conversion is performed on the baseband signal that beats at 2 MHz) at intervals of π / 2.

The delay detection means 4 is adapted to derive the quadrature component.
A / D converted by means 3 with different π / 2 phase
The most recently sampled version of the two orthogonal component data
An angle converter 40 for converting and outputting angle component data corresponding to the intersection component data; a delay detection circuit 41 for calculating and deriving a modulated digital signal from the angle component data by the angle converter 40 and the angle component data one time slot before; It consists of. More specifically, the angle converter 40 has a phase angle of 0.
HEX from 00H to 0FFH corresponding to ° to 360 °
A ROM storing data, a shift register SR8 for securing a digital signal previously converted by the A / D converter 31 having a phase different by π / 2, and a digital signal converted latest by the A / D converter 31 Signal and the shift register SR
An access circuit (not shown) for reading the angle component data of the baseband signal from the ROM from the data of No. 8
.., SR7 for delaying the angle component data by one time slot, and the value of the last-stage shift register SR7 and the latest angle component data. Arithmetic unit 4 to subtract
3. That is, the output of the arithmetic unit 43 is 00
H, that is, if the angle component data of one time slot before and this time are equal, the data of the previous time and this time are equal, and the arithmetic unit 43
Is 80H, that is, if the angle component data of one time slot before and this time are inverted in phase, it is determined that the data of the previous time and that of this time are different. Here, the arithmetic unit 43 is an 8-bit subtractor that indicates 00H at 0 ° and 80H at 180 °. If the modulated digital signal is converted into a sum at the time of transmission, it can be accurately identified and reproduced.

Another embodiment will be described below. In the above embodiment, the data transmission rate (symbol rate F _B ) is 1 Mbps.
A high-frequency signal with a frequency of 150 MHz that has been subjected to two-phase modulation (BPSK) with a modulated digital signal of
Has been described in the reference signal for the orthogonal detection circuit of the single mixer method of phase detection, data transmission speed, the carrier frequency is optional rather than limited to these values, the reference wave frequency, | F _C -F _L | ≧ (1/2) · F _B
Any frequency as long as F _L that satisfies it. In the above embodiment, the two-phase modulation [BPSK] has been described. However, the present invention is not limited to this and can be applied to any phase modulation.
For example, four-phase phase modulation [QPSK] may be used. In this case, the output of the arithmetic unit 43 is 0 (00H), π / 2
Binary data of 00B, 10B, 11B, and 01B is obtained corresponding to (40H), π (80H), and 3π / 2 (C0H).

In the claims, reference numerals are provided for convenience of comparison with the drawings, but the present invention is not limited to the configuration shown in the accompanying drawings.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram.

FIG. 2 is a timing chart of a main part.

FIG. 3 is a circuit block diagram showing a conventional example.

[Explanation of symbols]

 2 phase detection means 3 orthogonal component derivation means 4 delay detection means

Claims (1)

(57) [Claims] Frequency F _C of claim 1. A carrier for the symbol rate F _B of the modulated digital signal, | at ≧ (1/2) · F reference signal of a frequency F _L with _B the relationship | F _C -F _L Phase detection means (2) for detecting a baseband signal from a received high-frequency signal
The baseband signal detected by the phase detection means (2) with respect to the phase rotated at the frequency F _C -F _L by π /
A / D-converted and orthogonal baseband signal components at two intervals
And the quadrature component deriving means for deriving (3), the quadrature component deriving means (3) by a delay detection which calculates and derives a modulated digital signal and a quadrature component data and one time slot before the quadrature component data converted to digital data Means (4) , wherein said differential detection means (4) is provided with said quadrature component deriving means.
A / D converted by making π / 2 phase different by (3)
From two orthogonal component data to either orthogonal component data
A digital signal receiver configured to convert and output corresponding angle component data, and to calculate and derive a modulated digital signal from the angle component data and the angle component data one time slot before.