JP2753513B2 - Step motor drive circuit for pointer-type electronic timepiece - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a stepping motor drive circuit of a pointer-type electronic timepiece that changes a driving pulse of a stepping motor according to a load.

[Prior art and its problems] A conventional method of controlling a drive pulse of a stepping motor of a pointer-type electronic timepiece can be described, for example, in terms of pulse width control.
A pulse width of several stages is provided between a large pulse width that always rotates the step motor and a small pulse width that is effective for reducing current consumption, and a pulse of any pulse width is selected. If the non-rotation is detected during the driving of the step motor, the drive is performed to recover the non-rotation with the correction pulse having the maximum pulse width. Assuming that the width is one step larger than that when non-rotation occurs, driving is performed for a certain period (for example, one minute).
If no non-rotation is detected during one minute, the pulse width is reduced by one step, that is, to a drive pulse at the time when non-rotation occurs, thereby suppressing the current consumption of the step motor.

Therefore, some step motors do not rotate at the above-mentioned minimum pulse width due to variations in characteristics between individual step motors. In such a case, the pulse width is reduced one step at a time, and the pulse width is reduced to the minimum pulse width. Each time the rotation stops, the pulse width becomes the maximum pulse width for correction. For this reason, the drive pulse continuously fluctuates between the maximum pulse width and the minimum pulse width in a constant cycle, and does not contribute to reduction of current consumption.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described circumstances, and has been made in consideration of the above-described circumstances. For the purpose of providing.

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention detects and stores a pulse having a minimum effective value at which a step motor can rotate among a plurality of pulses having different effective values, and During pulse supply, when the step motor cannot rotate due to a large load under some conditions, change to a pulse with a large effective value.After re-rotation of the step motor is detected, the stored pulse with the minimum effective value is changed. The gist is that a pulse having an effective value less than the minimum effective value is not supplied to the step motor.

EXAMPLES Hereinafter, the present invention will be specifically described based on an example shown in the drawings. In this embodiment, the effective value of the drive pulse is adjusted by the pulse height (voltage).

Configuration FIG. 1 is a diagram showing a circuit configuration of the present embodiment. The oscillating circuit 1 is a circuit that constantly transmits a basic clock signal of a predetermined frequency, for example, 32 KHz. The frequency dividing circuit 2 is a circuit for dividing the frequency of the basic clock signal from the oscillating circuit 1 to a certain frequency and sending the frequency to the pulse generating circuit 3. The pulse generating circuit 3 generates pulse signals φ ₁ ′ and φ ₂ ′ as shown in FIGS. 5A and 5B from the constant frequency signal from the frequency dividing circuit 2, and alternately generates these at 1 second intervals. , And are sent to the OR gates 4 and 5 and given to the CPU 10. The OR gate 4 is connected to the pulse signal φ ₁ ′ and the CPU 1
This is a circuit which receives a pulse signal φ ₁ ″ from 0 and supplies it to the drive circuit 6 as a pulse signal φ _{1. The} OR gate 5 includes the pulse signal φ ′ ₂ and the pulse signal φ ₂ ″ from the inverter 16. enter the door, it is a circuit for applying the driving circuit 6 of these as a pulse signal phi _2. Drive circuit 6
Are the pulse signals φ ₁ and φ ₂ and the signal from the latch 9
This circuit takes in C ₁ , C ₂ , and C ₃ and applies a drive pulse having a predetermined pulse height to the drive coil 7 based on these.
The drive coil 7 is supplied with a drive current by the applied drive pulse, generates a magnetic flux in accordance with the drive current, applies a torque to a rotor (not shown) of the step motor, and rotates the rotor by 180 °. The rotation detection circuit 8 captures the induced electromotive force generated in the drive coil 7 at the rotation timing of the rotor via the drive circuit 6 and calculates the rotation of the rotor from the induced electromotive force.
Non-rotation is detected. If not, the detection signal Z is output to the CPU 10
Circuit. The switch SW has eight types of pulses having different predetermined pulse heights (each pulse has a pulse number 0,
1, 2,..., 7), a switch operated when setting a pulse having a minimum pulse height (hereinafter referred to as a minimum pulse) at which the rotor can rotate. The switch input signal is sent to the CPU 10. The latch 9 temporarily stores and holds the above-mentioned pulse number sent from the CPU 10 as 3-bit information,
This is a circuit for sending signals C _{1 to} C ₃ corresponding to the three bits to the drive circuit 6. The signal C ₁ 2 0 square of the digit, the signal C ₂ is 1 square of digit 2, signal C ₃ correspond respectively to the square of the order of 2, for example, the latch 9 is pulse number 3 is set When the signals C ₁ , C ₂ , C ₃ are 1,
1, 0 level. The CPU 10 is a circuit for controlling each circuit section. The CPU 10 receives the pulse signals φ ₁ ′, φ ₂ ′, the detection signal Z, and a signal sent when the switch SW is operated, and receives the pulse signal φ ₁ ″ , Φ ₂ ″ and latch 9
And three RS flip-flops
, A set signal and a reset signal are provided to exchange data with the RAM 11. RAM 11 has registers A, B,
N is a circuit that stores data sent from the CPU 10 under the control of the CPU 10, reads the stored data, and provides the read data to the CPU 10. The register A is a register in which the pulse number of the minimum pulse is set, the register B is a register in which the pulse number of the pulse applied to the drive coil 7 at that time is set, and the register N is the same. This register is used to measure the time when driving is continued for one minute with a pulse. The RS flip-flop 12 is a flip-flop that is set or reset by the above-mentioned signal from the CPU 10, and when in the set state, gives the output Q as a reset signal to the above-described frequency dividing circuit 2 and pulse generating circuit 3.

FIG. 2 shows the configuration of the drive circuit 6 in detail in relation to the drive coil 7 and the latch 9.

When the P-channel switching transistor 15 is on, the N-channel driving transistor T is connected to one end 7a of the driving coil 7 to which the voltage V _DD is applied.
The drains of _r1 through T _r8 are connected. The driving transistor T _r1 through T _r8 are each opened and closed by receiving a switching control signal X ₁ to X ₈ from the decoder unit 19, and each source voltage V
_SS is given.

When the P-channel switching transistor 17 is turned on, an N-channel driving transistor is provided at one end 7b of the driving coil 7 through which the voltage _VDD is applied.
The drains of T _r1 '~T _r8' is connected. And
Driving transistor T _r1 '~T _r8' are each decoder
Switching control signal receiving Y ₁ to Y ₈ is opened and closed from the 19, the voltage V _SS is given to each source.

The saturation value of the drain current I _D of the driving transistor T _r1 '~T _r8' and the driving transistor T _r1 through T _r8, the drain current I _D of FIG. 3 - as seen from the drain-source voltage characteristic curve , the driving transistor T _r8 'the most large equal T _r8, the driving transistor T _r7' the second largest in equal and T _r7, hereinafter, will similarly, equal the driving transistor T _r1 'and T _r1 Is also the smallest. In FIG. 3, the power supply voltage is V _DD -V _SS , and the switching transistor 15, the driving coil 7, and the driving transistor T
in passing the drive current path of one of _r1 through T _r8, and the switching transistor 17, the driving coil 7, and then loads in passing a drive current path of one of the driving transistor T _r1 '~T _r8' The straight line is also stored. As can be seen from the figure, the driving transistor T from the case of using the driving transistor T _r1 'or T _r1
The voltage applied between both ends of the drive coil 7, that is, the pulse height of the pulse used for driving, gradually increases as _r8 'or _Tr8 is used.
Thus, in the present embodiment, by selecting a drive transistor, as described above, any one of eight types of pulses having different pulse heights can be selected and applied to the drive coil 7. As described above, pulse numbers 0, 1, 2,... 7 are sequentially given from the smaller pulse height.

P-channel switching transistors 15 and 17
Each pulse signal phi ₁ and phi ₂ inverters 16
And opened and closed by the signal inverted by the inverter 18,
Each application of a voltage V _DD to one end 7 _a and 7 _b of the driving coil 7.

One end 7 _a and 7 _b of the driving coil 7, respectively, are connected to the rotation detecting circuit 8, the dielectric force induced in the driving coil 7 by the rotation of the rotor is given to the rotation detecting circuit 8.

The decoder unit 19 receives three signals C _{1 to} C ₃ corresponding to the contents stored in the latch 9 and signals obtained by inverting the _three signals C _{1 to} C _{3 by} inverters 20 to 22 and further receives pulse signals φ ₁ and φ ₂ , respectively. a circuit for sending one as first level one of the switching control signal _{X 1 ~X 8, Y 1 ~Y} 8. Second
In the decoder unit 19 in the figure, input lines indicated by vertical lines
A gate element Shown by circles in cross section of the output line indicated by I ₁ ~I ₈ and horizontal, each gate element, an input signal applied to the input line through the intersection ( (Hereinafter, referred to as an input signal applied to the gate element) is 1 level. And Thus, the switching control signal _{X 1 ~X 8, Y 1 ~Y} 8
Are transmitted when the input signals applied to all the gate elements on the output lines relating to them are all at one level (that is, the decoder section 19 is in an AND configuration).

Operation Next, the operation of the present embodiment configured as described above will be described with reference to the flowchart of FIG. 4 and the time chart of FIG.

(A) Minimum pulse setting processing First, an operation for setting the minimum pulse performed after battery replacement or the like will be described.

In this case, the switch SW is operated. When the operation is detected in step S1 of FIG. 4, that is, in the standby state, the RS flip-flop 12 is first set, and the output Q of the RS flip-flop 12 is divided. Circuit 2 and the pulse generation circuit 3 to reset them (step S
2). Thereby, the pulse signal φ from the pulse generation circuit 3
Delivery of _{1 'φ 2'} is temporarily stopped. Then step
In S3, 0 is set in the register A of the RAM 11 to designate the pulse of the pulse number 0. Further, 0 set in the register A is set in the latch 9. Thus, any signal C ₁ -C ₃ from the latch 9 becomes 0 level, input lines I _3, I _5, all gate elements on I ₇ is opened (see Figure 2). Next, in step S5, a pulse signal φ ₁ ″ is transmitted, which is transmitted to the drive circuit 6 through the OR gate 4.
It is given as a pulse signal phi ₁ (see FIG. 1). And this pulse signal phi ₁ is applied to the gate of the switching transistor 15 on, which is inverted by the inverter 16, this, during a predetermined time (pulse signal phi ₁ pulse width), while the on state, directly decoder and input to the input line I ₁ of the decoder 19 a total gate element on the input lines I ₁ to open during the predetermined time (see Figure 2). As described above, since all the gate elements on the input lines I ₃ , I ₅ , and I ₇ are already open, opening all the gate elements on the input line I ₁ causes the gate on the output line of the open / close control signal Y ₁ to open. element is that we are open all during the predetermined time, the switching control signal Y ₁ is output drive transistor T _r1 is, during the above predetermined time, the on state. Thus to supply voltage V _DD, switching transistor 15, the driving coil 7, the driving transistor T _r1, voltage V _SS
Is formed for a certain period of time, and a pulse of pulse number 0, that is, a pulse having the smallest pulse height is applied to the drive coil 7.

Next, in step S6, it is determined whether or not the rotor has been rotated by the application of the pulse based on the presence / absence of the detection signal Z from the circuit detection circuit 8. If the rotor has been rotated, the RS flip-flop 12 is reset (step S11). , The output Q is stopped, and the pulse signal φ ₁ ′
The transmission of φ ₂ ′ is restarted, the initial setting for setting 60 to the register N is performed, and the operation at the time of setting the minimum pulse is completed.

On the other hand, if it is determined in step S6 that the rotor has not rotated, a pulse signal φ ₂ ″ is transmitted (step S6).
S7). This is through the OR gate 5 and the pulse signal φ ₂
Given to the drive circuit 6 as (see FIG. 1) is inverted by the inverter 18 is supplied to the gate of the switching transistor 17, given this input line I ₈ of the decoder 19 as well as opening certain time. Pulse signal φ ₂ is input line
By given to I _8, a gate element on the input line _8, a certain time, Suruga opened (see FIG. 2), already input lines I _3, I _5, the gate of the I ₇ are as described above , since the open, all the gates of the output line of the switching control signal X ₁ is opened, the switching control signal X ₁ is sent a certain time. Thus voltage V _DD driving transistor T _r1 'is constant time on state
Power switching transistor 17, the driving coil 7, the driving transistor T _r1 'can supply that path voltage V _SS,
A drive pulse of pulse number 0 is applied to the drive coil 7 in a direction opposite to that in step S5. Next, it is determined whether or not the rotor has been rotated by the application of the drive pulse (step S8). If the rotor has been rotated (in this case, step S5
Does not occur because the pulse height of the drive pulse is insufficient, but also because the correlation between the polarity of the rotor and the polarity of the field by the drive coil 7 is inappropriate.) And the operation at the time of setting the minimum pulse is completed.

When it is determined in step S8 that the rotor has not rotated (that is, when the pulse height of the driving pulse is insufficient), the pulse specified by the register A is still the pulse number 7 While confirming that the pulse has not reached the pulse (the pulse having the largest pulse height which can be applied to the drive coil 7 in this embodiment) (step S9), each time the pulse number of the register A is set to 1 Make it larger (step S10), and examine whether the pulse rotates the rotor (step S10).
S4, S5, S6, S7, S8). In this way, the pulse having the smallest pulse height among the pulses that can rotate the rotor is searched,
When such a drive pulse is found, steps S8, S1
Proceeding to 1, S12, ends the operation of setting the minimum pulse.

Thus, when the operation of setting the minimum pulse is completed,
The pulse number of the pulse having the smallest pulse height among the pulses that can rotate the rotor is set in the register A and the latch 9.

(B) Operation during Normal Driving Now, by the above-described minimum pulse setting process, for example, the pulse of pulse number 3 is set as the minimum pulse (that is, pulse number 3 is set in register A and latch 9). Further, the explanation will be made on the assumption that the pulse number 3 is set in the register B, similarly to the register A.

In this case, since the pulse number 3 is set in the latch 9 as shown in (a) of FIGS. 5 (h) to (nu), the signals C ₁ , C ₂ , C _{3 become 1} , ₁ , 0, respectively. And the pulse signal φ ₁ ′ and the pulse signal φ ₂ ′ from the pulse generation circuit 3 are alternately transmitted at one-second intervals, whereby the pulse signals φ ₁ and φ ₂ are alternately transmitted at one-second intervals. Sent out. Then, the rotor rotates by 180 ° in accordance with the pulse signals φ ₁ and φ ₂ .

At this time, every time the pulse signal φ ₁ ′ or φ ₂ ′ is transmitted, the process proceeds from the standby state (step S 1) to step S 13 to check the rotation of the rotor. It is assumed that the value of the register N is decreased by 1 in order to store that one second has elapsed (step
S14). As a result, if the value of the register N is not yet 0, the process directly returns to the standby state (step S1).
If the value of register N is 0, register A,
The pulse numbers set in register B are both 3
And returns to the standby state (step S1).

(C) Operation when the rotor is not rotating As described above, during normal driving, if for some reason a high load is applied to the rotor and the rotor does not rotate, Then, a detection signal Z as shown in FIG. 5 (e) (b) is sent from the rotation detecting circuit 8, thereby detecting non-rotation (step S13), and proceeds to step S20. In step S20, the pulse number 7 is set in the latch 9 in order to perform the rotation for the non-rotation with the pulse of the pulse number 7 having the largest pulse height. As a result, as shown in FIGS. 5 (h) to 5 (b), the signals C ₁ , C ₂ , C ₃ are all at one level, and the input lines I ₂ ,
The gate elements on I ₄ and I ₆ are opened (see FIG. 2). Next, it is checked whether the rotation timing this time, which is non-rotation, is the timing of the pulse signal φ ₁ ′ or the timing of the pulse signal φ ₂ ′ (step S 21).
The pulse signal φ ₁ ″ is transmitted (step S22), and in the latter case, the pulse signal φ ₂ ″ is transmitted (step S23).
As shown in FIG. 5E, when non-rotation occurs at the timing of the pulse signal φ ₂ ′, as shown in FIG. 5E, the pulse signal φ ₂ shown in FIG. Then, a pulse signal φ ₂ is supplied to the drive rotation 6 by the pulse signal φ ₂ (see FIG. 1), and the switching transistor 17 and the gate element on the input line I ₈ are opened. I do. By gating element on the input line I ₈ has been opened, (input line I _2, I _4, since the gate elements on I ₆ is already open) switching control signal output line gate elements all of X ₈ and opening, closing control signal X ₈ is sent (see Fig. 2). Therefore, a path including a power supply of the voltage V _DD , the switching transistor 17, the drive coil 7, the drive transistor _Tr8 ', and a power supply of the voltage V _SS is formed. Is applied and the rotor rotates.

Contrary to the above case, when the rotation is not performed at the timing of the pulse signal φ ₁ ′, the pulse signal φ ₁ ″
There pulse signal phi ₁ is given to the drive circuit 6 is delivered (see FIG. 1), the power supply voltage V _DD, switching transistor 15, the driving coil 7, the driving transistor T _r8, voltage V
A path called an _SS power supply is formed, and the pulse of pulse number 7 is applied to the drive coil 7 in the opposite direction to the above case, and the rotor rotates.

As described above, after the rotor is rotated with the pulse having the largest pulse height to correct the non-rotation, the register B
It is confirmed that the pulse number has not become 7 yet (step S24). Then, in step S25, the register is set so that the subsequent drive is performed with a pulse height one step higher than the pulse when non-rotation occurs. The pulse number of B is increased by one, that is, 4 in this case.
Then, the pulse number 4 of the register B is also set in the latch 9 (step S26). Then, the pulse of the pulse number 4 set in the latch 9 sets 60 in the register N to continue driving for 60 seconds. (Step S27), and the process returns to step S1.

For the next one minute, the pulse signal φ ₁ ′ or φ ₂ ′
Is sent out, that is, every one second elapses from step S1 to step S13 to check the rotation of the rotor, store the elapse of one second (step S14), and confirm that one minute has not yet elapsed. Confirm (step S15) and return to step S1. When one minute has elapsed, it is detected in step S15, and the fact that the pulse number of the register B does not match the pulse number of the register A, that is, the pulse at that time (that is, the pulse number 4) It is confirmed that the pulse number of the register B has not returned to the minimum pulse set in the register A (that is, the drive pulse of the pulse number 3) (step S16). That is, in this case, it is set to 3 (step S17). Next, the pulse number of the register B is also set in the latch 9 so that the subsequent driving is performed by the pulse of the pulse number 3 (step S18). 60 is set (step S19), and the process returns to step S1.

Then, for the next one minute, the pulse number 3 is set in the latch 9 and the signals C ₁ , C ₂ and C ₃ are respectively
Since it is 1, 1, 0 level (Fig. 5 (h) ~
(Refer to (d) of (nu)), every time the pulse signal φ ₁ ′ or φ ₂ ′ is transmitted, driving is performed with the driving pulse of the pulse number 3, rotation is confirmed in step S13, and step S14 is performed.
After step S15, the process returns to step S1. After one minute has elapsed, this is detected in step S15. Since the pulse (pulse of pulse number 3 set in the register B) has already reached the minimum pulse, the flow returns to step S1 via step S16. . Thereafter, unless the rotor does not rotate, the drive is continuously performed with the pulse of pulse number 3 (see (e) and (f) of FIGS. 5 (h) to (nu)).

As described above, driving with the pulses of pulse numbers 2 and 1 that cannot rotate the rotor is avoided.

When non-rotation occurs, the drive to recover it ends, and driving is performed with a pulse whose pulse height is larger by one step than the pulse at the time of non-rotation, if non-rotation occurs again, Further, driving is performed with a pulse having a pulse height that is higher by one step. If non-rotation occurs during this driving, driving with a pulse height that is higher by one step is performed. Then, the driving is sequentially performed step by step with the pulse height being large (step S2).
5, S26) When the driving pulse becomes several steps larger than the minimum pulse in this way, unless the non-rotation is detected, the pulse height is reduced by one step every minute. The operation shifts to driving (steps S17 and S18), and returns to driving with the minimum pulse (step S16).

The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the present invention.

For example, in the present embodiment, the effective value of the drive pulse is changed by the pulse height, but this may be changed by the pulse width. Further, it is a matter of course that the setting of the minimum pulse is not limited to the one performed by the switch operation, and may be performed automatically at the time of battery replacement or automatically at regular time intervals.

[Effects of the Invention] As described in detail above, the present invention detects and stores a pulse having a minimum effective value at which a step motor can rotate among a plurality of pulses having different effective values, and satisfies a condition where the pulse satisfies the minimum effective value. Since the present invention relates to the stepper motor drive circuit of the pointer-type electronic timepiece in which the supply of a pulse having no effective value is not performed, a pulse having a large actually measured value that can rotate the stepper motor when the load is large, It is possible to provide a stepping motor drive circuit of a pointer-type electronic timepiece that can always supply a stepping motor with an effective pulse for reducing the current consumption of the stepping motor without continuously fluctuating between the pulse of the actually measured value that cannot be rotated. I do.

[Brief description of the drawings]

FIG. 1 is a diagram showing a circuit configuration of one embodiment of the present invention, FIG. 2 is a diagram showing a drive circuit in FIG. 1 in detail in relation to a drive coil and a latch, and FIG. FIG. 4 is a flowchart showing the operation of this embodiment, and FIG. 5 is a time chart showing an operation example of this embodiment. DESCRIPTION OF SYMBOLS 1 ... Oscillation circuit, 2 ... Frequency divider circuit, 3 ... Pulse generation circuit, 6 ... Drive circuit, 7 ... Drive coil, 8 ... Rotation detection circuit, 9 ... Latch, 10 ... CPU, 11 …… RAM, 12 ……
RS flip-flop, 15, 17 ...... switching transistors, 19 ...... _{decoder, T r1 ~T r8, T r1} '~T r8' ......
Driving transistor.

Claims (1)

(57) [Claims] 1. A pulse generating means for outputting a plurality of pulses having different effective values; a rotation detecting means for detecting rotation or non-rotation of a rotor when a pulse is applied to a step motor; A plurality of pulses sequentially supplied to the stepping motor, and a minimum pulse detecting means for detecting, from an output of the rotation detecting means, a pulse having an effective value at which the stepping motor can rotate among the plurality of pulses, Minimum pulse storage means for storing data indicating a minimum pulse rotatable by the step motor detected by the minimum pulse detection means; and pulse supply for supplying one of the plurality of pulses to the step motor at a constant period. Means for detecting a non-rotation by the rotation detecting means when the stepping motor supplies a pulse by the pulse supplying means. The pulse supplied by the pulse supply means is changed to a pulse having a large effective value, and when rotation is continuously detected for a predetermined time, a supply pulse and a pulse corresponding to data stored in the minimum pulse storage means are changed. In comparison, when the supply pulse has a larger effective value, the control means changes the pulse supplied by the pulse supply means to a pulse having a smaller effective value by one step. Motor drive circuit for electronic timepieces.