JP2755948B2 - Electronic imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention converts a signal of a subject image captured and photoelectrically converted by an imaging unit of a camera main body into a signal of a predetermined form, for example, loaded into the camera main body. The present invention relates to an electronic imaging device capable of outputting and recording on a storage medium such as a card memory. 2. Description of the Related Art A composite video signal in which image information, that is, a wideband Y signal (luminance signal) and a C signal (color signal) obtained by phase-modulating a subcarrier are superimposed on a digital image signal by an A / D converter. Has been proposed by the present applicant as a TV image data input device used for computer processing of TV images (Japanese Patent Publication No. 59-94164, Japanese Patent Publication No. 60-1984). -20287), and various other known systems have been realized. These systems generally convert a composite video signal generated by a TV camera into digital data by sampling at a predetermined rate and A / D converting the digital data, and accessing the memory with a predetermined address signal. By doing so, the data is stored in the memory. On the other hand, in recent years, a system for converting image information and the like into a signal and storing it in a recording medium such as a so-called card memory which can be removably loaded into an apparatus main body having a signal conversion function has been developed. It is getting. This type of system is in line with the above-mentioned conventional TV image data input device in that image information is converted into digital data and stored in a storage medium (memory device). However, since the storage medium needs to be configured to be removably mountable in the apparatus main body, some kind of connection means must be interposed between the two. Generally, a connector such as a PC board connector is often used as the connection means. [Problems to be Solved by the Invention] The conventional system as described above has the following problems. When a connector is used as a means for connecting the storage medium and the apparatus main body, it is necessary to use a connector having an extremely large number of terminals. For this reason, a large operation force is required when the storage medium is attached to and detached from the connector, and the operability is poor. Further, in the conventional system, a composite video signal (that is, a signal in which a color signal C is superimposed on a luminance signal Y) from a TV camera is A / D converted and stored in a memory. There was a problem that cannot be recorded. In order to solve this problem, the video signal may be separated for each component, that is, the luminance signal Y and the color signal C are separated, A / D converted and recorded. However, if such a method is adopted, the number of terminals for transmitting and receiving signals between the apparatus main body and the storage medium must be further increased, so that the operability of attaching and detaching is further deteriorated and the storage of each component signal is not performed. There is a problem that the capacity of the storage medium must be increased because of the necessity. The present invention has been made in consideration of such circumstances,
The purpose is not only to be able to store the image information in the storage medium without deteriorating its quality, but also to provide the number of connection terminals for transmitting and receiving signals between the apparatus main body and the storage medium and the storage medium. Provided is a highly reliable electronic imaging device that can reduce the capacity as much as possible, requires less operation force for attaching and detaching a storage medium, can further simplify the mechanical configuration, and can easily manufacture the entire device. It is in. [Means for Solving the Problems] In order to solve the above problems and achieve the object, an electronic imaging apparatus of the present invention is configured as follows. That is, the electronic imaging device of the present invention includes an imaging unit that photoelectrically converts an image of a subject, a process unit provided in a camera unit that forms a signal representing color video information based on an output from the imaging unit, and a recording unit. Memory means for storing information represented by the output signal of the process section as digital data, and output means for outputting the digital data stored in the memory means as a series data signal at a predetermined rate. And a storage unit. [Operation] As a result of taking the above measures, the following effects (a) and (b) are produced. (A) When trying to write an output signal from the imaging unit to a storage medium (such as a card memory) provided outside the camera body, which is driven at a relatively low speed, the imaging unit must be driven at a relatively low speed. No. However, when the imaging unit is driven at a relatively low speed, it is inevitable that noise generated in the imaging unit increases. In this regard, in the present invention, a signal to be recorded is recorded on a storage medium (such as a card memory) provided outside the camera body, with respect to a memory device driven at a speed corresponding to the operation speed of the imaging unit. Before, it is stored once in the form of digital data. Thereafter, the output means outputs the digital data as a series data signal at a predetermined rate and records the digital data on the external storage medium. Thus, according to the present invention, it is possible to reduce the noise of the entire apparatus without increasing the noise generated in the imaging unit. (B) When the image pickup system handles color video signals, the processing unit usually has a plurality of color signal components. However, if the plurality of color signal components are to be recorded as they are, the signal transmission for each color component is performed. It is necessary to provide a connecting pin for use between the camera body and the external storage medium. For this reason, the structure of the input / output section of the camera body and the insertion section of the external storage medium becomes complicated and large, which greatly hinders the reduction in size and weight of the entire camera. In this regard, the present invention is configured so that the output means outputs the digital data as a series data signal at a predetermined rate. Thus, according to the present invention, the number of terminals of the input / output unit of the camera body, that is, the connection unit for transmitting / receiving signals to / from the external storage medium, can be reduced, and the device can be made simple, compact, and lightweight. Embodiment FIG. 1 is a diagram showing an embodiment in which the present invention is applied to an electronic still camera. This electronic still camera comprises an electronic still camera main body 1 as an apparatus main body, and a storage medium or a card memory 2 which is removably mounted on the electronic still camera main body 1. Further, the electronic still camera main body 1 An imaging unit 3 that photoelectrically converts an image of a subject
A processing unit 4 that receives the signal from the imaging unit 3 and separates the signal into a luminance signal and a color signal; and a storage unit 5 that stores the separation signal from the processing unit 4. The imaging unit 3 is configured as follows. Reference numeral 31 denotes an original oscillator for generating a clock signal. When the clock signal generated by the original oscillator 31 is input to a synchronous signal generator (SSG) 32, the synchronous signal generator 32 generates a synchronous signal.
It is supplied to an imager driver 33 and a sampling and holding circuit (S / H) 35. The imager driver 33 generates a drive signal from the clock signal and drives the imager 34. The sampling and holding circuit 35 receives the synchronization signal from the synchronization signal generator 32, samples the image signal supplied from the imager 34, and holds the value. The process unit 4 is configured as follows. Reference numeral 41 denotes a low-pass filter (LPF) that performs low-pass filtering on the signal from the imaging unit 3, and the passing signal is input to a YC separator 42. The YC separator 42 converts a composite video signal composed of a luminance signal Y corresponding to the brightness of the subject and a color signal C corresponding to the hue superimposed on the luminance signal Y into a luminance signal Y and two color difference signals R −Y and BY are separated into component signals. The separated color difference signals R-Y, B
In -Y, the white signals are properly corrected by the white balance circuits (WB) 43a and 43b, and then the errors are properly corrected by the γ correctors 44a and 44b. In the luminance signal Y separated by the YC separator 42, the error is properly corrected by the γ corrector 44c, and then the amplitude of the white signal is limited. The storage unit 5 is configured as follows. Reference numeral 51 denotes a line sequential unit for converting the color difference signals output from the gamma correctors 44a and 44b of the process unit 4 into a line sequential mode. 52 is the luminance signal Y
And a clock signal f2 of a second rate corresponding to a color signal and a clock signal f1 of a second rate corresponding to a color signal. The first A / D converter 53 receives the first-rate clock signal f1 from the clock signal generator 52, samples a luminance signal, and performs analog / digital conversion. The second A / D converter 54 is a second rate clock signal f2 from the clock generator 52.
In response, the output signal of the line-sequential unit 51 is sampled, and analog / digital conversion is performed. Outputs of the first and second A / D converters 53 and 54 are sequentially transferred to a first memory area 55a for storing a luminance signal and a second memory area 55b for storing a color signal of the main memory 55, respectively. Is stored. Rate converter 56 is a serial / parallel converter
A signal 56a and a parallel / serial converter 56b. Of the signals stored in the main memory 55, the luminance signal Y is parallel-converted to match the transfer rate with the rate of the color signal C, and then serially converted. The signal is read out as a signal in a series form and output to the card memory 2 as a storage medium. The rate conversion unit 56
Will be described later in detail. Memory controller 57
Is for controlling the operation of the clock generator 52 so as to extract a signal portion corresponding to the effective screen from the component signals input to the first and second A / D converters 53 and 54. The memory controller 57 controls storage of the main memory 55 and the card memory 2. Note that the clock signal f1 corresponding to the luminance signal Y supplied from the clock generator 52 to the first A / D converter 53 has a frequency of 10.7 MHz, which is slightly higher than twice the bandwidth of the luminance signal Y of 4.2 MHz.
The clock signal f2 corresponding to the color signal C supplied to the second converter 54, which is a clock signal of z, has a frequency of 3.58 MHz which is slightly higher than twice the 1.5 MHz band of the color signal C.
Clock signal. FIG. 2 shows a rate converter 5 comprising a serial / parallel converter 56a and a parallel / serial converter 56b.
FIG. 6 is a diagram showing details of No. 6; The serial / parallel converter 56a receives the luminance signals Y sequentially read out from the first memory area 55a in the main memory 55 at a first rate (10.7 MHz), and transfers the color signals C, that is, the second rate. In order to make the transfer rate the same as the rate (3.58 MHz), the signal is converted into three parallel signals P, Q, and R at the rate of 3.58 MHz. Specifically, the serial / parallel converter 56a can be constituted by a shift register composed of a 3-bit DFF (delay flip-flop). For example, an HD74LS74A (manufactured by Hitachi) or the like may be used. Further, the parallel / serial converter 56b includes three parallel signals of the serial / parallel converter 56a and a color signal C sequentially read from the second memory area 55b of the main memory 55 at a second rate (3.58 MHz). Are input together as parallel signals, and these four parallel signals are read at a third rate (14.3 MHz) and converted into serial signals. The parallel / serial converter 56b can be constituted by a shift register composed of 4-bit DFFs, and for example, an HD74LS194A (manufactured by Hitachi) or the like may be used. Next, the operation of the electronic still camera according to the present embodiment thus configured will be described with reference to FIG. First, in the imaging unit 3, a synchronization signal is generated from a synchronization signal generator 32 based on a clock signal generated from an original oscillator 31, and an imager driver 33 is driven in response to the synchronization signal to drive an imager 34, and an image is captured by the imager 34. The image of the subject is photoelectrically converted into an image signal, and this image signal is output to the sampling and holding circuit 35. In the sampling and holding circuit 35, the image signal is sampled and held and output to the processing unit 4. In the processing section 4, the image signal is low-pass filtered by a low-pass filter 41, and then separated by a YC separator 42 into a luminance signal Y and two color difference signals RY, BY, ie, component signals. . The luminance signal Y is γ-corrected by the γ corrector 44c, the amplitude of the white signal is further limited by the white clipper 45, and then output to the storage unit 5. Also, the color difference signal RY and the color difference signal BY
Are subjected to white balance adjustment by white balance circuits 43a and 43b, respectively, and γ-corrected by γ correctors 44a and 44b, respectively, and then output to the storage unit 5. In the storage unit 5, the clock generator 52 operates in response to a control signal instructing image extraction from the memory controller 57, and controls the operation of the first and second A / D converters 53 and 54.
Accordingly, the luminance signal Y is sampled by the first A / D converter 53 with the clock signal f1 of the first rate (10.7 MHz) from the clock generator 52, converted into a digital signal, and then converted into a digital signal. Is written to the first memory area 55a. The color signal is sampled by the second A / D converter 54 at the clock signal f2 at the second rate (3.58 MHz) from the clock generator 52, converted into a digital signal, and then converted into a digital signal. 2 memory areas 55
Written to b. Next, the luminance signal Y stored in the first memory area 55a of the main memory 55 is sequentially read out with a 10.7 MHz clock signal, and is read by the serial / parallel converter 56a of the rate converter 56 in FIG. As shown, Yn, Yn1,
Enter Yn2 ... The luminance signal Y is serial /
The first rate (10.7H
z) is converted to three parallel signals P, Q, and R at a rate of 3.58 MHz. That is, as shown in FIG.
(Yn, Yn1, Yn2...) Are expanded to a parallel mode of 3.58 MHz as Yn is a parallel signal P, Yn1 is a parallel signal Q, and Yn2 is a parallel signal R. That is, the parallel signals P, Q, and R are converted to the same transfer rate as the second rate (3.58 MHz). Then, the parallel signals P, Q, R are transferred to the parallel / serial converter 56b. On the other hand, the color signal C stored in the second memory area 55b of the main memory 55 has a second rate (3.58M).
Hz), serial / parallel converter
Cn, Cn + 1, Cn + 2,. The three parallel signals P, Q, R input to the parallel / serial converter 56b and the color signal C
Is compressed 4 times by the parallel / serial converter 56b. That is, as shown in FIG. 3, the signal is converted into a serial signal S of 14.3 MHz whose transfer rate is improved four times. This signal is a color signal Cn and a luminance signal (Yn, Yn
1, Yn2), and YC multiplexed signals YCn1,... Composed of the color signals Cn1 and the luminance signals (Yn3, Yn4, Yn5). Is transferred to the card memory 2 via the. The transferred luminance signal Y and color signal C are written to the card memory 2 with an address specified. As described above, according to the present embodiment, the luminance signal Y including the first signal or signal component having a relatively wide band frequency.
Is sampled at a first rate (10.7 MHz) corresponding to the frequency to become a series-type signal, which is converted into a parallel-type signal by a serial / parallel converter 56a. As a result, three parallel signals P, having the same transfer rate as the color signal C, which is a signal or a signal component, which is transferred at a relatively low second rate (3.58 MHz) having a relatively narrow band frequency, Q and R are obtained. The parallel signals are output P, Q, and R, and the second signal or a color signal (3.58 MHz) composed of signal components are converted into a third transfer rate (14.3 MHz) by the parallel / serial converter 56b. , And converted into a series signal and output. Therefore, since the luminance signal Y and the color signal C are handled as component signals, they can be transferred without deteriorating the quality of the image signal. In addition, since the luminance signal Y and the color signal C are transmitted as a series signal in a state where the transfer rates are aligned,
The number of connection terminals for transmitting and receiving signals between the apparatus main body and the storage medium can be reduced as much as possible. As a result, the operation force required for attaching and detaching the storage medium is reduced. The luminance signal Y (10.7M
(Hz) into a color signal C (3.58 MHz) using a serial / parallel converter, so that the circuit configuration can be simplified. It should be noted that the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the spirit of the present invention. [Effects of the Invention] According to the present invention, it is possible to provide an electronic imaging device having the following effects. (A) In the present invention, a signal to be recorded is transmitted to a memory unit driven at a speed corresponding to the operation speed of the imaging unit.
Before being recorded on a storage medium (such as a card memory) provided outside the camera body, the data is temporarily stored in the form of digital data. Thereafter, the digital data is output as a series data signal by an output unit. , And can be recorded on the external storage medium. Therefore, according to the present invention, it is possible to reduce the noise of the entire device without increasing the noise generated in the imaging unit. (B) In the present invention, the output means outputs the digital data as a series data signal at a predetermined rate. Therefore, according to the present invention, the number of terminals of the input / output unit of the camera body, that is, the number of terminals of the connection unit used for transmitting / receiving signals to / from the external storage medium, etc., can be reduced
A simple, compact and lightweight device can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 3 show an embodiment in which the present invention is applied to an electronic still camera. FIG. 1 is a schematic configuration diagram of an electronic still camera, and FIG. 2 is rate conversion. FIG. 3 is a diagram showing the operation timing for explaining the operation of FIG. 1 ... electronic still camera body 2 ... card memory 3
... Imaging unit, 4 process unit, 5 storage unit, 31
Original oscillator, 32 Synchronous signal generator (SSG), 33 Imager driver, 34 Imager, 35 Sampling and holding circuit (S / H), 41 Low-pass filter (LP
F), 42: YC separator, 43a, 43b: White balance circuit (WB), 44a, 44b, 44c: γ corrector, 45: White clip device, 51: Line sequential device, 52: Clock generator,
53 ... first A / D converter, 54 ... second A / D converter, 55 ...
... Main memory, 55a ... First memory area, 55b ... Second memory area, 56a ... Serial / parallel converter, 56b ... Parallel / serial converter, 57 ...
... memory controller, 58 ... signal lines.

Claims (1)

(57) [Claims] An imaging unit for photoelectrically converting an image of a subject; a process unit provided in a camera unit for forming a signal representing color video information based on an output from the imaging unit; A storage unit comprising: memory means for storing information as digital data; and output means for outputting the digital data stored in the memory means at a predetermined rate as a signal of a series of data strings. An electronic imaging device, comprising: