JP2760367B2 - Information processing device with micro diagnostic device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having a plurality of error detection circuits, in which the error is notified to an arithmetic processing unit, and detailed information of the error is collected and logged by the arithmetic processing unit. In particular, the present invention relates to an information processing device with a micro diagnostic device that monitors completion of logging and logs the contents of an error information register in place of the arithmetic processing device when logging fails.

[0002]

2. Description of the Related Art A conventional information processing device of a class higher than a minicomputer has a system control device including a diagnostic device therein. The diagnostic device collects and logs fault information. Did not do. The reason is that, in general, the failure rate of the arithmetic processing device in the information processing device is high, and in the case of a failure of the arithmetic processing device itself, the failure collection and logging by the arithmetic processing device are impossible. . Therefore, in the related art, a system controller that collects fault information and performs a startup process of the information processing device is provided on a system bus for diagnosis and fault data collection.

Information processing devices such as workstations or personal computers of a class smaller than conventional minicomputers do not have a special diagnostic device for collecting fault information and starting up, but are all performed by arithmetic processing devices.

FIG. 2 shows the configuration of a conventional mini-computer class information processing apparatus. 11, a system controller; 12, a gateway; 21, 31, 41, 51, an error detection circuit; and 52, an error information register interrupt signal. Failures detected in the arithmetic processing unit 2, the main storage unit 3, and the bus interface unit 4 are detected by the system control unit 11
Is reported to the system bus 11
Alternatively, fault information is directly collected from the faulty device via the diagnostic bus. The failure of the system bus 1
1 monitors itself. In some cases, the system control device 11 stops the clock of the system bus 1 when a failure occurs, and completely stops the operation of the entire information processing device including the arithmetic processing device 2.

[0005]

In an information processing apparatus of a class higher than the conventional minicomputer described above, a system controller is connected to a system bus, and the system controller itself collects fault data using the system bus. Therefore, although it is very reliable, it is expensive and cannot be applied to a workstation-class information processing device smaller than a minicomputer.

Accordingly, it is an object of the present invention to provide an information processing apparatus with a micro diagnostic device which is inexpensive in view of the above-mentioned drawbacks and can be applied to an information processing apparatus such as a workstation having a mini-computer or less.

[0007]

According to the present invention, an arithmetic processing unit, a bus interface unit, and a main storage unit are connected by a system bus, and the bus interface unit has one or more peripheral buses. An error detection circuit that outputs an error signal when an error is detected in the information processing device in an information processing device in which a micro diagnostic device is connected to one of the peripheral buses and an external warning device is connected to the micro diagnostic device The arithmetic processing unit and the micro diagnostic device are connected to the same peripheral bus as the micro diagnostic device, collect error signals detected by the error detection circuit, and use the logical sum of the error signals as an interrupt. Notify, error information accessible from the arithmetic processing unit and the micro diagnostic device and resettable from the arithmetic processing unit. A register, a non-volatile logging buffer connected to the same peripheral bus as the micro diagnostic device and accessible from the arithmetic processing device and the micro diagnostic device, and the arithmetic processing device receiving an interrupt from the error information register. After that, an error logging means for recognizing the cause of the error, collecting detailed error information and storing the error information in the logging buffer, and a logging completion notifying means for notifying the micro diagnostic device of the completion of logging from the arithmetic processing unit, After receiving the interrupt from the error information register, the micro diagnostic device monitors that the notification by the logging completion notifying unit is performed within a predetermined time, and when the logging is not completed within the predetermined time, The micro diagnostic device accesses an error information register and logs the contents thereof Stored in the Ffa,
An information processing apparatus with a micro-diagnostic device is provided, comprising: a logging completion monitoring means for generating a warning in the external warning device.

According to the present invention, in the information processing apparatus with a micro diagnostic device according to claim 1, a first interrupt for generating an interrupt from the arithmetic processing device to the micro diagnostic device in the bus interface device. A port and a first interrupt communication area indicating an interrupt factor from the arithmetic processing unit to the micro diagnostic device are provided in the logging buffer, and a predetermined error is detected in the system by the error logging means or software. In this case, an external alarm device alarm output request means for setting an external alarm device alarm output code in the first interrupt communication area and generating an interrupt in the micro diagnostic device via the first interrupt port. Receiving an interrupt from the arithmetic processing unit in the micro diagnostic device, External alarm device alarm output generating means for confirming that an external alarm device alarm output code is set at the rear, and outputting an alarm to the external alarm device, comprising: A device is obtained.

According to the present invention, in the information processing device with a micro diagnostic device according to claim 2, a system reset signal line output from the micro diagnostic device and resetting the entire information processing device except the micro diagnostic device. System reset output requesting means for the arithmetic processing unit to set a system reset request code in the first interrupt communication area, and to generate an interrupt to the micro diagnostic device via the first interrupt port. Receiving an interrupt from the arithmetic processing unit in the micro diagnostic device, confirming that a system reset output request code is set in the first interrupt communication area, and driving a system reset signal. System reset generating means for resetting the entire information processing apparatus. Micro-diagnostic apparatus with the information processing apparatus can be obtained.

Further, according to the present invention, in the information processing apparatus with a micro diagnostic device according to claim 3, a plurality of power control devices for controlling a power supply device in the information processing device are connected to the micro diagnostic device. A power supply control interface, a second interrupt port for generating an interrupt from the micro diagnostic device to the arithmetic processing device in the bus interface device, and a log buffer from the micro diagnostic device to the arithmetic processing device. A second interrupt communication area indicating an interrupt cause, and when an abnormality occurs in the power supply device, the micro diagnostic device collects an abnormality status from the power supply control device via the power supply control interface, and performs logging. Power abnormality logging means for storing in a buffer, and the micro diagnostic device,
Power failure notification means for setting a power failure code in the second interrupt communication area and generating an interrupt in the arithmetic processing device via the second interrupt port; and A power failure blocking means for receiving a power supply failure code from the second interruption communication area, confirming that the power supply failure code is set in the second interruption communication area, and initiating a closure processing. The attached information processing device is obtained.

According to the present invention, in the information processing apparatus with the micro diagnostic device according to claim 4, a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device is provided. When the device receives a power-on instruction from the power switch via the power switch interface, the device instructs the power control device to power on via the power control interface, and supplies power to the entire information processing device. Input means, and when the micro diagnostic device receives a power off instruction from the power switch via the power switch interface, the micro diagnostic device sets a code of a block request in the second interrupt communication area, Generates an interrupt to the arithmetic processing unit via a second interrupt port The closing processing requesting means and the arithmetic processing unit receive an interrupt from the micro diagnostic device, confirm that the code of the closing request is set in the second interrupt communication area, and start the closing processing. After the closing means and the arithmetic processing unit complete the closing process, a code for a power-off request is set in the first interrupt communication area, and an interrupt is generated in the micro diagnostic device via the first interrupt port. A power-off request unit, the micro-diagnosis device receives an interrupt from the arithmetic processing unit, and confirms that a power-off request code is set in the first interrupt communication area; To the power supply control interface via the power supply control interface, and the entire information processing apparatus except for the peripheral bus connected to the micro diagnostic apparatus. Micro diagnostic apparatus with the information processing apparatus is obtained, characterized in that it comprises a power-off means for the power-off.

[0012]

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an information processing apparatus with a micro diagnostic device according to an embodiment of the present invention.

1 is a system bus, 2 is an arithmetic processing unit, 3
Is a main storage device, 4 is a bus interface device, 5 is an error information register, 6 is a micro diagnostic device, 7 is a logging buffer, 8 is a peripheral bus, 31, 41, and 51 are error detection circuits, and 52 is an error information register interrupt signal. , 61 are error logging completion notifying means, and 62 is an external warning device.

FIG. 3 is a flowchart of the error logging means. FIG. 4 is a flowchart of the error logging completion monitoring means. FIG. 5 is the inside of the error logging buffer. FIG. 6 shows details of the log header section. FIG. 7 shows details of the log record.

FIG. 8 is a block diagram 2 of the embodiment, wherein 9 is a calendar clock, 10 is a serial input / output port, 42 is a first interrupt port, 43 is a second interrupt port, 63
Is an interrupt signal from the arithmetic processing male value to the micro diagnostic device,
64 is a system reset signal line, 65 is a power control device,
66 is a power supply device, 67 is a power supply control interface, 10
0 is a console, 601 is a power switch interface, 602 is a dump switch interface, 603 is an unmanned operation control device interface, 610 is a power switch, 620 is a dump switch, and 630 is an unmanned operation control device.

FIG. 9 is a flow chart of the external alarm device alarm output request means, FIG. 10 is a flow chart of the external alarm device alarm output generation means, FIG. 11 is a flow chart of the system reset output request means, and FIG. 12 is a flow chart of the system reset output generation means. 13, FIG. 13 is a flowchart of a power failure logging unit, FIG. 14 is a flowchart of a power failure notifying unit, FIG. 15 is a flowchart of a power failure blocking unit, FIG.
17 is a flowchart of the closing process requesting unit, FIG. 18 is a flowchart of the closing unit, FIG. 19 is a flowchart of the power-off requesting unit, FIG. 20 is a flowchart of the power-off unit, FIG.
22 is a flowchart of the forced power-off means, FIG. 23 is a list of interrupt codes in the first communication area, FIG. 24 is a list of interrupt codes in the second communication area, FIG. 25 is a list of start-up parameter codes, and FIG. Details of FIG. 2
Reference numeral 7 denotes the details of the start-up time area.

The error detection circuit in the information processing device is LS
A diagnostic circuit mounted in the I and a parity checker outside the LSI. When these error detection circuits detect an error, the error information register 5 is notified by a signal line. When at least one of the error detection circuits detects an error, the error information register 5 causes the micro diagnostic device 6 and the arithmetic processing device 2 to generate an interrupt through the signal line 52 to urge the start of logging.

Next, as indicated by the logging means in FIG. 3, when the arithmetic processing unit 2 receives an interrupt from the error information register 5, it reads the error information register 5 and recognizes the cause of the error. The arithmetic processing unit 2 collects detailed error information corresponding to the error cause. For example, when the error detection circuit in the main storage device 3 detects a one-bit error in the memory, it reports a memory failure error to the error information register 5, and an interrupt occurs from the error information register 5 to the arithmetic processing device 2. . The arithmetic processing unit 2 reads the error information register 5, recognizes that a memory failure has occurred, and collects information such as an error type, an error address, and an error syndrome held in the main storage device 3.

The collected error data is stored in an area of a log header section 780 and a log data section 790 shown in FIG. The storage format of the log header 780 is shown in FIG. The head address 781 of the valid record indicates the head address in the log data part 790 of the oldest valid log record. The number of valid records 782 indicates the number of log records stored in the log data section 790, and the log number 783 of the next log record is smaller than the log number of the latest log record currently logged. 1
Is set to a larger value. The log number is uniquely given to a log record. As shown in FIG. 7, the log record format is log number 791, log type 7
93, a log data length 794, and a data part 795. The log record type 793 is defined for each error detection module of the log record. In addition, log record length 7
In 94, the number of bytes of the log record is entered.

The logging completion notifying means includes the arithmetic processing unit 2
However, after the log to the logging buffer 7 is completed, an error logging completion notification signal 61 is driven to notify the micro diagnostic device 6 that the log has been normally completed.

As shown in FIG. 4, when the micro diagnostic device 6 receives an interrupt from the error information register 5, the logging completion monitoring means waits for a predetermined time to elapse.
After the lapse of the predetermined time, the logging completion notifying means checks whether the logging is completed, and if it is, terminates the monitoring of the logging without doing anything. The predetermined time is suitably twice the maximum time required for the arithmetic processing device 2 to complete the logging. If the logging completion notification has not been received by the elapse of the predetermined time, the micro diagnostic device 6 reads the error information register 5 and stores it in the logging buffer 7. In addition, a warning is issued to the external warning device 62.

An application example of the information processing apparatus with a micro diagnostic device will be described below.

If error logging is completed normally, but a fatal failure is logged in the operation of the system,
Alternatively, a mechanism for outputting an alarm to an external alarm using software when an OS cannot operate although there is no failure report from the error information register 5 will be described below.

The external alarm alarm output request means is shown in FIG.
As shown in FIG. 5, the software detecting the fatal error sets the code (40H) of the alarm output to the external alarm in the first interrupt history area 710 provided in the logging buffer 7 shown in FIG. 8 is realized by writing 1 to the first interrupt port 42 in the bus interface device 4 to drive the interrupt signal line 63 and generate an interrupt to the micro diagnostic device 6.

As shown in FIG. 10, the external alarm device alarm output generating means receives the interrupt from the arithmetic processing unit 2 when the micro diagnostic device 6 receives the interrupt from the arithmetic processing device 2, and outputs the external alarm device alarm to the first interrupt history area 710. Output code (40
H) is set, and the external alarm 61
This is realized by outputting an alarm to.

Next, a mechanism employed in this embodiment for resetting the entire information processing apparatus immediately after the occurrence of a fatal failure and restoring the system will be described.

As shown in FIG. 11, the system reset request means sets the system reset request code (04H) in the first interrupt history area 710 by the software executed by the arithmetic processing unit 2 after collecting the fault data. This is realized by driving the interrupt signal line 63 by writing 1 to the first interrupt port 42 and causing the micro diagnostic device 6 to generate an interrupt.

The system reset output generating means includes:
As shown in FIG. 12, the micro diagnostic device 6 receives the interrupt from the arithmetic processing device 2 and stores the system reset output request code (04H) in the first interrupt history area 710.
Is set, and the system reset signal 64 is driven to reset the entire information processing apparatus. The system reset signal 64 is spread over the entire information processing apparatus, and resets almost everything except the micro diagnostic device 6.

Next, a description will be given of a failure processing method when a power failure occurs, which is employed in this embodiment.

As shown in FIG. 13, when an abnormality occurs in the power supply device 66, the micro diagnosis device 6 collects an abnormality status from the power supply control device 65 via the power supply control interface 67, as shown in FIG. The fault data is stored in the logging buffer 7. The power supply abnormality includes a power failure of the input AC of the information processing device, a DC abnormality of the power supply device, a failure of the cooling device of the information processing device, a temperature abnormality in the information processing device, and the like.

As shown in FIG. 14, in the power failure notifying means, the micro diagnostic device 6 sets a power failure code (10H) in the second interrupt history area 720 and writes 1 to the second interrupt port 43, as shown in FIG. This drives the interrupt signal 22 to cause the arithmetic processing unit 2 to generate an interrupt.

As shown in FIG.
When the arithmetic processing unit 2 receives an interrupt from the micro diagnostic device 6 and the power failure code (10H) is set in the second interrupt history area 720, the processing is realized by starting the closing process. Depending on the type of the power failure, there is a case where the DC of the information processing device cannot be guaranteed until the closing process is completely completed. However, blockage processing must be performed during the period from the occurrence of AC disconnection to the discharge limit of the battery when a certain amount of battery is built into the information processing device, or during the period from the failure of the fan to the occurrence of abnormal temperature. Can be.

Next, a description will be given of a normal closing processing method employed in this embodiment.

When the micro diagnostic device 6 receives a power-on instruction from the power switch 610 via the power switch interface 601 as shown in FIG. 16, the power-on means is transmitted to the power control device 65 via the power control interface 67. To turn on the power of the information processing apparatus.

As shown in FIG. 17, when the micro-diagnosis device 6 receives a power-off instruction from the power switch 610 via the power switch interface 601 as shown in FIG. The code (21H) of the block request is set in the history area 720, and the interrupt signal 22 is driven by writing 1 to the second interrupt port 43 to cause the arithmetic processing unit 2 to generate an interrupt.

As shown in FIG. 18, the closing means is such that the arithmetic processing unit 2 receives an interrupt from the micro-diagnosis device 6 and stores the code (21) of the closing request in the second interrupt history area 720.
Confirm that h) is set, and start the closing process.

Subsequently, as shown in FIG. 19, after the arithmetic processing unit 2 completes the closing process, the power-off requesting means sets the power-off request code (10h) in the first interrupt history area 710, and By writing 1 to the interrupt port 42, the interrupt signal line 64 is driven to cause the micro diagnostic device 6 to generate an interrupt.

As shown in FIG. 20, in the power-off means, the micro-diagnosis device 6 receives an interrupt from the arithmetic processing device 2, and sets a power-off request code (10h) in the first interrupt history area 710. Is confirmed, the power supply control unit 65 is instructed to turn off the power supply via the power supply control interface 67, and the power supply of the entire information processing apparatus excluding the peripheral bus 8 to which the micro diagnostic device 6 is connected is turned off.

By the power-off requesting means and the power-off means, the power can be turned off by an operator's software command or the like without using the power switch 610.

However, in the above power-off method, if the software is stalled, the power cannot be turned off. In order to solve this problem, a mechanism realized in this embodiment will be described.

As shown in FIG. 21, while the closing process is being executed, the arithmetic processing unit 2 stores the code (06H) during the closing process in the first interrupt history area 710 as shown in FIG. Set, first interrupt port 4
Writing 1 to 2 drives the interrupt signal 64,
An interrupt is generated in the micro diagnostic device 6.

As shown in FIG. 22, the forced power-off means is as follows.
The micro diagnostic device 6 receives an interrupt from the arithmetic processing device 2 within a predetermined time interval, and generates a first interrupt history area 7
If it is not confirmed that the code (06H) being closed is set in 10, it instructs the power supply control device 65 to turn off the power supply via the power supply control interface 67 and connects the micro diagnostic device 6. The power of the entire information processing apparatus except for the peripheral bus 8 is turned off.

Next, the serial input / output access control means employed in this embodiment includes a serial input / output port 10 and a console 100 capable of inputting / outputting data from / to the micro diagnostic device 6 and the arithmetic processing unit 2. The micro diagnostic device 6 is connected to the same peripheral bus 8 and suppresses access to the serial input / output port 10 during a period from when the power of the entire information processing device is turned on to when the micro diagnostic device 6 is turned off. Has been realized.

Further, the power supply status output means allows the micro diagnostic device 6 to check data input from the serial input / output port 10 while the power of the information processing device is turned off, and to store the data in the micro diagnostic device 6 in advance. If the password matches the displayed power status display password, the power status data is output to the console 100. The reason these restrict the user with a password is that this function is not for the user but for maintenance.

The console power-on means checks the data input from the console 100 via the serial input / output port 10 in the same manner as above, and matches the power-on password held in the micro diagnostic device 6 in advance. In this case, the power supply control device 65 is instructed to turn on the power supply via the power supply control interface 67, and the power supply of the entire information processing device is turned on. The reason why this is a password is that the power-on function should not be released to all users, but is a matter that only a system administrator should perform for security reasons.

Next, in the present embodiment, when the power-on password is input from the console 100 via the serial input / output port 10, the micro-diagnosis device 6 simultaneously inputs the start-up parameters by the start-up parameter setting means and starts up. Set in the parameter area 730,
However, after the system reset is released by turning on the power, the boot means reads the startup parameter setting area 730 and performs boot processing according to the boot information area 770 in the logging buffer. FIG. 26 shows the boot information area.

Next, the dump processing request means employed in the present embodiment is such that the micro diagnostic device 6 is provided with a dump switch 620.
When a dump instruction is received via the dump switch interface 602, a code (20H) of a dump start request is set in the second interrupt history area 720, and the code is sent to the arithmetic processing unit 2 through the second interrupt port 43. Generate an interrupt.

Further, the dump means confirms that the arithmetic processing unit 2 receives an interrupt from the micro diagnostic device 6 and that the code (20H) of the dump request is set in the second interrupt history area 720. Start processing.

However, in the above method, if the software is stalled and the interrupt from the micro diagnostic device 6 cannot be received, the dump means does not operate. Therefore, in this embodiment, the dump start notifying means sets the code (20H) of the dump start notification in the second interrupt history area 720, and interrupts the micro diagnostic device 6 through the second interrupt port 43. Is generated, and the micro-diagnosis device 6 is operated by the dump restart means within a certain period of time.
When it is not possible to confirm that the code (20H) of the dump start notification is set in the first interrupt history area 710 in the first interrupt history area 710, the code (0DH) indicating the restart of the dump is set in the startup parameter area 730. ) Is set, and the system reset signal is driven to reset the entire information processing apparatus. Subsequently, after the processing unit 2 releases the system reset by the reset dump unit, the startup parameter area 730 is read out, and if the code (0DH) indicating the restart of the dump is set, the dump is started.

Next, an external signal of the information processing apparatus is received,
An upper-level host computer having an unmanned operation control interface 603 for connecting the unmanned operation control device 630 for generating a power-on instruction or a power-off instruction to the information processing device and the micro-diagnosis device 6 and connected by a network or a dedicated line A description will be given of an embodiment in a case where it is desired to enable power-on and power-off.

The unmanned power-on means is a micro diagnostic device 6
Receives a power-on instruction from the unmanned power supply control device 630 via the unmanned operation control interface 603, instructs the power supply control device 65 to turn on the power supply via the power control interface 67, and turns on the power of the entire information processing apparatus. .

When the micro-diagnosis device 6 receives a power-off instruction from the unmanned power supply control device 630 via the unmanned operation control interface 603, the micro-diagnosis device 6 sets the micro-diagnosis device 6 in the second interrupt history area 720. Set the code of the closing request and set the second interrupt port 4
3, an interrupt is generated in the arithmetic processing unit 2.

Next, in the present embodiment, in order to leave the time at which the fault occurred as log information, it is connected to the same peripheral bus 8 as the micro diagnostic device 6 and can be accessed from the arithmetic processing unit 2 and the micro diagnostic device 6. It has a calendar clock 9 that constantly updates and holds the current date, month, day, hour, minute, and second.

The calendar clock power-on means uses the above-described calendar clock 9 to turn off the micro diagnostic device 6 when the power of the entire information processing apparatus except for the peripheral bus 8 connected to the micro diagnostic device 6 is turned off. The start-up time area 740 is compared with the calendar clock 9 at regular intervals, and when the two times match, the power supply control unit 65 is instructed to turn on the power supply via the power supply control interface 67, and Turn on the power. This start-up time area 740 is set by software.

Next, by setting the power-on factor in the power-on factor area 750 shown in FIG. 5 when the power is turned on by the power-on factor setting means, the processing can be changed according to the power-on factor when the software starts up. Becomes For example, if the software sets a rise time in the rise time area 740 and has a fall time in the file of the software, when the current time matches the fall time in its file, the calendar clock 9 is used. The software turns off the power by the power-off requesting means only in the case of the start-up. However, in the case of the start-up due to another factor, it is possible to perform processing such as doing nothing.

Next, a mechanism of a watchdog timer using interrupt communication between the arithmetic processing unit 2 and the micro diagnostic device 6 will be described.

In the watchdog timer start request means, the arithmetic processing unit 2 sets a count value in the watchdog timer count value area 760, and stores the watchdog timer start request code (08) in the first interrupt history area 710.
H) is set, and an interrupt is generated in the micro diagnostic device 6 through the first interrupt port 42.

The watchdog timer processing means is configured so that the micro diagnostic device 6 receives an interrupt from the arithmetic processing device 2,
After confirming that the code (06H) of the watchdog timer start request is set in the first interrupt history area 710, the watchdog timer update area is set at regular intervals indicated by the watchdog timer count value area 760. It is confirmed that 765 has been updated by the arithmetic processing unit 2. If it has been updated, the watchdog timer update area 765 is cleared. If it has not been updated, the watchdog timer update area 720 is stored in the second interrupt history area 720. A run-out code is set, and an interrupt is generated in the arithmetic processing unit 2 via the second interrupt port. Alternatively, an error bit of the watchdog timer run-out is added to the error information register 5, and if the watchdog timer update area 765 is not updated within a predetermined time, the micro diagnostic device 6 sets the corresponding bit of the error information register 5. It is also possible to cause the arithmetic processing unit 2 to generate an interrupt via the error information register 5.

Next, a mechanism for individually resetting the peripheral bus 8 will be described.

The individual peripheral bus reset output request means sets the code of each peripheral bus reset request corresponding to each individual peripheral bus in the first interrupt history area 710 by the arithmetic processing unit 2, and outputs the first interrupt port 42 , An interrupt is generated in the micro diagnostic device 6.

The individual peripheral bus reset generating means determines that the micro diagnostic device 6 has received the interrupt from the arithmetic processing device 2 and that the code of each individual reset output request is set in the first interrupt history area 710. After confirming, the corresponding individual peripheral bus reset signal 605 is driven to individually reset the peripheral bus 8.

The embodiments are listed below.

1. A processing device, a bus interface device, and a main storage device are connected by a system bus, the bus interface device has one or more peripheral buses, and a micro diagnostic device is connected to one of the peripheral buses; In an information processing device in which an external warning device is connected to the micro diagnostic device, the information processing device has a plurality of error detection circuits that output an error signal when an error is detected,
It is connected to the same peripheral bus as the micro diagnostic device, collects error signals detected by the error detection circuit, notifies the arithmetic processing device and the micro diagnostic device of a logical sum of the error signals as an interrupt, and performs the arithmetic processing. An error information register accessible from the device and the micro diagnostic device, and resettable from the arithmetic processing device;
A non-volatile logging buffer connected to the same peripheral bus as the micro diagnostic device and accessible from the arithmetic processing device and the micro diagnostic device; and Error logging means for recognizing the cause, collecting detailed error information, and storing the error information in the logging buffer; logging completion notifying means for notifying the micro diagnostic device of the completion of logging from the arithmetic processing device; The apparatus monitors that the notification by the logging completion notifying means is performed within a predetermined time after receiving the interrupt from the error information register. The diagnostic device accesses the error information register and stores the contents in the logging buffer , Micro diagnostic apparatus with the information processing apparatus characterized by having a logging completion monitoring means for generating a warning to the external warning device.

2. 2. The information processing device with a micro diagnostic device according to 1, wherein the bus interface device includes:
A first interrupt port for generating an interrupt from the arithmetic processing device to the micro diagnostic device, and a first interrupt communication area indicating an interrupt factor from the arithmetic processing device to the micro diagnostic device in the logging buffer. Provided,
In the error logging means or software, when a predetermined error is detected in the system, an external alarm alarm output code is set in the first interrupt communication area, and the code is output through the first interrupt port. External alarm device alarm output request means for generating an interrupt in the micro diagnostic device; and an interrupt from the arithmetic processing device in the micro diagnostic device, and an external alarm device alarm output code in the first interrupt communication area. And an external alarm device for outputting an alarm to the external alarm device after confirming that the information has been set.

3. 3. The information processing device with a micro diagnostic device according to 2, wherein a system reset signal line output from the micro diagnostic device and resetting the entire information processing device excluding the micro diagnostic device is provided, and the arithmetic processing device is the first processing device. System reset output requesting means for setting a system reset request code in an interrupt communication area and generating an interrupt in the micro diagnostic device via the first interrupt port; and the arithmetic processing device in the micro diagnostic device System reset generating means for receiving an interrupt from the CPU, confirming that a system reset output request code is set in the first interrupt communication area, and driving a system reset signal to reset the entire information processing apparatus. An information processing device with a micro diagnostic device, comprising:

4. The information processing device with a micro diagnostic device according to the item 3, wherein a power control interface that connects the plurality of power control devices that control a power device in the information processing device and the micro diagnostic device, and the bus interface device includes: A second interrupt port for generating an interrupt from the micro diagnostic device to the arithmetic processing device, and a second interrupt communication area indicating an interrupt factor from the micro diagnostic device to the arithmetic processing device in the logging buffer. A power failure logging unit that, when a failure occurs in the power supply, collects a failure status from the power control device via the power control interface and stores the failure status in the logging buffer; A diagnostic device sets a power failure code in the second interrupt communication area. Power failure notification means for generating an interrupt to the arithmetic processing device via the second interrupt port, the arithmetic processing device receiving an interrupt from the micro diagnostic device, and transmitting the interrupt to the second interrupt communication area. A power failure blocking unit for confirming that the power failure code is set and starting a blocking process.

5. 5. The information processing device with a micro diagnostic device according to 4, wherein a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device is provided, and the micro diagnostic device is connected from the power switch via the power switch interface. Power on means for instructing the power control apparatus to turn on the power via the power control interface, and turning on the power of the entire information processing apparatus; and Receiving a power-off instruction from the power switch interface via the power switch interface, the micro-diagnosis device sets a code of a blockage request in the second interrupt communication area, and performs the arithmetic processing via the second interrupt port. Blocking processing requesting means for generating an interrupt in the device; The device receives an interrupt from the micro diagnostic device, confirms that a code of a block request is set in the second interrupt communication area, and starts a block process. After the processing is completed, a power-off request code is set in the first interrupt communication area, and a power-off request means for generating an interrupt to the micro-diagnosis device through the first interrupt port; Receives an interrupt from the arithmetic processing unit, confirms that a power-off request code is set in the first interrupt communication area, and sends the power-supply control device to the power-supply control device via the power-supply control interface. Power-off means for instructing power-off and power-off of the entire information processing apparatus except for the peripheral bus connected to the micro-diagnosis apparatus. Micro diagnostic apparatus with the information processing apparatus according to claim and.

6. 6. The information processing device with a micro diagnostic device according to 5, wherein in the closing means, while the closing process is being performed, the arithmetic processing unit stores the code being closed in the first interrupt communication area within a predetermined time interval. Setting, through the first interrupt port, an in-closure processing notifying unit that generates an interrupt to the micro diagnostic device, and the micro diagnostic device receives an interrupt from the arithmetic processing device within a predetermined time interval. If it is not possible to confirm that the code being closed is set in the first interrupt communication area, the power supply control device is instructed to turn off the power supply via the power supply control interface, A forced power-off means for powering off the entire information processing apparatus except for the peripheral bus connected to the diagnostic apparatus. With a cross-sectional device information processing apparatus.

7. 7. The information processing device with a micro diagnostic device according to 5 or 6, further comprising a serial input / output port connected to the same peripheral bus as the micro diagnostic device and accessible from the arithmetic processing device and the micro diagnostic device. When the power of the entire device is turned on, only the arithmetic processing device can access the serial input / output port, and the power of the entire information processing device excluding the peripheral bus connected to the micro diagnostic device is turned off. An information processing apparatus with a micro diagnostic device, wherein the information processing device has serial input / output access control means for allowing only the micro diagnostic device to access the serial input / output port.

8. 8. The information processing device with a micro diagnostic device according to 7, wherein the micro diagnostic device has a power status display password in advance, and a power supply of the entire information processing device except for the peripheral bus connected to the micro diagnostic device is provided. A power status output unit for checking data input from the serial input / output port when the power is disconnected and outputting power status data to the serial input / output port when the data matches the power status display password; An information processing device with a micro diagnostic device, characterized in that:

9. 9. The information processing device with a micro diagnostic device according to 7 or 8, wherein the micro diagnostic device has a power-on password in advance, and a power supply of the entire information processing device except for the peripheral bus connected to the micro diagnostic device is provided. When disconnected, check data input from the serial input / output port, and when the data matches the power-on password, instruct the power control device to power on via the power control interface. And a console power-on means for powering on the entire information processing apparatus.

10. 10. The information processing apparatus with a micro diagnostic device according to the item 9, wherein a start-up parameter area is provided in the logging buffer, and when a power-on password is input from the serial input / output port, start-up parameters are input at the same time. Startup parameter setting means to be set in the parameter area; a boot information area in which the startup parameters and the boot device type are set in the logging buffer; and the startup parameters in the locking buffer. An information processing device with a micro diagnostic device, comprising: boot means for performing a boot process according to a boot information area.

11. The information processing device with a micro diagnostic device according to the item 10, wherein a dump switch interface for connecting the dump switch of the information processing device and the micro diagnostic device is provided, and the micro diagnostic device is connected to the micro diagnostic device from the dump switch via the dump switch interface. Receiving a dump instruction through the second interrupt communication area, sets a code of a dump start request in the second interrupt communication area, and causes the arithmetic processing unit to generate an interrupt via the second interrupt port; And a dump means for receiving an interrupt from the micro diagnostic device, confirming that a code of a dump request is set in the second interrupt communication area, and starting dump processing. Information processing device with a micro diagnostic device.

12. 12. The information processing device with a micro diagnostic device according to the item 11, wherein the first unit is provided in the dump unit.
And a dump start notifying means for setting a code of a dump start notification in an interrupt communication area of the micro diagnostic device through the first interrupt port to generate an interrupt in the micro diagnostic device. When an interrupt from the arithmetic processing unit is received and it cannot be confirmed that the code of the dump start notification is set in the first interrupt communication area, a code indicating the restart of the dump is set in the startup parameter area. Set, dump restart means for driving the system reset signal to reset the entire information processing apparatus, and after the arithmetic processing unit has released the system reset, read the start-up parameters,
An information processing apparatus with a micro diagnostic device, comprising: reset dump processing means for starting a dump when the code indicating the restart of the dump is set.

13. 13. The information processing device with a micro diagnostic device according to any one of 5 to 12, wherein an unmanned operation control device receives an external signal of the information processing device and issues a power-on instruction or a power-off instruction to the information processing device. An unattended operation control interface for connecting the micro diagnostic device with the micro diagnostic device, and when the micro diagnostic device receives a power-on instruction from the unmanned power control device via the unmanned power control interface, the power supply is controlled with respect to the power control device. An unmanned power-on means for instructing power-on via a control interface and powering on the entire information processing apparatus, and when the micro diagnostic device receives a power-off instruction from the unmanned power control device via the unmanned power interface. The micro-diagnosis device may code the block request into the second interrupt communication area. Sets, via the second interrupt port, the micro-diagnostic system with an information processing apparatus characterized by having a closing process request means for generating an interrupt to the processor.

14. 14. The information processing apparatus with a micro diagnostic device according to any one of 5 to 13, wherein the information processing device is connected to the same peripheral bus as the micro diagnostic device, is accessible from the arithmetic processing device and the micro diagnostic device, and has a current date and time. The time is always updated and held, and the calendar clock is accessed when data is written to the logging buffer in the logging completion means and the logging completion monitoring means, and the current time is stored in the logging buffer. An information processing apparatus with a micro diagnostic device, comprising: a time stamp unit.

15. 15. The information processing device with a micro diagnostic device according to the above 14, wherein a startup time area is provided in the logging buffer, and the power of the entire information processing device except for the peripheral bus connected to the micro diagnostic device is turned off. The micro diagnostic device compares the start-up time area with the calendar clock at fixed time intervals, and when both times match, powers on the power control device via the power control interface. And an unmanned power-on means for turning on the power of the information processing apparatus as a whole.

16. 16. The information processing device with a micro diagnostic device according to 15, wherein a power-on factor area is provided in the logging buffer, and power-on factor setting means for setting a power-on factor in the power-on factor area when power is turned on. An information processing device with a micro diagnostic device, characterized in that:

17. 17. The information processing apparatus with a micro diagnostic device according to the item 16, wherein a watchdog timer count value area and a watchdog update area are provided in the logging buffer, and the arithmetic processing unit stores the count value in the watchdog timer count value area. Set,
A watchdog timer start requesting means for setting a watchdog timer start request code in the first interrupt communication area and generating an interrupt in the micro diagnostic device through the first interrupt port; Within the first interrupt communication area, confirms that the code of the watchdog timer start request is set in the first interrupt communication area. At each interval, it is confirmed that the watchdog timer update area is updated by the arithmetic processing unit, and if it is updated, the watchdog timer update area is cleared. 2. Set the watchdog timer run-out code in the interrupt communication area 2 Through the second interrupt port, the micro-diagnostic system with an information processing apparatus characterized by having a watch dog timer processing means for generating an interrupt to the processor.

18. 18. The information processing device with a micro diagnostic device according to claim 17, wherein an error bit of a watchdog timer run-out is provided in the error information register, and when the watchdog timer update area is not updated within a predetermined time, the error of the microdiagnostic device is reduced. An information processing device with a micro diagnostic device, comprising: runout notifying means for setting a corresponding bit of an information register and generating an interrupt in the arithmetic processing device via the error information register.

19. 20. The information processing device with a micro diagnostic device according to any one of 2 to 19, wherein an individual peripheral bus reset signal line output from the micro diagnostic device and resetting each peripheral bus except a peripheral bus to which the micro diagnostic device is connected is provided. The arithmetic processing unit sets a code of each peripheral bus reset request corresponding to each individual peripheral bus in the first interrupt communication area, and sends the code to the micro diagnostic device via the first interrupt port. An individual peripheral bus reset output requesting means for generating an interrupt; an interrupt from the arithmetic processing unit received in the micro diagnostic device; and a code for each individual reset output request set in the first interrupt communication area. That the peripheral bus is reset individually by driving the corresponding individual peripheral bus reset signal. Micro diagnostic apparatus with the information processing apparatus characterized by comprising a bus reset generation.

[0083]

As described above, in an information processing device of a class below a minicomputer, an inexpensive micro diagnostic device is connected on a peripheral bus, so that it is employed in an information processing device of a class more than a conventional minicomputer. This makes it possible to realize a function comparable to that of the system controller dedicated to fault collection.

Further, this application field is wide, and it is possible to realize functions more than conventional system control devices.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a conventional configuration diagram.

FIG. 3 is a flowchart of a logging unit.

FIG. 4 is a flowchart of a logging completion notifying unit;

Fig. 5 Contents of logging buffer

FIG. 6 shows details of a log area header.

FIG. 7 shows details of a log area data part.

FIG. 8 is a configuration diagram 2 of an embodiment.

FIG. 9 is a flowchart of an external alarm device alarm output request unit.

FIG. 10 is a flowchart of an external alarm device alarm output generating means.

FIG. 11 is a flowchart of a system reset output requesting unit;

FIG. 12 is a flowchart of a system reset output generating means.

FIG. 13 is a flowchart of a power failure logging unit.

FIG. 14 is a flowchart of a power failure notification unit.

FIG. 15 is a flowchart of a power failure blocking means.

FIG. 16 is a flowchart of a power-on means.

FIG. 17 is a flowchart of a blocking processing requesting unit;

FIG. 18 is a flowchart of a closing unit.

FIG. 19 is a flowchart of power-off request means;

FIG. 20 is a flowchart of a power-off means.

FIG. 21 is a flowchart of a blocking processing informing means;

FIG. 22 is a flowchart of a forced power-off means.

FIG. 23 is a list of interrupt codes in the first communication area

FIG. 24 is a list of second communication area interrupt codes.

FIG. 25 is a list of start-up parameter codes.

FIG. 26 shows details of a boot information area.

FIG. 27: Details of the start-up time area

[Explanation of symbols]

Reference Signs List 1 system bus 2 arithmetic processing unit (EPU) 3 main storage unit (MEM) 4 bus interface unit (BIU) 5 error information register (EIR) 6 micro diagnostic unit (MDG) 7 logging buffer (LBF) 8 peripheral bus 9 calendar clock (TOD) 10 Serial I / O port (SIO) 11 System control unit (SCU) 12 Gateway (GW) 13 Peripheral control unit (PCU) 21 Error detection circuit in arithmetic processing unit 22 Interrupt signal from micro diagnostic device to arithmetic processing unit 31 Error Detection Circuit in Main Storage Device 41 Error Detection Circuit in Bus Interface Device 42 First Interrupt Port 43 Second Interrupt Port 51 System Bus Error Detection Circuit 52 Error Information Register Interrupt Signal 61 Error Logging Completion Notification Means 62 External Warning Device 63 Interruption signal from arithmetic processing male value to micro diagnostic device 64 System reset signal line 65 Power control device (PCM) 66 Power device (POW) 67 Power control interface 100 Console (CNL) 601 Power switch interface 602 Dump switch interface 603 Unmanned Operation control device interface 610 Power switch 620 Dump switch 630 Unmanned operation control device (APU) 710 First interrupt communication area 720 Second interrupt communication area 730 Startup parameter area 740 Startup time area 750 Power-on factor area 760 Watchdog Timer count value area 765 Watchdog timer update area 770 Boot information area 780 Log area header 781 Start address of valid record 82 valid record number 783 next record number is the log 790 the log data unit 791 log number 792 log time 793 logs code type 794 log record data length 795 data unit

Claims (5)

(57) [Claims] An arithmetic processing device, a bus interface device, and a main storage device are connected by a system bus, the bus interface device has one or more peripheral buses, and one of the peripheral buses has a micro diagnosis. An information processing apparatus, wherein an apparatus is connected and an external warning device is connected to the micro diagnostic device, wherein the information processing device includes a plurality of error detection circuits that output an error signal when an error is detected. It is connected to the same peripheral bus as the device, collects the error signal detected by the error detection circuit, notifies the arithmetic processing device and the micro diagnostic device as an OR of the error signal as an interrupt, and notifies the arithmetic processing device and the An error information register accessible from the micro diagnostic device and resettable from the arithmetic processing device; A non-volatile logging buffer connected to the same peripheral bus as the disconnection device and accessible from the arithmetic processing unit and the micro diagnostic device; and An error logging means for recognizing and collecting detailed error information and storing the error information in the logging buffer; a logging completion notifying means for notifying the micro-diagnosis device of the completion of logging from the arithmetic processing device; and the micro-diagnosis device. After receiving an interrupt from the error information register, monitoring that the notification by the logging completion notifying means is performed within a predetermined time, and when the logging is not completed within the predetermined time, the micro diagnostic device Accesses the error information register, stores the contents in the logging buffer, Micro diagnostic apparatus with the information processing apparatus characterized by having a logging completion monitoring means for generating a warning to tell device. 2. The information processing device with a micro diagnostic device according to claim 1, wherein a first interrupt port for generating an interrupt from the arithmetic processing device to the micro diagnostic device is provided in the bus interface device, and the logging buffer. A first interrupt communication area indicating an interrupt factor from the arithmetic processing unit to the micro-diagnosis device is provided, and when a predetermined error is detected in the system by the error logging means or software, the An external alarm device alarm output requesting means for setting an external alarm device alarm output code in one interrupt communication area and generating an interrupt in the micro diagnostic device via the first interrupt port; Receiving an interrupt from the arithmetic processing unit and setting an external alarm device in the first interrupt communication area. Ensure that the code of the alarm output is set, the micro-diagnostic system with an information processing apparatus characterized by having an external alarm Alarm output generating means for outputting an alarm to the external alarm. 3. The information processing device with a micro diagnostic device according to claim 2, further comprising: a system reset signal line output from the micro diagnostic device and resetting the entire information processing device excluding the micro diagnostic device. A system reset output requesting unit that sets a code of a system reset request in the first interrupt communication area, and generates an interrupt to the micro diagnostic device through the first interrupt port; Receiving an interrupt from the arithmetic processing unit, confirming that a system reset output request code is set in the first interrupt communication area, driving a system reset signal, and With a micro-diagnosis device having a system reset generating means for resetting Information processing device. 4. The information processing device with a micro diagnostic device according to claim 3, wherein a plurality of power control devices for controlling a power device in the information processing device and a power control interface for connecting the micro diagnostic device; A second interrupt port for generating an interrupt from the micro diagnostic device to the arithmetic processing device in the bus interface device; and a second interrupt port indicating the interrupt factor from the micro diagnostic device to the arithmetic processing device in the logging buffer. An interrupt communication area is provided, and when an abnormality occurs in the power supply, the micro diagnostic device collects an abnormal status from the power control device via the power control interface and stores the status in the logging buffer. A logging unit, wherein the micro diagnostic device has a power failure in the second interrupt communication area. Power failure notification means for generating an interrupt to the arithmetic processing device via the second interrupt port; and the arithmetic processing device receiving an interrupt from the micro diagnostic device, And a power failure blocking means for confirming that the power failure code is set in the interrupt communication area of the above and starting the blocking processing. 5. The information processing device with a micro diagnostic device according to claim 4, further comprising a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device, wherein the micro diagnostic device is connected to the power switch by the power switch. Upon receiving a power-on instruction via the power switch interface, the power-on means instructs the power control device to power on via the power control interface, and powers on the entire information processing apparatus; When the diagnostic device receives a power-off instruction from the power switch via the power switch interface, the micro-diagnostic device sets a code of a block request in the second interrupt communication area, and sets the second interrupt port to Requesting a blocking process to generate an interrupt in the arithmetic processing unit Closing means for receiving the interrupt from the micro diagnostic device, confirming that the code of the closing request is set in the second interrupt communication area, and starting the closing process; and Power-off request means for setting a power-off request code in the first interrupt communication area after the arithmetic processing unit has completed the closing process, and generating an interrupt in the micro-diagnosis device via the first interrupt port The micro diagnostic device receives an interrupt from the arithmetic processing device, confirms that a power-off request code is set in the first interrupt communication area, A power supply for instructing power-off via a power control interface and for powering off the entire information processing apparatus except for the peripheral bus connected to the micro-diagnosis apparatus Micro diagnostic apparatus with the information processing apparatus characterized by having a cross section.