JP2761871B2 - Printed board - Google Patents
Printed boardInfo
- Publication number
- JP2761871B2 JP2761871B2 JP8286179A JP28617996A JP2761871B2 JP 2761871 B2 JP2761871 B2 JP 2761871B2 JP 8286179 A JP8286179 A JP 8286179A JP 28617996 A JP28617996 A JP 28617996A JP 2761871 B2 JP2761871 B2 JP 2761871B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- circuit pattern
- substrate
- insulating substrate
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Structure Of Printed Boards (AREA)
Description
【０００１】[0001]
【産業上の利用分野】この発明は、絶縁性の基板表面に
銅箔等の回路パターンが形成されたプリント基板に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board having a circuit pattern such as a copper foil formed on an insulating substrate surface.
【０００２】[0002]
【従来の技術】従来、実開昭５８−１７０８６０号、実
開昭６０−１６９８５７号公報に開示されているよう
に、回路基板に対して電子部品を実装する際の熱によっ
て、回路基板が反ってしまうのを防止するため、プリン
ト基板のうちの回路パターンのない捨て基板部に導体層
を形成したものがある。この捨て基板部の導体層は、回
路基板部の回路パターン形成面とは逆の側に形成されて
いる。2. Description of the Related Art Conventionally, as disclosed in Japanese Utility Model Unexamined Publication No. Sho 58-170860 and Japanese Utility Model Laid-Open Publication No. Sho 60-169857, a circuit board is warped by heat when electronic components are mounted on the circuit board. There is a printed circuit board in which a conductor layer is formed on a discarded board portion having no circuit pattern in order to prevent such a situation. The conductor layer of the discard substrate portion is formed on the side opposite to the circuit pattern forming surface of the circuit substrate portion.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の技術の場
合、単に回路パターンが形成されていない側の捨て基板
部に導体層を形成しているだけなので、回路基板部の回
路パターン密度の異なる場合や両面に回路パターンがあ
る場合等に十分に反りを防止できないという問題があ
る。In the case of the above prior art, since the conductor layer is simply formed on the discarded substrate portion on which the circuit pattern is not formed, when the circuit pattern density of the circuit substrate portion is different. There is a problem that warpage cannot be sufficiently prevented when there is a circuit pattern on both sides or the like.
【０００４】さらに、絶縁基板に樹脂被膜や導電塗料に
よる回路を形成した後の加熱乾燥工程によって、絶縁基
板中の水分が抜けたり、絶縁基板中の樹脂が未硬化の場
合にこの工程で完全に硬化したりするが、このとき絶縁
基板自体が収縮し、銅箔等の回路パターンは収縮しない
ので、プリント基板は回路パターン側を凸にして反って
しまい、上記従来の技術ではこれを防止できない。Further, in the case where moisture in the insulating substrate is removed or the resin in the insulating substrate is not cured by the heating and drying process after forming the circuit with the resin film or the conductive paint on the insulating substrate, the process is completely performed in this process. At this time, the insulating substrate itself shrinks and the circuit pattern such as a copper foil does not shrink at this time, so that the printed circuit board warps with the circuit pattern side protruding, which cannot be prevented by the above-described conventional technology.
【０００５】この発明は上記従来の技術に鑑みてなされ
たもので、回路パターンが形成されたプリント基板の製
造工程途中における反りをなくしたプリント基板を提供
することを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional technique, and has as its object to provide a printed circuit board in which a printed circuit board on which a circuit pattern is formed is free from warpage during the manufacturing process.
【０００６】[0006]
【課題を解決するための手段】この発明は、絶縁基板の
両面に所定の回路パターンを形成した回路基板部と、回
路基板部以外の捨て基板部とを有し、各回路パターン形
成面の回路パターンの面積割合と、上記捨て基板の導体
層の面積割合の大小を、上記絶縁基板の両面で互いに逆
にしたプリント基板である。さらに、上記回路パターン
と上記捨て基板の導体層との間に、分割用の透孔を形成
した請ものである。また、上記捨て基板は、上記絶縁基
板の周囲の側縁部の上記透孔の外側に設けられている。 SUMMARY OF THE INVENTION The present invention has a circuit board portion in which a predetermined circuit pattern is formed on both surfaces of an insulating substrate, and a discard substrate portion other than the circuit board portion. This is a printed board in which the area ratio of the pattern and the area ratio of the conductor layer of the discard substrate are reversed on both sides of the insulating substrate. Furthermore, a through hole for division is formed between the circuit pattern and the conductor layer of the waste substrate. Further, the discarded substrate is provided with the insulating base.
It is provided outside the through hole on the side edge around the plate.
【０００７】[0007]
【作用】この発明のプリント基板は、空きスペースに透
孔が形成され、絶縁基板内部の応力が分散また開放さ
れ、さらに、捨て基板部の導体層が反りに対して抵抗
し、プリント基板が製造工程途中で反ってしまうことが
ないようにしたものである。According to the printed circuit board of the present invention, a through hole is formed in an empty space, the stress inside the insulating substrate is dispersed or released, and the conductor layer of the discarded board portion resists warping, so that the printed circuit board is manufactured. This is to prevent warping during the process.
【０００８】[0008]
【実施例】以下、この発明の実施例について図面に基づ
いて説明する。この実施例のプリント基板１は、フェノ
ール樹脂等の絶縁基板２に銅箔の回路パターン３を形成
したもので、複数の回路の回路パターン３がミシン目４
をはさんで形成されている。さらに、絶縁基板２の側縁
部には、透孔であるミシン目４が設けられ、このミシン
目４の内側は回路パターン３が設けられた回路基板部５
であり、外側は回路パターン３が形成されていない捨て
基板部６である。Embodiments of the present invention will be described below with reference to the drawings. The printed circuit board 1 of this embodiment is obtained by forming a circuit pattern 3 of copper foil on an insulating substrate 2 of phenol resin or the like.
Are formed. Further, a perforation 4 which is a through hole is provided at a side edge portion of the insulating substrate 2, and a circuit board portion 5 on which the circuit pattern 3 is provided is provided inside the perforation 4.
The outer side is a discard substrate portion 6 on which the circuit pattern 3 is not formed.
【０００９】回路基板部５には、表裏面に回路パターン
３が設けられている他、チップ抵抗等の電子素子７が表
側の回路パターン３に装着され、この電子素子７の装着
部を除いて回路パターン３の表面及び絶縁基板２の表面
は、ハンダレジストである樹脂被膜８で被われている。The circuit board 5 has a circuit pattern 3 on the front and back surfaces, and an electronic element 7 such as a chip resistor is mounted on the circuit pattern 3 on the front side. The surface of the circuit pattern 3 and the surface of the insulating substrate 2 are covered with a resin film 8 as a solder resist.
【００１０】また、捨て基板部６の表裏面にはマトリク
ス状に方形の銅箔９が設けられ、電子素子７が設けられ
ている表側の捨て基板表面の銅箔９は、捨て基板６の裏
面側の銅箔９より銅箔の島面積の密度が高く形成されて
いる。これは、回路基板部５の回路パターン３の表面積
の密度が回路基板部５の表側より裏側の方が高いので、
変形時の応力を相互に打ち消すように、銅箔の絶縁基板
１に対する面積比を調整しているものである。さらに、
捨て基板部６の表裏面にもハンダレジストである樹脂被
膜１０が設けられている。A rectangular copper foil 9 is provided in a matrix on the front and back surfaces of the discard substrate portion 6. The density of the copper foil island area is higher than that of the copper foil 9 on the side. This is because the density of the surface area of the circuit pattern 3 of the circuit board part 5 is higher on the back side than on the front side of the circuit board part 5,
The area ratio of the copper foil to the insulating substrate 1 is adjusted so that the stress at the time of deformation mutually cancels out. further,
A resin film 10 as a solder resist is also provided on the front and back surfaces of the discard substrate portion 6.
【００１１】また、絶縁基板２の回路パターン３が形成
されていない部分のうち比較的広い部分は、打ち抜かれ
て透孔１１が形成されている。透孔１１は、回路パター
ン３に沿って形成され、回路基板５の内部応力や回路パ
ターンによる応力を分散又は開放するように設けられて
いる。A relatively wide portion of the insulating substrate 2 where the circuit pattern 3 is not formed is punched to form a through hole 11. The through-hole 11 is formed along the circuit pattern 3 and is provided so as to disperse or release the internal stress of the circuit board 5 and the stress due to the circuit pattern.
【００１２】この実施例のプリント基板１は、絶縁基板
２の表面に周知の方法で銅箔の回路パターン３を形成
し、その際同様の方法で捨て基板６にも銅箔９の方形パ
ターンを形成する。次に、必要に応じて絶縁基板１の表
裏面に印刷抵抗等を設け、この後電子素子７が装着され
る部分を除いて回路基板部５および捨て基板部６の表裏
面に樹脂被膜８，１０が施される。このようにして形成
されたプリント基板１は、電子機器に組み込まれる前に
電子素子７が装着され、ミシン目４に沿って捨て基板部
６が分割されて除去され、一枚毎の回路基板にされて所
定のコネクタ等が取り付けられ電子機器に組み込まれ
る。In the printed circuit board 1 of this embodiment, a circuit pattern 3 of copper foil is formed on the surface of an insulating substrate 2 by a known method. Form. Next, if necessary, a printed resistor or the like is provided on the front and back surfaces of the insulating substrate 1, and thereafter, a resin film 8, 10 is applied. Before the printed circuit board 1 thus formed is mounted on an electronic device, the electronic element 7 is mounted thereon, and the discarded board section 6 is divided and removed along the perforations 4 to form a circuit board for each sheet. Then, a predetermined connector or the like is attached and incorporated into the electronic device.
【００１３】この実施例のプリント基板１は、捨て基板
部６に回路基板部５の回路パターン３の表裏面での密度
の差を打ち消すように、逆の密度で銅箔９を表裏面に設
けたので、絶縁基板２と回路パターン３との熱膨張率、
収縮率の差により回路基板部５が反ろうとする力に対し
て、捨て基板部６により逆の方向に抵抗し、全体として
プリント基板１に反りが生じない。In the printed board 1 of this embodiment, copper foils 9 are provided on the front and back surfaces of the discarded board portion 6 at opposite densities so as to cancel the difference in density between the front and back surfaces of the circuit pattern 3 of the circuit board portion 5. Therefore, the coefficient of thermal expansion between the insulating substrate 2 and the circuit pattern 3
The circuit board unit 5 resists the warping force due to the difference in the shrinkage, and the discarding board unit 6 resists in the opposite direction, so that the printed board 1 does not warp as a whole.
【００１４】しかも、回路基板部５のみならず捨て基板
部６の表裏面にも樹脂被膜１０が施されているので、上
記のプリント基板１の反りに対して、この樹脂被膜８，
１０が抵抗し、反りをほとんどなくすことができる。さ
らにこれによって、プリント基板１に樹脂被膜、導電塗
料による回路やスルーホールを形成する際の加熱乾燥に
よる絶縁基板の収縮に対しても、樹脂被膜８，１０が抵
抗して反りを防止する。さらに、電子素子を取り付ける
際のフローソルダー等による熱膨張及び収縮に対しても
全くプリント基板１には反りが生じない。In addition, since the resin coating 10 is applied not only to the circuit board 5 but also to the front and back surfaces of the discarding board 6, the resin coating 8,
10 can resist and warp can be almost eliminated. Further, thereby, the resin coatings 8 and 10 also resist warping due to shrinkage of the insulating substrate due to heating and drying when forming a circuit or a through hole made of a resin coating or conductive paint on the printed board 1. Further, the printed circuit board 1 is not warped at all due to thermal expansion and contraction caused by a flow solder or the like when the electronic element is mounted.
【００１５】また、絶縁基板２の空スペースには透孔１
１が形成され、絶縁基板２に熱応力が生じた際にも部分
的にその応力が分散または開放され反りを確実に防止し
ている。Further, a through hole 1 is formed in an empty space of the insulating substrate 2.
1 is formed, and even when thermal stress is generated in the insulating substrate 2, the stress is partially dispersed or released to reliably prevent warpage.
【００１６】この発明のプリント基板は、捨て基板部の
片面だけに導体層を形成し、その上にさらに樹脂被膜を
施したものでも良い。この場合、回路基板部の回路パタ
ーンと同じ側の捨て基板部の表面に導体層を設け、さら
に回路基板部と捨て基板部の両面に樹脂被膜を施す。こ
れによっても加熱による絶縁基板の収縮を防止すること
ができ、プリント基板の反りをなくすことができる。The printed circuit board according to the present invention may be such that a conductor layer is formed only on one side of the discarded board portion, and a resin film is further provided thereon. In this case, a conductor layer is provided on the surface of the discard substrate portion on the same side as the circuit pattern of the circuit board portion, and a resin coating is applied to both surfaces of the circuit substrate portion and the discard substrate portion. This can also prevent the insulating substrate from shrinking due to heating, and can eliminate the warpage of the printed circuit board.
【００１７】尚、この発明のプリント基板の捨て基板部
の導体層の形は方形以外に丸や菱形等適宜選択できるも
のである。さらに、樹脂被膜も、熱硬化性樹脂、紫外線
硬化性樹脂等適宜選定し得ることは言うまでもない。ま
た、透孔の形状も任意に設定可能である。The shape of the conductor layer in the discarded substrate portion of the printed circuit board of the present invention can be appropriately selected, such as a circle or a diamond, in addition to a square. Further, it goes without saying that the resin film can be appropriately selected from a thermosetting resin, an ultraviolet curable resin, and the like. Also, the shape of the through hole can be set arbitrarily.
【００１８】また、電子素子は絶縁基板の両側に設けら
れていても良く、回路パターンの回路は導箔の外、導電
塗料による回路パターンがさらに形成されていても良
い。Further, the electronic elements may be provided on both sides of the insulating substrate, and the circuit of the circuit pattern may be further formed with a circuit pattern of a conductive paint in addition to the conductive foil.
【００１９】[0019]
【発明の効果】この発明は、プリント基板の回路基板部
と捨て基板部に、回路パターン及び導体層を形成すると
共に、回路パターン形成面の回路パターンの面積割合
と、上記捨て基板の島状の導体層の面積割合の大小を、
上記絶縁基板の両面で互いに逆にし、基板にそりが生じ
にくいものである。 According to the present invention, a circuit pattern and a conductor layer are formed on a circuit board portion and a discarded board portion of a printed circuit board, and an area ratio of the circuit pattern on a circuit pattern forming surface.
And the magnitude of the area ratio of the island-shaped conductor layer of the discarded substrate,
Invert the board on both sides of the insulating board and warp the board.
It is difficult.
【図１】この発明のプリント基板の一実施例の断面図で
ある。FIG. 1 is a sectional view of a printed circuit board according to an embodiment of the present invention.
【図２】この実施例の部分破断平面図である。FIG. 2 is a partially broken plan view of this embodiment.
１ プリント基板 ２ 絶縁基板 ３ 回路パターン ４ ミシン目 ５ 回路基板部 ６ 捨て基板部 ８，１０ 樹脂被膜 ９ 銅箔 １１ 透孔 DESCRIPTION OF SYMBOLS 1 Printed circuit board 2 Insulated board 3 Circuit pattern 4 Perforation 5 Circuit board part 6 Discard board part 8,10 Resin coating 9 Copper foil 11 Through hole
───────────────────────────────────────────────────── フロントページの続き (72)発明者 山藤 秀一 富山県上新川郡大沢野町下大久保3158番 地 北陸電気工業株式会社内 (56)参考文献 特開 昭60−204370（ＪＰ，Ａ) 特開 昭60−194593（ＪＰ，Ａ) 実開 昭62−172165（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.6，ＤＢ名) H05K 1/02────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shuichi Yamafuji 3158, Shimo-Okubo, Osawano-cho, Kamishinkawa-gun, Toyama Pref. 60-194593 (JP, A) Japanese Utility Model Showa 62-172165 (JP, U) (58) Fields investigated (Int. Cl. 6 , DB name) H05K 1/02
Claims (2)
形成した回路基板部と、回路基板部以外の捨て基板部と
を有し、各回路パターン形成面の回路パターンの面積割
合と、上記捨て基板の島状の導体層の面積割合の大小
を、上記絶縁基板の両面で互いに逆にし、上記回路パタ
ーンと上記捨て基板の導体層との間に、分割用の透孔を
形成したプリント基板。1. A circuit board part having a predetermined circuit pattern formed on both sides of an insulating substrate, and a discarded board part other than the circuit board part. The area ratio of the island-shaped conductor layers of the substrate is reversed on both sides of the insulating substrate, and the circuit pattern is
Between the ground and the conductor layer of the waste substrate.
Printed circuit board formed .
側縁部の上記透孔の外側に設けられている請求項１記載
のプリント基板。 2. The method according to claim 1, wherein said discarded substrate is provided around said insulating substrate.
2. A side edge portion provided outside the through hole.
Printed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286179A JP2761871B2 (en) | 1996-10-07 | 1996-10-07 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286179A JP2761871B2 (en) | 1996-10-07 | 1996-10-07 | Printed board |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6192770A Division JP2612844B2 (en) | 1994-07-25 | 1994-07-25 | Printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09107160A JPH09107160A (en) | 1997-04-22 |
| JP2761871B2 true JP2761871B2 (en) | 1998-06-04 |
Family
ID=17700978
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8286179A Expired - Lifetime JP2761871B2 (en) | 1996-10-07 | 1996-10-07 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2761871B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4779668B2 (en) * | 2006-01-25 | 2011-09-28 | パナソニック株式会社 | Manufacturing method of laminated substrate |
| JP4764731B2 (en) * | 2006-01-30 | 2011-09-07 | 富士通株式会社 | Multilayer printed circuit board |
| CN103068178A (en) * | 2011-10-19 | 2013-04-24 | 上海嘉捷通信息科技有限公司 | Printed board resistance welding page type PIN contraposition method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60194593A (en) * | 1984-03-16 | 1985-10-03 | 株式会社リコー | Wiring pattern for electronic device |
| JPS60204370A (en) * | 1984-03-30 | 1985-10-15 | Canon Inc | Wiring pattern |
| JPS62172165U (en) * | 1986-04-23 | 1987-10-31 | ||
| JPH0716086A (en) * | 1993-06-30 | 1995-01-20 | Shinko Home Service Kk | Deodorant |
-
1996
- 1996-10-07 JP JP8286179A patent/JP2761871B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09107160A (en) | 1997-04-22 |
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