JP2777333B2 - Method for manufacturing semiconductor memory device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor (Thin).
The present invention relates to a method of manufacturing a semiconductor memory device using a TFT (TFT), and more particularly to a method of forming a gate electrode on a semiconductor substrate to solve a short circuit problem between a bit line and a charge storage electrode. It relates to a manufacturing method.

[0002]

2. Description of the Related Art In general, in a DRAM structure, as the degree of integration increases, the distance between a bit line and a word line and the distance between a charge storage electrode and a word line are sharply reduced. However, since there is a serious problem that a short circuit occurs between them, a strict matching degree is required when forming a contact, and there is a problem that the margin during the process is extremely reduced.

[0003]

SUMMARY OF THE INVENTION Accordingly, the present invention has been made in view of the above-mentioned problems. First, a word line is formed on a semiconductor substrate, and then a TFT is formed by polysilicon on the word line.
It is an object of the present invention to provide a method of manufacturing a semiconductor memory device in which a word line can be isolated from a bit line contact region and a charge storage electrode contact region by forming a (thin film transistor).

[0004]

In order to achieve the above object, a method of manufacturing a semiconductor memory device according to the present invention comprises forming an element isolation insulating film 3 on a semiconductor substrate 1 and then forming a gate region by ion implantation. Forming a gate insulating film 4 on the element isolation insulating film 3 and the gate region 2 from the above step; depositing polysilicon on the gate insulating film 4; Etching a predetermined portion of silicon to form an activation region 5 of the thin film transistor; and arranging a photoresist mask 6 with a predetermined width on the activation region 5 corresponding to the gate region 2 from the stage. Ion-implanting the exposed active region 5 of the thin film transistor to form a source / drain region 5A of the thin film transistor; And, first on top of the active region 5
Forming a first contact hole 15 by etching a predetermined portion of the first insulating film 7 above the source / drain region 5A of the thin film transistor after the insulating film 7 is deposited; Forming a bit line 8 by a patterning process by burying a conductor in the first contact hole 15 and forming a second layer on the first insulating film 7 and the bit line 8 from the step. Forming the second contact hole 16 by etching the first and second insulating films 7 and 9 above the source / drain region 5A of the thin film transistor with a predetermined width after forming the insulating film 9; Forming a charge storage electrode 10 by burying a conductor in the second contact hole 16 from the above step and performing a patterning process; Characterized in that comprising the step of forming the capacitor insulating film 11 and a plate electrode 12 are sequentially around the electrode 10.

In the present invention, a thin film transistor can be formed after heat-treating the polysilicon deposited on the gate insulating film 4 into single-crystal silicon.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a layout diagram for manufacturing a semiconductor memory device according to the present invention. In FIG. 1, the word line 2, the bit line 8
And a region where the charge storage electrode 10 is located, and the contact region 13 of this bit line is
The contact region 14 for the charge storage electrode is a portion connected to the drain region.
The active region 5 of the thin film transistor represents a portion that operates as a thin film transistor.

FIGS. 2A to 2D are cross-sectional views showing steps for manufacturing a semiconductor memory device according to the present invention. In FIG. 2A, a device isolation insulating film 3 is formed on a semiconductor substrate 1, and a gate region 2 is formed by ion implantation using the device isolation insulating film 3 as a mask. Since such a gate region 2 is used as a word line (2 in FIG. 1) of the storage device, the resistance must be as low as possible.

FIG. 2B shows that a gate insulating film 4 is formed on the gate region 2 and the element isolation insulating film 3 by a thermal oxidation method or a chemical vapor deposition method from the structure of FIG. A predetermined portion of the insulating film 4 with polysilicon deposited is etched to form an active region 5 of the thin film transistor, and then the gate region 2 is formed on the active region 5 corresponding to the gate region 2. FIG. 5 is a cross-sectional view showing a state in which a source / drain region 5 (A) of a thin film transistor is formed by ion implantation after arranging a photosensitive film mask 6 having the same width as that of the thin film transistor. Channel region 5B.

On the other hand, in FIG. 2B, a thin film transistor can be formed after the polysilicon 5 deposited on the gate insulating film 4 is heat-treated into single-crystal silicon.

FIG. 2C shows that the photoresist mask 6 is removed, a first insulating film 7 is deposited on the active region 5, and then the source / drain region 5A of the thin film transistor is deposited. The first insulating film 7 is etched to a predetermined width to form a first contact hole 15 and then a conductor is buried in the first contact hole 15 to form a bit line 8 by a patterning process. It is sectional drawing of the state made to be made.

FIG. 2D shows that after the bit line 8 is formed, a second insulating film 7 is formed on the first insulating film 7 and the bit line 8, and then the source of the thin film transistor is formed. And the first and second portions above the drain / drain region 5A.
The insulating films 7 and 9 are etched with a predetermined width to form a second contact hole 16, and then a conductor is buried in the second contact hole 16 to form a charge storage electrode 10 by a patterning process. At this stage, the capacitor insulating film 11 and the plate electrode 12
Is a cross-sectional view of a state in which are formed in order.

[0012]

As described above, according to the present invention, a thin film transistor is applied to a semiconductor memory device to form a word line on a silicon substrate, thereby forming a space between a word line and a bit line and a word line. Since the problem of short circuit with the charge storage electrode can be completely eliminated, there is an effect that the margin during the process is increased.

Further, the active region of the semiconductor memory device according to the present invention is formed so that the silicon substrate and other active regions and the insulating film are separated from each other, thereby solving the problem of generating leakage current. Therefore, there is an effect that the yield can be improved and the characteristics of the storage element can be improved.

[Brief description of the drawings]

FIG. 1 is a layout diagram for manufacturing a semiconductor memory device according to the present invention.

FIGS. 2A to 2D are cross-sectional views showing the steps of manufacturing a semiconductor memory device according to the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 semiconductor substrate 2 gate region (word line) 3 element isolation insulating film 4 gate insulating film 5 active region 6 photosensitive film mask 7 first insulating film 8 bit line 9 second insulating film 10 charge storage electrode 11 capacitor insulating film 12 Plate electrode 13 Bit line contact area 14 Contact area for charge storage electrode 15 First contact hole 16 Second contact hole

Claims (2)

(57) [Claims] In a method of manufacturing a semiconductor memory device, an element isolation insulating film is formed on a semiconductor substrate for element isolation.
Forming a gate region (2) by an ion implantation method; and
After a gate insulating film (4) is formed on the upper portion of the thin film transistor, polysilicon is deposited on the upper portion of the gate insulating film (4), and a predetermined portion of the polysilicon is etched to activate an active region ( Forming a photosensitive film mask (6) with a predetermined width on the activation region (5) corresponding to the gate region (2) from the step of forming the photosensitive film mask;
Ion-implanting the exposed activation region (5) of the thin film transistor to form a source / drain region (5A) of the thin film transistor; removing the photoresist mask (6) from the step; After depositing a first insulating film (7) on the region (5),
Etching a predetermined portion of the first insulating film (7) above the source / drain region (5A) of the thin film transistor to form a first contact hole (15); A conductor is buried in the first contact hole (15), and a bit line (8) is formed by a patterning process.
Forming the first insulating film (7) and the bit line (8) from the step
After the second insulating film (9) is formed on the thin film transistor, the first and second insulating films (7) and (9) on the source / drain region (5A) of the thin film transistor are formed with a predetermined width. Forming a second contact hole 16 by etching; filling the second contact hole 16 with a conductor from the step; and patterning the charge storage electrode 10 by a patterning process.
Forming a capacitor insulating film (11) and a plate electrode (12) around the charge storage electrode (10) in this order from the above step. . 2. The semiconductor memory device according to claim 1, wherein the polysilicon (5) on the gate insulating film (4) is heat-treated into single-crystal silicon to form a thin film transistor. Manufacturing method.