JP2790086B2 - Automatic logic circuit synthesizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic design CAD for performing a logic design of a digital logic system by a computer, and more particularly to a logic circuit for synthesizing a logic circuit based on a logic description described by a hardware description language (HDL). To an automatic synthesizer.

[0002]

2. Description of the Related Art Various automatic logic circuit synthesizing apparatuses for analyzing a logic description described in a hardware description language in accordance with a predetermined rule and synthesizing a logic circuit based on the analysis result have been known. (For example, Japanese Patent Laid-Open No. 5-128203).

When a logic circuit is synthesized using an automatic logic circuit synthesizer, it is desirable that the logic circuit be synthesized by a function block intended by a designer of the logic circuit. Such a thing is not considered at all, and a logic circuit is simply synthesized by a function block that realizes a logic represented by a logic description.

[0004]

As described above, in a conventional automatic synthesis circuit for a logic circuit, it is not considered at all that synthesis of a logic circuit by a function block intended by a designer is considered. Since a logic circuit is simply synthesized by a function block that realizes a logic represented by a logic description, there is a problem that a logic circuit desired by a designer may not be obtained. For example, even if the designer intends to realize a certain part of the logic in the logic description by a function block having a short delay time, another function block having the same logic as the above function block and having a long delay time is used. There is a problem that it may be realized by the above. In addition, when a logic circuit is synthesized by a function block not intended by the designer, there is a problem that a burden is imposed on the designer because the operation of replacing the function block with the function block intended by the designer must be performed.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an automatic logic circuit synthesizer capable of synthesizing a logic circuit using a function block intended by a designer of the logic circuit.

[0006]

To achieve the above object, the present invention provides an automatic logic circuit synthesis apparatus for synthesizing a logic circuit based on a logic description described in a hardware description language. A function block designating statement that designates an arbitrary logical expression and specifies a function block that realizes the logic represented by the specified logical expression can be incorporated in the logical description, and the function block designating statement is incorporated. An internal data structure conversion unit for inputting the logical description, and converting the input logical description into an internal data structure; and converting the part corresponding to the logical expression specified by the function block specification statement in the internal data structure into the function Replaced with the function block specified by the block specification statement, and the replaced fan And function block replacement unit that performs prohibition specified substituted for Deployment block, in which a logic synthesis unit for performing a logic synthesis to the internal data structure having undergone the replacement by the function block replacement unit.

Further, according to the present invention, the logic of the function block is registered so that the replacement by the function block replacement unit is performed only when the logic of the function block specified by the function block designation statement is equal to the logic of the function block. Wherein the function block replacement unit determines whether or not the logic of the logical expression specified by the function block designating statement is equal to the logic of the function block specified by the function block designating statement. The function block is determined based on the logic of the function block registered in the function block, and the function block is replaced only when it is determined that they are equal.

[0008]

When the logic expressed by a certain logical expression in the logical description is to be realized by a specific function block, the designer of the logical circuit specifies the above logical expression and uses the specified logical expression. A function block designation statement that designates a function block that implements the expressed logic is incorporated in the logic description.

The logical description incorporating the function block designation statement is converted into an internal data structure by an internal data structure conversion unit. Then, the function block replacement unit replaces the part corresponding to the logical expression specified by the function block specification statement in the internal data structure with the function block specified by the function block specification statement, and To specify replacement prohibition. Thereafter, the logic synthesis unit synthesizes the logic circuit by performing logic synthesis on the portion of the replaced internal data structure for which the replacement prohibition designation has not been performed.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, in which a logical description file 1 and an internal data structure conversion unit 2 are shown.
, An internal data structure file 3, a function block replacement unit 4, a library 5, and a logic synthesis unit 6.
, A logic circuit file 7, and an output unit 8.

The logic description file 1 stores a logic description written in a hardware description language that represents the logic of a logic circuit to be synthesized. In the logical description of this embodiment, a function block specifying statement that specifies an arbitrary logical expression in the logical description and specifies a function block that implements the logic represented by the specified logical expression is incorporated. The function block designation statement is not used in the conventional hardware description language.

FIG. 2 is a diagram showing an example of a logical description stored in the logical description file 1, which is composed of function block designation statements 21 to 23 and logical expressions 31 to 35.

A logical expression 31 represents a logic that sets a signal obtained by inverting the input signal A as an output signal X. The logical expression 32 is
The logic of the output signal Y is a signal obtained by inverting the logical product of the input signals B and C. A logical expression 33 is a logic that sets a signal obtained by inverting the input signal D as an output signal Z, and a logical expression 34 is
A logic that sets a signal obtained by inverting the input signal X as an output signal S is
The logical expression 35 is a signal obtained by inverting the input signal Z to the output signal T.
Is expressed.

The function block designation statement 21 represents each logic represented by each logical expression existing between the function block designation statement 21 and the next function block designation statement 22 as a function block having a function block name L101. Specify to be realized. In this example, since only one logical expression 31 exists between the function block specifying statement 21 and the function block specifying statement 22, the function block specifying statement 21 That is, it is designated to be realized by the function block with the block name L101.

The function block designation statement 22 represents each logic represented by each logical expression between the function block designation statement 22 and the next function block designation statement 23 as a function block having a function block name L302. Specify to be realized. In this example, since only one logical expression 32 exists between the function block specifying statement 22 and the function block specifying statement 23, the function block specifying statement 22 This means that the function block with the function name of block name L302 is specified.

The function block specification statement 23 specifies that the effect of the function block specification statement 22 existing before it does not extend beyond it.

The internal data structure conversion unit 2 has a function of inputting a logical description stored in the logical description file 1 and performing syntax analysis, and converting the logical description into an internal data structure based on the analysis result.

In the library 5, the logics of a plurality of function blocks and the function block names are registered correspondingly.

The function block replacement unit 4
A function of determining, based on the contents of the library 5, whether or not the logic of the logical expression specified by the function block specification statement is equal to the logic of the function block specified by the function block specification statement; In this case, the function of outputting error information including the logical expression designated by the function block designation statement and the function block name of the function block to the output unit 8 such as a CRT, and the internal data structure file A function for searching a part corresponding to the logical expression specified by the function block specification statement from the internal data structure stored in 3 and replacing the searched part with the function block specified by the function block specification statement; It has a function to perform the prohibition specified replacement for the function block that done.

The logic synthesis section 6 performs logic synthesis using the library 5 on the internal data structure that has been replaced by the function block replacement section 4, and stores the resulting logic circuit in the logic circuit file 7. It has a function to output.

Next, the operation of the present embodiment will be described by taking as an example a case where the contents of the logical description stored in the logical description file 1 are those shown in FIG.

The internal data structure conversion unit 2 firstly inputs a logical description having the contents shown in FIG. 2 from the logical description file 1, and then performs a syntax analysis on the input logical description, based on the analysis result. Convert logical descriptions into internal data structures. After that, the internal data structure conversion unit 2 stores the internal data structure in the internal data structure file 3, and notifies the function block replacement unit 4 after the storage is completed.

FIG. 3 is a diagram showing an image of a logic circuit represented by the internal data structure stored in the internal data structure file 3. In FIG. 3, 10a, 10b,
10d, 10e and 10f represent inverters, and 10c represents an AND gate. In addition, A, B,
C, D, S, T, X, Y, and Z represent each signal in the logical expression shown in FIG.

The function block replacement unit 4
When the notification is received from the internal data structure conversion unit 2, the processing of the flowchart of FIG. 4 is performed.

First, the function block replacing section 4 stores the first function block designation statement 21 in the logical description shown in FIG.
(S1). Thereafter, the function block replacing unit 4 determines whether or not the content of the currently focused function block designation statement 21 is “* # BLKEND”, that is, the content of the currently focused function block designation statement 21 is It is determined whether or not it indicates the end of the range over which the previous function block designation statement is effective (S3).

If the result of the determination in S3 is YES, the process of S1 is performed, and if it is NO, the process of S4 is performed. In the case of this example, the content of the function block designation statement 21 currently focused on is “* # BLK L101”, and the determination result in S3 is NO, so the function block replacement unit 4 performs the processing in S4. Will be.

In S4, the function block replacement unit 4 sets the function block specification statement 21 of interest at present and the next function block specification statement 2
Attention is paid to one of the logical expressions existing between the two. In the case of this example, since the only logical expression existing between the function block specifying statement 21 and the next function block specifying statement 22 is the logical expression 31, the function block replacing unit 4 pays attention to the logical expression 31. Will be.

Thereafter, the function block replacing section 4 determines the logic of the logical expression 31 of interest and the function block name “L101” specified by the function block designation statement 21 of interest.
Whether the logic of the function block is equal to
The determination is made based on the contents of the library 5 (S6). More specifically, the function block replacement unit 4 searches the library 5 using the function block name “L101” as a key, and extracts the logic of the function block having the function block name “L101” from the library 5. get. After that, the function block replacing unit 4 calculates the logic of the acquired function block and the logical expression 3
By comparing with the logic of 1, it is determined whether or not both are equal.

Then, in S6, the logic of the logical expression 31 of interest and the function block designation statement 21
Function block name "L" specified by
If the function block replacement unit 4 determines that the logic of the function block of “101” is not equal, the function block replacement unit 4 determines the logical expression 31 specified by the function block specification statement 21 and the function block name “L1”.
01 is output to the output unit 8 (S
10), perform the process of S4.

If it is determined in S6 that the logic of the logical expression 31 is equal to the logic of the function block specified by the function block designation statement 21, the function block replacement unit 4 sets the internal data structure file 3 Is searched for a part corresponding to the logical expression 31 specified by the function block designation statement 21 from the internal data structure stored in the function block designation statement 21, and the found part is identified by the function block name “L101” designated by the function block designation statement 21. Replace with a function block (S7, S8). Here, the part corresponding to the logical expression 31 is searched for based on the signal names X and A included in the logical expression 31 and the signal names X and A included in the internal data structure.

After that, the function block replacing unit 4 designates replacement prohibition for the function block replaced in S8 in the internal data structure (S9), and performs the process of S4 again. Here, the replacement prohibition designation for the function block replaced in S8 is performed because the function block replaced in S8 is a function block designated by a function block designation statement by the designer of the logic circuit. This is because it is necessary to keep the synthesizing unit 6 as it is even after performing the synthesizing process.

After that, the function block replacing unit 4 generates a function block specification statement 21 which is currently focused on, and a function block specification statement 22 next to the function block specification statement 22.
Since there is no unprocessed logical expression (YES in S5), attention is paid to the next function block designation statement 22 in the logical description stored in the logical description file 1 (S1).

Thereafter, since the contents of the currently focused function block specification statement 22 are not “* BLKEND” (NO in S 3), the function block replacement unit 4 determines that the currently focused function block specification statement 22 Attention is paid to one of the logical expressions existing between the next function block designation statement 23 and (S
4). In this example, function block specification statement 2
Since only the logical expression 32 exists between the logical expressions 2 and 23, the function block replacement unit 4
Attention will be paid to 2.

Thereafter, the function block replacement unit 4 determines the logic of the logical expression 32 of interest and the function block name “L302” specified by the function block designation statement 22 of interest.
It is determined whether or not the logic of the function block is equal (S6). Then, the same processing as described above is performed according to the determination result. Thereafter, the same processing as described above is repeated, and the above-described processing is performed on all the function block designation statements incorporated in the logical description stored in the logical description file 1 (S2 is YE
S), the function block replacing unit 4 notifies the logic synthesizing unit 6 (S11), and ends the processing.

FIG. 5 is a diagram showing an image of a logic circuit represented by the internal data structure stored in the internal data structure file 3 after the processing by the function block replacing section 4 is completed. As shown in FIG. 5, the inverter 10a in FIG.
1, the function block name "L1
01 "and an AND gate 10c and an inverter 10d in FIG.
Is replaced with the function block 11cd of the function block name “L302” specified by the function block specification statement 22. Also,
For the function blocks 11a and 11cd,
As shown by a dotted line in FIG. 5, replacement prohibition is designated.

When the logic synthesizing unit 6 receives the notification from the function block replacing unit 4, the logic synthesizing unit 6 replaces the portion of the internal data structure stored in the internal data structure file 3 where the replacement prohibition is not specified with the library 5. Logic synthesis using the contents is performed, and the synthesized logic circuit is output to the logic circuit file 7.

FIG. 6 is a diagram showing an example of the logic circuit output to the logic circuit file 7. In this example, the inverter 10b in FIG.
1 "function block 12b,
The inverters 10e and 10f in FIG. 5 are replaced by a buffer 12ef having a function block name "L111". However, FIG.
The function blocks 11a and 11cd in the middle remain as they are. Therefore, even if the logic synthesis is performed by the logic synthesis unit 6, the synthesized logic circuit is intended by the designer of the logic circuit.

[0039]

As described above, according to the present invention, a function block designating statement which designates an arbitrary logical expression in a logical description and designates a function block which realizes the logic represented by the specified logical expression is used. After the function block can be embedded in the description, the function block replacement unit replaces the part specified by the function block specification statement in the internal data structure with the function block specified by the function block specification statement. Since the prohibition of the replacement is specified so that the function block is not replaced by another function block, there is an effect that the logic circuit can be synthesized by the function block intended by the designer. Also, since the function block designation statement can be incorporated in the logical description, there is an effect that the logic can be easily implemented based on the logical description.

Also, according to the present invention, only when the logic of the logical expression specified by the function block designating statement and the logic of the function block are equal, the replacement is performed by the function block replacement unit. No contradiction occurs.

Further, according to the present invention, when the logic of the function block designation statement and the logic of the function block are not equal, error information including the logic equation designated by the function block designation statement and the function block is output. Therefore, the designer of the logic circuit can promptly deal with an error in the specification.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a diagram illustrating an example of a logical description stored in a logical description file 1.

FIG. 3 is a diagram showing an example of an image of a logic circuit represented by an internal data structure stored in an internal data structure file 3 by an internal data structure conversion unit 2;

FIG. 4 is a flowchart showing a processing example of a function block replacement unit 4;

FIG. 5 is a diagram illustrating an example of an image of a logic circuit represented by an internal data structure after a process performed by a function block replacement unit 4;

FIG. 6 is a diagram illustrating an example of a synthesized logic circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Logic description file 2 ... Internal data structure conversion part 3 ... Internal data structure file 4 ... Function block replacement part 5 ... Library 6 ... Logic synthesis part 7 ... Logic circuit file 8 ... Output part

Claims (3)

(57) [Claims] 1. An automatic logic circuit synthesis apparatus for synthesizing a logic circuit based on a logic description described in a hardware description language, wherein an arbitrary logic expression in the logic description is specified and the specified logical expression is specified. A function block designating statement that designates a function block that realizes the logic represented by formula (1) can be incorporated into the logical description, and a logical description incorporating the function block designating statement is input, and the input logical description is converted into internal data. An internal data structure conversion unit that converts the data into a structure; and a part corresponding to the logical expression specified by the function block specification statement in the internal data structure is replaced with a function block specified by the function block specification statement. Specify replacement prohibition for other function blocks And § function blocks replacement unit, automatic synthesizer of the logic circuit, characterized in that a logic combining unit for performing a logic synthesis to the internal data structure having undergone the replacement by the function block replacement unit. 2. A function block replacement unit comprising: a library in which logic of a function block is registered; wherein the function block replacement unit includes a logic of a logic expression designated by the function block designation statement and a function block designated by the function block designation statement. 2. The function block according to claim 1, wherein whether or not the logic is equal is determined based on the logic of the function block registered in the library, and the function block is replaced only when it is determined that the logic is equal. Automatic synthesis device for logic circuits. 3. The function block replacement unit, when determining that the logic of the logical expression designated by the function block designation statement is not equal to the logic of the function block designated by the function block designation statement, 3. The automatic logic circuit synthesis apparatus according to claim 2, wherein error information including a logical expression specified by the function block specification statement and information indicating the function block specified by the function block specification statement is output.