JP2797777B2 - Language processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention is utilized in the language processing MakotoSo location, in particular, relates to the assembler, based on the described branch destination in the operand of a branch instruction, an assembler to produce an object corresponding to a branch instruction And a branch instruction processing method.

[0002]

2. Description of the Related Art In a conventional assembler, a branch instruction described in a source program file generates an object by designating an address of a branch destination in its operand.

In practice, the branch instructions 501 and 5 in FIG.
As shown at 02, an expression using a symbol such as a constant or a label as a branch destination address is described. here,
The branch instruction 501 indicates a branch to the address 10, and the branch instruction 502 indicates a branch to the label 1 address.
As a result, the assembler embeds the branch destination address in the object as it is for an absolute branch, and calculates the difference between the current address and the branch destination address for a relative branch to generate an object with the relative distance embedded therein.

However, among the branch instructions described in the source program file, there are many cases where the branch destination is only a few lines away from the branch instruction itself.

[0005] For example, "If the content of the A register is 0,
If shows a source program describing the "what you want to do a certain number instruction in FIG. A comparison instruction 601 compares the contents of the A register with actual data 0, and if a zero flag is 0 in a branch instruction 602, branch to the label "?? 1". Next, "a certain number of instructions" is described in the instruction group 603, and immediately after that, the definition "604" of the label "?? 1" is performed. As described above, although it is clear that the branch destination described by the branch instruction 602 is immediately after the instruction group 603, one label must be defined and the branch instruction to the label must be described.

If it is desired to describe a source program without defining the label "?? 1" 604 and a mark indicating the current address exists as an assembler function, the following is performed. If the mark indicating the current address is “$”, the start address of the branch instruction 605 and “next” of the instruction group 606 that is the branch destination, as in the branch destination description “$ + 20” of the operand of the branch instruction 605, will be described. Of the instruction "607"
The branch destination address must be described as the sum of the current address “$” and the difference “20”. At this time, the difference between the start address of the branch instruction 605 and the branch destination address is determined by the object of the branch instruction 605 itself and the instruction group 606.
(20 bytes including the object of the BNZ instruction)
Alternatively, the method is limited to the two methods of performing assembling once to check the size of the object and then describing a correct difference to complete the source program.

[0007]

SUMMARY OF THE INVENTION The aforementioned conventional language processor
The operand describes methods and processes of a branch instruction in assembler in MakotoSo location, particularly with respect to the case where the branch destination is not away only the branch instruction itself and a few lines, the following problems may occur.

[0008] First, it is a point that causes a restriction on the number of symbols.

Recently, software functions have become more sophisticated,
As the program scale is expanding, the usage of symbols tends to increase accordingly. However, the number of symbols that can be processed by the assembler is limited. In such an environment, even when writing a branch instruction whose branch destination is only a few lines away, a label that is only used locally is defined as a branch destination address, and it can not be programmed unless referenced by the branch instruction . That is, one label must be used for one branch instruction.

Second, the following two problems arise when trying to describe the operand of a branch instruction without using symbols in order to avoid the first problem.

One is that the reliability of the program is reduced by calculating the branch destination address manually. When describing a branch instruction without using a symbol, an absolute address or a relative distance must be calculated. In this method, a human adds the instruction length up to the branch destination, and if there is a calculation error, it immediately leads to a program error. Further, the error of this program cannot be found at the time of assembling, and is found only when the generated object is executed, which causes a delay in finding a failure.

Another is that it takes a lot of time to create a program. This is due to the need to calculate the address by the above-mentioned manual calculation, or to assemble once to have the assembler calculate the branch destination address, and then rewrite the value into a program. In particular, when a branch instruction for which the assembler automatically optimizes exists in a group of instructions between the branch source and the branch destination, it is necessary to repeatedly check the branch destination address every time assembling. This is because the object size of the branch instruction generated by the optimization depends on the assembler. Therefore, the branch destination address cannot be determined by a single manual calculation, and a slight modification of the source program requires reassembly and confirmation of the branch destination address each time, leading to an increase in the creation time.

An object of the present invention is not to describe the label or constant of the branch destination in the operand of the branch instruction whose branch destination is only a few lines away from the branch instruction itself, but to set the relative source line number to the branch destination. Language having an assembler branch instruction processing method that reduces the use of unnecessary symbols by generating an it is to provide a treatment MakotoSo location.

[0014]

SUMMARY OF THE INVENTION The present invention provides a language processing apparatus having a luer assembler processing unit to generate a corresponding object type the source program machine or pseudo-instruction is described, wherein the assembler processing unit Means for analyzing an operand describing a relative source line number from a branch source as a branch destination of a branch instruction, and registering and referring to line number information including a head address and a source line number of each instruction when an object is generated Means for searching for a head address of a corresponding source line that is a branch destination from the source line number and the line number information,
Means for generating an object corresponding to the branch instruction based on the searched start address.

[0015]

When the object is generated, the start address of each instruction and the source line number are registered as line number information, and when the branch instruction describing the relative source line number is recognized by the operand analyzing means, In the means for searching for a head address, a branch destination address is searched from the registered line number information to generate an object.

Accordingly, the use of unnecessary symbols is reduced,
In addition, it is possible to improve the reliability of the program and to reduce the program creation time.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention.

In this embodiment, a source program in which machine instructions and pseudo-instructions are described is stored in a source program file 10.
You output to an object file 103 to generate an object input from one correspondence, in the language processing apparatus having an assembler processing unit 102 including an input section 104, the segment processing unit 107 and output unit 110, and features of the present invention However, the assembler processing unit 102 includes a lexical analysis unit 105 including a relative source line description analysis unit 111 as means for analyzing an operand describing a relative source line number from a branch source as a branch destination of a branch instruction, A line number information registration / reference processing unit 109 as means for registering and referencing line number information including a head address of each instruction and a source line number when generated.
A corresponding source line head address search unit 1 as means for searching for a head address of a corresponding source line as a branch destination from the source line number and the line number information
08, and a machine instruction object generation unit 106 as means for generating an object corresponding to the branch instruction based on the searched start address.

[0020] Next, a compendium of assembler processing procedure according to the present embodiment. The processing procedure is roughly divided into two passes.

In the first pass, the source program file 101 is input by the input unit 104, and the input lexical analysis is performed by the lexical analysis unit 105. Here, after determining which machine language instruction is described and what is its operand, the machine language instruction object generation unit 106 adds the size of the object corresponding to the machine language instruction to the current address. At the same time, information of the source line number and the start address in which the machine language instruction is described is registered in the line number information registration / reference processing unit 109. When the lexical analysis unit 105 recognizes the segment definition indicating the start of the unit of the program, the segment processing unit 107 performs segment processing such as clearing of the address, and simultaneously, converts the line number information with the source line number to 0 into the line number. The information is registered in the information registration / reference processing unit 109. Repeat until there are no more words to enter. If there are no more words to be input, the line number information with the source line number set to 0 is registered in the line number information registration / reference processing unit 109.

In the second pass, the source program file 101 is input again by the input unit 104, and the input lexical analysis is performed by the lexical analysis unit 105. The processing up to this point is the same as that of the first pass. Next, after determining which machine language instruction is described and what the operand is, the machine language instruction object generation unit 106 generates an object corresponding to the machine language instruction and, at the same time, generates the line number information registered for the first time. Among them, the current position of information corresponding to the current machine language instruction is held. Repeat until there are no more words to enter. During this time, the lexical analyzer 105
When the relative source line description analysis unit 111 recognizes the relative source line description as the operand of the branch instruction, the corresponding source line head address search unit 108
Then, based on the current position of the line number information, the corresponding source line, that is, the start address of the branch destination is searched from the source line number and the start address already registered in the first pass. Thereafter, as in the case of a normal machine language, the machine language instruction object generation unit 106 generates an object based on the searched branch destination head address. After there are no more words to be input, the generated object is output from the output unit 110 to the object file 103.

The line number information 201 registered or referred to by the line number information registration / reference processing unit 109 is, as shown in FIG.
Contains three. Last data 2 of line number information 201
04 is data to be registered at the end of the first pass, and the source line number is always 0. The current position 205 indicates the current position of the line number information 201 updated along with the object generation in the second pass.

The corresponding source line head address search unit 10
8 will be described with reference to FIG.

First, the branch source relative source line number analyzed by the relative source line description analysis unit 111 which is a part of the lexical analysis unit 105 is input (step S301), and the line number indicated by the current position 205 shown in FIG. The sum of the information source line number and the branch destination relative source line number is held as the branch destination source line number (step 302). Note that the current position 205 when the processing of the source line head address search unit 108 is being performed indicates the line number information corresponding to the branch instruction line.

Next, +1 or -1 is set in the increment / decrement counter depending on whether the relative source line number is in the plus direction or the minus direction (step 30).
3, 304, 305), and the current position is held as the branch destination line number information position (step 306). Here, it is checked whether or not the relative source line number is 0 (step 307). If the relative source line number is 0, the branch destination address at which the head address of the line number information indicated by the branch destination line number information position held in step 306 is found (Step 311), and the search ends.

If the relative source line number is not 0, then the branch destination line number information position is advanced by an increment / decrement counter (step 308), and the source line number of the line number information indicated by the branch destination line number information position is 0. It is determined whether or not the source line number of the line number information indicated by the branch destination line number information position is equal to the branch destination source line number held in step 302 (step 310).
If they are equal, the head address of the line number information indicated by the branch destination line number information position becomes the obtained branch destination address (step 311), and the search ends.

If the source line number indicated by the branch destination line number information and the branch destination line number are different at step 310, the process returns to step 308, where the position of the branch destination line number information is incremented or decremented. Repeat the process. Step 3
If the source line number of the line number information indicated by the branch destination line number information position is 0 at 09, the relative source line number of the operand of the branch instruction described in the source program exceeds the segment which is a unit of the program. Since an instruction that causes an object to be specified or specified at the specified relative source line number is not described, an error is generated because the description of the branch instruction is invalid (step 312), and the search is performed. To end. The reason why the source line number specified as the branch destination exceeds the segment, that is, if it belongs to another segment, is invalid because the address management is performed for each segment, especially the relocatable where the arrangement position is not determined This is because if the segment is a simple segment, the branch destination becomes indefinite.

FIG. 4 shows a description example of a specific source program.
Shown in For example, if the description of the relative source line number is defined to add the suffix L to the “relative source line number”, “4” as in the operand of the branch instruction 401
If "L" is described, an object is generated as a branch instruction to the next instruction 402 four lines ahead.

With the above processing, the branch destination address is automatically obtained by registering or referencing the line number information of each line with the branch destination relative source line number described in the operand of the branch instruction, and a correct object is generated. It is possible to do.

Since the line number information composed of the source line number and the head address used in the present embodiment is also effective as debug information of a program, by performing data sharing, it becomes unnecessary for the assembler body. This can be realized without applying a load.

[0032]

As described above, according to the present invention, the source program in which the relative source line number from the branch source is described as the branch destination is input to the operand of the branch instruction, and the source line number of each line and the head address information are used. By registering or referencing the line number information, the assembler automatically searches the branch destination address and generates the correct object, so the number of symbols used can be described by writing a branch instruction without unnecessary label definition. In addition, since the branch destination address is calculated without manual operation, the reliability of the program itself can be improved.

Compared with the case where a label is defined for a branch destination address, the label must retrieve all registered symbols to fetch the address, whereas the label of the line number information in the segment according to the processing method of the present invention. Since the search is completed, the processing time of the assembler itself can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of the line number information.

FIG. 3 is a flowchart showing a processing procedure of a corresponding source line head address search processing unit.

FIG. 4 is an explanatory diagram showing a specific example of branch instruction description.

FIG. 5 is an explanatory diagram showing an example of a conventional branch instruction description.

FIG. 6 is an explanatory diagram showing an example of a conventional branch instruction description.

[Explanation of symbols]

101 Source program file 102 Assembler processing unit 103 Object file 104 Input unit 105 Lexical analysis unit 106 Machine language instruction object generation unit 107 Segment processing unit 108 Relevant source line head address search unit 109 Line number information registration / reference unit 110 Output unit 111 Relative Source line description analysis unit 201 Line number information 202 Source line number 203 Start address 204 Final data 205 Current position 301 to 312 Step 401, 402, 501, 502, 602, 605
Branch instruction 601 Comparison instruction 603,606 Instruction group 604 Label definition 607 "Next instruction"

Claims (1)

(57) [Claims] 1. A language processing apparatus having a machine or pseudo-instruction enters a source program written corresponding luer <br/> assembler processing unit to generate an object, the assembler processing unit, the branch instruction Means for analyzing an operand describing a relative source line number from a branch source as a branch destination; means for registering and referring to line number information including a head address of each instruction and a source line number when an object is generated; Means for searching the source line number and the line number information for a head address of a corresponding source line which is a branch destination; and means for generating an object corresponding to the branch instruction based on the searched head address. A language processing device characterized by the following.