JP2800464B2 - Annealing furnace for compound semiconductor substrates - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a Ani compound semiconductor substrate
And more particularly, to a structure for supporting a compound semiconductor substrate to be processed.

[0002]

2. Description of the Related Art Conventionally, GaAs (gallium arsenide) has been used.
When performing <br/> annealing treatment is to compound semiconductor substrate such as a substrate, and configured heat treatment furnace is used to indicate the general structure is a partial cross-sectional view of FIG. That is, reference numeral 1 in FIG. 2 denotes a furnace core tube made of quartz glass constituting a heat treatment furnace, 2 denotes a halogen lamp as a heating source disposed around the outer periphery of the furnace core tube 1, and 3 denotes an inside of the furnace core tube 1. The substrate support 4 provided at a predetermined position is a support substrate made of Si (silicon) or quartz glass placed on the substrate support 3, and a compound semiconductor to be annealed on the support substrate 4. A GaAs substrate 5 as a substrate is mounted.

[0003]

In the conventional heat treatment furnace, the supporting substrate 4 and the GaAs
For example, the substrate 5 is not always in close contact with the substrate 5 and is not in surface contact, or the heating state of the upper and lower surfaces of the GaAs substrate 5 is different from each other.
As a result of the non-uniform temperature distribution in the surface of the GaAs substrate 5 to be annealed, the electrical characteristics such as the sheet resistance are deteriorated. Here, the difference in the heating state between the upper and lower surfaces of the GaAs substrate 5 occurs because the GaAs substrate 5
While the upper surface of the s-substrate 5 directly faces the halogen lamp 2, a material having good thermal conductivity is not necessarily provided between the lower surface and the halogen lamp 2 located below the furnace tube 1. This is because the supporting substrate 4 made of Si or quartz glass is not provided.

The present invention has been made in view of such inconvenience, and the electric characteristics of the compound semiconductor substrate are reduced by minimizing the heating of the compound semiconductor substrate from the lower side and heating the compound semiconductor substrate only from the upper side. It is an object of the present invention to provide a heat treatment furnace capable of improving the temperature.

[0005]

According to the present invention, there is provided a furnace core tube, a heating source disposed at least above the furnace core tube, and a substrate provided in the furnace core tube. A heat treatment for mounting a compound semiconductor substrate to be annealed at a temperature of 800 to 1200 ° C. on the support substrate; and a support substrate mounted on the substrate support. A furnace, wherein the supporting substrate is entirely made of PB having a higher thermal conductivity than silicon or quartz glass.
It is characterized by being integrally formed by N (pyrrolytic boron nitride) .

According to the above structure, the heat arriving from the lower side of the support substrate is converted into a PBN (pyrolytic) having a large thermal conductivity.
Boron nitride) on the supporting substrate thus will be heated蓄<br/> consisting until the placed on compound semiconductor substrate to the support substrate will be heat is not transmitted. Therefore, the heating of the compound semiconductor substrate from below is the same as being interrupted by the supporting substrate ,
Heating for reduction compound semiconductor substrate will be performed only from the top surface.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a partial sectional view showing a schematic structure of a heat treatment furnace according to this embodiment. Since the configuration of this heat treatment furnace is basically the same as that of the conventional example, parts and portions in FIG. 1 that are the same as those in FIG. 2 are denoted by the same reference numerals.

The heat treatment furnace according to the present embodiment is used when performing an annealing treatment on a compound semiconductor substrate such as a GaAs substrate 5 and the like.
A halogen lamp 2 disposed at the outer periphery of the furnace core tube 1 and serving as a heating source at least above the furnace core tube 1, and a substrate support provided at a predetermined position in the furnace core tube 1. And a support substrate 10 having a predetermined thickness on which a GaAs substrate 5 to be annealed after being placed on the substrate support 3 is provided. Then, this support substrate 10
It is integrally formed of a P BN (pyrolytic Boron nitride) that have a higher thermal conductivity than the entire silicon or quartz glass. Here, the thermal conductivity of GaAs is 0.54 w / cm · K
The thermal conductivity of Si is about 1.7 w / cm · K, whereas that of PBN is about 12.6 w / cm · K.
That of quartz glass is about 0.02 w / cm · K.

The inventors of the present invention performed a short-time annealing test using the heat treatment furnace having the above-described configuration. As a result, the halogen lamp 2 positioned below the furnace tube 1 was obtained.
It has been confirmed that heat from the substrate is stored in the supporting substrate 10 made of PBN, and is not transmitted to the GaAs substrate 5 through the supporting substrate 10. Therefore, the GaAs substrate 5 is heated from below by the support substrate 10.
The GaAs.
The heating of the substrate 5 is the same as that performed only from above, and the heating of the GaAs substrate 5 is performed only from the upper surface. That is, at this time
In this case, at least the halogen lamp 2 as a heating source is
This is the same as placing it only above the furnace core tube 1.
ing.

The GaAs used in this test was
The substrate 5 has an implantation energy of 100 KeV and 5 × 10 ¹² /
The ion implantation of Si cation of cm ² was performed at room temperature, and the annealing conditions were set to 950 ° C. and 5 seconds. In this test, the implantation amount of Si cation was changed in the range of 1 × 10 ^{11 to} 5 × 10 ¹⁴ / cm ² , and the annealing temperature was changed in the range of 800 to 1200 ° C. However, there were no significant differences in efficacy associated with these changes. The GaAs substrate 5
Ion species to be implanted into Si, S, Se, Sn, Te
It was also tried to change to an n-type impurity such as, or a p-type impurity such as Be, Mg, Zn, but no inconvenience occurred.

Further, in this embodiment, the compound semiconductor substrate is a GaAs substrate. However, the present invention is not limited to this. For example, an InP substrate or an AlGaAs substrate may be used.
It goes without saying that the present invention can be applied to an s substrate, an InGaAs substrate, or the like.

[0013]

As described above, according to the heat treatment furnace of the present invention, since the heat conductivity of the supporting substrate is large, the heat arriving from the lower side of the supporting substrate is stored in the supporting substrate. That is, it is not transmitted to the compound semiconductor substrate. Therefore, the heating of the compound semiconductor substrate is performed uniformly only from the upper surface. As a result, an effect is obtained in that electrical characteristics such as sheet resistance of the compound semiconductor substrate can be improved.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view showing a schematic structure of a heat treatment furnace according to an embodiment.

FIG. 2 is a partial sectional view showing a schematic structure of a heat treatment furnace according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Furnace core tube 3 Substrate support 5 GaAs substrate (compound semiconductor substrate) 10 Support substrate

Claims (1)

(57) [Claims] 1. A furnace core tube (1), a heating source (2) arranged at least above the furnace core tube (1), and a substrate support (3) provided in the furnace core tube (1). And a support substrate (10) placed on the substrate support (3). The support substrate (10) has a temperature of 800 to 1200 ° C.
An annealing furnace for a compound semiconductor substrate on which a compound semiconductor substrate (5) to be annealed at a temperature of 4 ° is placed, wherein the supporting substrate (10) has a heat that is larger than that of silicon or quartz glass as a whole. PBN with conductivity
Compound annealing furnace for semiconductor substrate, characterized by being formed integrally by Ikku, boron nitride).