JP2801646B2 - Heterojunction bipolar transistor - Google Patents

Description

The present invention relates to a heterojunction bipolar transistor, and more particularly to a base structure thereof.

(Prior art) A heterojunction bipolar transistor in which the emitter region is made of a semiconductor material having a larger bandgap than the base region has higher frequency characteristics and switching characteristics than a homojunction transistor, and is a microwave transistor or a high-frequency transistor. Research has been widely conducted as a frequency transistor.

In particular, a heterojunction bipolar transistor using gallium arsenide (GaAs) or gallium aluminum arsenide (GaAlAs) as a semiconductor material is promising as an ultra-high-speed device because the mobility of carriers is larger than that of silicon (Si). ing.

However, GaAs and GaAlAs are more expensive than Si, and
Due to their brittleness, heterojunction bipolar transistors using these materials are less suitable for mass production than those using Si.

Under such circumstances, silicon germanium (Si _1-X Ge _X ) is used as a base layer on silicon and silicon carbide (Si _1-X C
There has been recently reported a trial production example of a silicon heterojunction bipolar transistor using _X ) as an emitter layer.

However, if the lattice constant of Si and the Si compound grown so as to form a heterojunction in this upper layer differ by a certain degree or more, there is a problem that unfavorable lattice mismatch, transition, defects, etc. tend to occur when used as an ultra-high-speed device. is there.

Therefore, a technique has been devised in which the bonding of each growing atom is provided with a strain, the lattice constant is adjusted, and the semiconductor layer is grown so as not to cause a transition, a defect or the like on the heterojunction interface.

However, the semiconductor layer grown in this way has a limit on the thickness of a layer that can be grown without causing dislocations and defects, and as the difference in lattice constant increases,
It has been pointed out that the thickness of a layer that can be grown by giving a strain to the bond of each growing atom becomes small.

By the way, since the base resistance is generally inversely proportional to the thickness of the base layer, when a layer formed by heterojunction growth is used as the base layer as described above, the base resistance becomes large without a certain thickness of the transistor, and the transistor becomes high. Is not preferable for high-speed operation.

For example, n / n of Si / Si _1-X Ge _X / Si as shown in FIG.
Consider a type transistor.

As shown in FIG. 8, this heterojunction bipolar transistor has an n ⁺ -type Si layer 102 as a collector contact layer, an n ^-- type Si layer 103 as a collector layer, P-type Si _0.8 Ge _0.2 layer 10 as layer
4.The n ^- type Si layer 106 as an emitter layer and the n ⁺ type Si layer 107 as an emitter cap layer are sequentially grown by epitaxial growth.Electrode extraction is performed by mesa etching, and a collector electrode 123 is formed for each layer. Base electrode 1
22, an emitter electrode 121 is formed. Here, 111 is a silicon oxide film.

In other words, in the case of a heterojunction bipolar transistor in which the emitter region is made of a mixed crystal of Si _1-X Ge _X whose band gap is smaller than that of Si in the base region, the base layer is formed thicker as the proportion occupied by Ge increases. Is difficult and
It is not preferable as a base layer because of high resistance.

On the other hand, the function as a hetero-junction bipolar transistor is suitable as an ultra-high-speed device because the larger the difference in band gap between different kinds of semiconductor materials forming the hetero-junction, the higher the emitter injection efficiency can be. This means that as for the above-mentioned heterojunction bipolar transistor, the larger the proportion of Ge, the more preferable the base layer.

As described above, there is a problem that the high speed of the heterojunction bipolar transistor cannot be sufficiently exhibited due to the two conflicting restrictions.

However, as shown in FIG. 9, an n ⁺ -type GaAs layer 202 as a collector contact layer, an n ⁻ -type GaAs layer 203 as a collector layer,
P ^- type Al _X Ga _1-X As layer 204 ₁ and p ⁺ type Al _X G as base layers
a _1-X As layer 204 ₂ , n ^- type Al _X Ga _1-X As layer 20 as emitter layer
5.An n ⁺ type GaAs layer 206 as an emitter cap layer is sequentially epitaxially grown.Electrode extraction is performed by mesa etching, and a collector electrode 209, a base electrode 208, and an emitter electrode 207 are formed for each layer. One has been proposed (JP-A-63-47974).

This is because a region in which the impurity concentration changes stepwise is provided in the base region so that the impurity concentration is increased on the emitter side, and the aluminum composition ratio _X in the base regions 204 ₁ and 204 ₂ is changed from 0 to 0.1. By gradually changing the resistance from the bottom to the top, the negative differential collector resistance phenomenon is reduced without increasing the base resistance.

However, in this case, the n-type
P ^- type Al _X Ga _1-X As layer 204 ₁ as base layer on GaAs layer 203
GaAs and Al _X Ga _{1 -X} As have almost the same lattice constant, and even if the GaAs is grown thick, _X is increased as in the case of the Si _{1 -X} Ge _X / Si interface to increase the Ge Even if the composition ratio is increased, dislocation and defects do not increase, and the base resistance can be reduced.

On the other hand, in the case of a heterojunction such as Si _1-X Ge _X / Si having a lattice constant difference of several percent, the two conflicting constraints described above become a serious problem. This is because, in addition to the Si _1-X Ge _X / Si interface described above, when a junction between semiconductor materials such as a GaAs / In _X Ga _1-X As interface having a difference of several% in lattice constant is used. The same applies to a heterojunction bipolar transistor using another material, which is a serious problem.

(Problems to be Solved by the Invention) As described above, when a heterojunction having a lattice constant difference of several percent is used, conflicting restrictions on the composition ratio and the thickness make use of the advantage of the heterojunction, and It has been difficult to obtain a heterojunction bipolar transistor having a small base resistance.

The present invention has been made in view of the above-mentioned circumstances, and is intended to produce a heterojunction bipolar transistor using a compound semiconductor material having a lattice constant different from that of a semiconductor material constituting an emitter region for a base region. It is an object of the present invention to provide a base region structure capable of obtaining a base layer thickness which is considered to be optimal in device design without being restricted by the above.

[Configuration of the invention]

(Means for Solving the Problems) In order to achieve the above object, an invention according to claim 1 includes a collector layer having a first conductivity type and a second conductivity type formed in contact with the collector layer. A first base layer, a second base layer having a second conductivity type formed in contact with the first base layer, and a first conductive layer formed in contact with the second base layer A heterojunction bipolar transistor having an emitter layer having a type, wherein the first base layer forms a hetero bond having a large lattice constant difference with the emitter layer, and the second base layer is formed with the emitter layer. It is characterized by being formed of the same material and being doped at a high concentration such that the effect of bandgap narrowing is remarkably observed.

Further, an invention according to claim 2, wherein, in the invention according to the first aspect, wherein the first base layer is composed of Si _1-X Ge _X layer, the emitter layer and the collector layer is composed of a Si layer It is characterized by having been done.

According to a third aspect of the present invention, in the first aspect, the first base layer is composed of an In _X Ga _{1 -X} As layer, and the emitter layer and the collector layer are GaAs layers. It is characterized by comprising.

(Operation) According to the above configuration, the same material as the emitter region constituent material is used on the emitter region side of the base layer, and the high concentration base layer is doped with impurities at such a high concentration that the effect of band gap narrowing is remarkably observed. Is provided, the base resistance can be reduced even if the original base region is thin, and therefore, it is possible to change the composition ratio of the compound semiconductor material to constitute and make the difference in band gap large. Become.

As described above, by increasing the difference in band gap, the band gap changes greatly in a narrow region that acts to suppress reverse injection of carriers from the base region to the emitter region. Therefore, the high-speed operation can be sufficiently brought out, and the performance as an ultra-high-speed element can be improved.

On the other hand, when this high concentration base layer is not provided, it is desirable to use a semiconductor material constituting the base region having a large difference in band gap from the semiconductor material constituting the emitter region. Since the limit of the thickness of the layer that can be formed without being generated at the interface is small, the resistance of the entire base increases, and high-speed operation cannot be exhibited. For this reason, there is a restriction on the composition ratio of the compound semiconductor material that is desirable for forming the original base region.

As described above, according to the configuration of the present invention, the thickness of the base region that is optimal for the heterojunction bipolar transistor design can be reduced without being restricted by the composition ratio of the compound semiconductor material that is desirable for forming the original base region. As a result, an ultrahigh-speed device having a low base resistance can be formed.

Hereinafter, a heterojunction bipolar transistor according to an embodiment of the present invention will be described in detail with reference to the drawings.

As shown in FIG. 1, this heterojunction bipolar transistor is a Si / Si _1-X Ge _X / Si-based npn transistor, and has a base layer made of a p ^- type Si _0.7 Ge _0.3 first base layer. 4 and a high-concentration second base layer 5 made of p ⁺ -type Si.

That is, in this heterojunction bipolar transistor, an n ⁺ -type Si layer 2 as a collector contact layer, an n ^-- type Si layer 3 as a collector layer, and a first base layer as a first base layer are formed on the surface of a p ⁻ -type Si substrate 1. p ⁻ -type Si _0.7 Ge _0.3 layer 4, p ⁺ -type Si layer 5 as a second base layer, and n ⁻ -type as an emitter layer
An Si layer 6 and an n ⁺ -type Si layer 7 as an emitter cap layer are successively epitaxially grown. Electrodes are taken out by mesa etching, and a collector electrode 23, a base electrode 22, and an emitter electrode 21 are formed for each layer. Have been. Here, reference numeral 20 denotes a silicon oxide film.

Next, a manufacturing process of the hetero junction bipolar transistor will be described.

First, as shown in FIG. 2A, an impurity concentration of 1 × 10 ²⁰ is formed on the surface of a p ⁻ -type Si substrate as a collector contact layer.
Antimony Sb-doped n ⁺ -type Si layer 2 having a thickness of 1000 cm ⁻³ and a collector layer having an impurity concentration of 1 × 10 ¹⁷ cm ^{−3 and a} thickness of 5000 ⁻
The type Si layer 3 is epitaxially grown.

Subsequently, as shown in FIG. 2B, a boron B-doped p ^- type Si _0.7 Ge _0.3 layer 4 having an impurity concentration of 1 × 10 ¹⁸ cm ^{−3 and a} film thickness of 500 ° was formed as a first base layer. As a base layer, a boron B-doped p ⁺ -type Si layer 5 having an impurity concentration of 1 × 10 ¹⁹ cm ^{−3 and a} film thickness of 500 ° is epitaxially grown.

Then, as shown in FIG. 2 (c), an arsenic As-doped n ^- type Si layer 6 having an impurity concentration of 1 × 10 ¹⁷ cm ^{−3 and a} film thickness of 1500 ° is further provided as an emitter layer, and an impurity concentration of 1 × 10 7 is provided as an emitter cap layer. An n ⁺ -type Si layer 7 having a thickness of ²⁰ cm ^{−3 and a} thickness of 500 ° is sequentially epitaxially grown.

Next, a base electrode formation region is formed on the silicon substrate on which each epitaxial growth layer is formed in the second manner.
After etching until the p ⁺ -type Si layer 5 as a base layer is reached, and the collector electrode formation region is also etched until the n ⁺ -type Si layer 2 as a collector contact layer, the entire surface of the substrate is oxidized by CVD. A silicon film 20 is deposited, and the silicon oxide film in this region is selectively removed by etching for contact with the emitter, base and collector (FIG. 2 (d)).

Finally, an emitter electrode made of aluminum
21, a base electrode 22, and a collector electrode 23 are formed to complete a heterojunction bipolar transistor as shown in FIG.

FIG. 3 shows a band structure diagram of the heterojunction bipolar transistor thus formed. This figure also shows that the band gap between the base and the emitter is large.

For comparison, the conventional heterojunction bipolar transistor shown in FIG. 8, that is, the base region is made of boron B-doped p ^- type Si _0.8 Ge having an impurity concentration of 1 × 10 ¹⁸ cm ^{−3 and a} thickness of 1000 °.
Changed to _0.2 layers, for the other part showing a band structure diagram but was exactly as forming the heterojunction bipolar transistor of the present invention embodiment shown in FIG. 1 in Figure 4. These comparisons also show that the band gap between the base and the emitter of the heterojunction bipolar transistor according to the embodiment of the present invention is significantly large.

FIG. 5 shows the results of numerical calculation of the relationship between the cutoff frequency and the collector current between the heterojunction bipolar transistor of the above embodiment and the heterojunction bipolar transistor of the conventional example. Curve a shows the characteristics of the heterojunction bipolar transistor of the present invention, and curve b shows the characteristics of the conventional heterojunction bipolar transistor.

As can be seen from this figure, when the emitter-collector voltage is 1.5 V, the base transit time of the carrier is 9.9 in the heterojunction bipolar transistor according to the embodiment of the present invention.
In contrast to 08 psec, the conventional heterojunction bipolar transistor described above has 14.3 psec,
5.22psec is also shorter. The resistance of the entire base region is 575 ohms in the heterojunction bipolar transistor according to the embodiment of the present invention, whereas it is 1205 ohms in the above-described conventional heterojunction bipolar transistor. It can be seen that it has been reduced.

As described above, the heterojunction bipolar transistor according to the embodiment of the present invention exhibits sufficiently high speed and high performance.

Next, as a second embodiment of the present invention, an example of a heterojunction bipolar transistor using a compound semiconductor will be described.

The heterojunction bipolar transistor, as shown in FIG. 6, a _{GaAs / Al X Ga 1-X} As system npn type transistor, a base layer p ^- first base layer made of type In _0.1 Ga _0.9 As 14 and a high-concentration second base layer 15 made of p ⁺ -type GaAs.

That is, this heterojunction bipolar transistor is an n ⁺ -type transistor having a thickness of 3000 Å and an impurity concentration of 5 × 10 ¹⁸ cm ^-3 as a collector contact layer on the surface of a semi-insulating GaAs substrate 11.
GaAs layer 12, 5000 膜厚 thick as collector layer, impurity concentration 5
× 10 ¹⁶ cm ^-3 n ^- type GaAs layer 13, film thickness as first base layer
300Å, p ^- type In _0.1 Ga _0.9 As layer 1 with impurity concentration 1 × 10 ¹⁹ cm ^-3
4 and a second base layer having a thickness of 700 Å and an impurity concentration of 5
× 10 ¹⁸ cm ^-3 p ⁺ type GaAs layer 15, thickness 1500 as emitter layer
N, n ^- type Al _0.3 Ga _0.7 As layer 6 with an impurity concentration of 5 × 10 ¹⁷ cm ^-3 ,
Emitter cap layer has a thickness of 500mm and an impurity concentration of 5x1
An n ⁺ -type GaAs layer 17 of ¹⁸ cm ⁻³ is epitaxially grown in sequence. Electrodes are taken out by mesa etching, and a collector electrode 23 and a base electrode 2
2. An emitter electrode 21 is formed. Here, reference numeral 20 denotes a silicon oxide film.

 The manufacturing is the same as in the first embodiment.

According to this heterojunction bipolar transistor, In
_Since the mobility of the carrier in _X Ga _1-X As is larger than the mobility of the carrier in GaAs, the base provided with the In _X Ga _1-X As layer has a higher electrical conductivity than that formed of only GaAs. The resistance is small and suitable for high-speed operation. The mobility of the carrier in In _X Ga _{1 -X} As is the same as that of Si _X Ge used in the first embodiment.
_{Since the} mobility is larger than the mobility of carriers in _1-X , the heterojunction bipolar transistor is more suitable for high-speed operation.

In the above-described embodiment, the so-called emitter-top structure heterojunction bipolar transistor in which the emitter is in the uppermost layer has been described. However, as shown in FIG. 7, the so-called collector-top structure heterojunction bipolar transistor in which the collector layer 33 is in the uppermost layer. It goes without saying that the present invention is also applicable to a bipolar transistor. In this case, the emitter layer 36
A base layer that forms a heterojunction with this must be grown on the upper layer.First, a high-concentration base layer 35 is grown to a desired thickness, and then a thin main base layer 34 is formed to form a heterojunction. Good. In this way, a low-resistance base layer can be obtained without occurrence of lattice mismatch or lattice defect, and characteristics can be improved. 31 p ^-
-Type silicon substrate, 32 denotes a collector contact layer made of n ⁺ -type silicon layer 37 is the emitter contact layer made of n ⁺ -type silicon layer.

Further, in the above embodiment, the HBT having the double hetero structure has been described, but the present invention is also applicable to the HBT having the single hetero structure.

In the above-described embodiment, the description has been given of the Si-based heterojunction bipolar transistor and the GaAs-based heterojunction bipolar transistor. However, the present invention is not limited to these, and can be applied to an HBT including another compound semiconductor layer.

〔The invention's effect〕

As described above, according to the present invention, the same material as the emitter region constituting material is used on the emitter region side of the base layer, and impurities are doped at such a high concentration that the effect of band gap narrowing is remarkably observed. Since the high concentration base layer is provided, the base resistance is small,
It is possible to provide a heterojunction bipolar transistor having high performance as an ultra-high speed element.

[Brief description of the drawings]

FIG. 1 is a view showing a heterojunction bipolar transistor according to an embodiment of the present invention, FIGS. 2 (a) to 2 (d) are views showing a manufacturing process of the same heterojunction bipolar transistor, and FIGS. FIG. 5 is a diagram showing the cutoff frequency of the heterojunction bipolar transistor according to the embodiment of the present invention and the conventional heterojunction bipolar transistor. FIG. FIG. 7 is a diagram showing a heterojunction bipolar transistor having a collector top structure according to another embodiment of the present invention, and FIGS. 8 and 9 are diagrams showing a conventional heterojunction bipolar transistor. FIG. 3 is a diagram showing a junction bipolar transistor. 1 ... p ^- type Si substrate, 2 ... n ⁺ type Si layer (collector contact layer), 3 ... n ^- type Si layer (collector layer), 4 ... p ^- type Si layer
_1-X Ge _X (base layer), 5... P ⁺ type Si layer (term concentration base layer), 6... N ⁻ type Si layer (emitter layer), 7... N ⁺ type Si layer (emitter cap layer) ), 11 ... GaAs substrate, 12 ... (collector contact layer) n ⁺ type GaAs layer, 13 ... (collector layer) n ^- type GaAs layer, 14 ... (first base layer) p ^- type In _0.1 G
a _0.9 As layer, 15 ... (second base layer) p ⁺ type GaAs layer, 16 ...
... (emitter layer) n ^- -type Al _0.3 Ga _0.7 As layer, 17 ... (emitter cap layer) n ⁺ -type GaAs layer, 20 ... silicon oxide layer, 21
... Emitter electrode, 22 Base electrode, 23 Collector electrode, 33 Collector layer, 34 Main base layer, 35 High-concentration base layer, 36 Emitter layer, 101 p ^- type Si substrate, 102 ... (collector contact layer) n ⁺ type Si layer, 103 ...
... (collector layer) n ^- type Si layer, 104 ... (base layer) p ^- type S
i _0.8 Ge _0.2 layer, 106 ... (emitter layer) n ^- type Si layer, 107 ...
... (emitter cap layer) n ⁺ type Si layer, 201 ... GaAs substrate, 202 ... (collector contact layer) n ⁺ type GaAs layer, 203
... (collector layer) n-type GaAs layer, 204 ₁ ... (base layer)
p ^- type Al _X Ga _{1 -X} As layer, 204 ₂ …… p ⁺ type Al _X Ga _{1 -X} As layer, 205…
… (Emitter layer) n-type Al _X Ga _{1 -X} As layer, 206… (emitter cap layer) n ⁺ GaAs layer, 207… emitter electrode, 208
…… base electrode, 209 …… collector electrode.

Claims (3)

(57) [Claims] 1. A collector layer having a first conductivity type, a first base layer having a second conductivity type formed in contact with the collector layer, and a contact layer formed in contact with the first base layer A hetero-junction bipolar transistor comprising: a second base layer having a second conductivity type; and an emitter layer having a first conductivity type formed in contact with the second base layer; The base layer forms a hetero bond having a large lattice constant difference with the emitter layer, the second base layer is formed of the same material as the emitter layer, and a remarkable effect of band gap narrowing is observed. A hetero-junction bipolar transistor, characterized in that the impurity is doped at a high concentration. 2. The device according to claim 1, wherein the first base layer is formed of a Si _1-X Ge _X layer, and the emitter layer and the collector layer are formed of a Si layer. Heterojunction bipolar transistor. 3. The semiconductor device according to claim 1, wherein the first base layer is composed of an In _X Ga _{1 -X} As layer, and the emitter layer and the collector layer are composed of a GaAs layer. Heterojunction bipolar transistor.