JP2803759B2 - Active matrix structure and manufacturing method thereof - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix structure for a liquid crystal display used for a flat display and the like, and a method for manufacturing the same.

[Conventional technology]

In recent years, display devices using liquid crystals have been oriented to televisions, graphic displays, and the like, and development and practical use thereof have been actively pursued. In particular, a liquid crystal display device having an active matrix structure in which a switch is provided in each pixel has no crosstalk, has high contrast, and is being put to practical use as a favorite of a high-quality flat display. A liquid crystal display device having such an active matrix structure generally uses a thin film transistor as a pixel switch.

FIG. 2 is a diagram showing an equivalent circuit of one pixel of a conventional liquid crystal display device having an active matrix structure. In the figure, 1 is a data bus, 3 is a gate bus, 2 is a thin film transistor, 12 is a source of the thin film transistor 2,
Reference numeral 12 is connected to the data bus 1. 13 is the drain of the thin film transistor 2, 16 is the gate of the thin film transistor 2, and the gate 16 is connected to the gate bus 3. 4 is a transparent pixel electrode connected to the drain 13, 5 is a transparent common electrode provided on the opposite substrate via a liquid crystal layer, and 6 is a pixel capacitor formed by the transparent pixel electrode 4 and the transparent common electrode 5. .

In the liquid crystal display device having the active matrix structure, when the thin film transistor 2 is turned on by the gate bus 3, the potential difference of the pixel capacitor 6 is controlled by the potential of the data bus 1 and written as a signal. Next,
When the thin film transistor 2 is turned off, the potential difference of the pixel capacitance 6 is held and stored. This mechanism is similar to that of the semiconductor memory DRAM. That is, in a DRAM, a potential difference written in a capacitor is read and used as a storage element for information. On the other hand, in a liquid crystal display device, the potential difference of the pixel capacitor 6 causes the orientation of molecules of the liquid crystal itself constituting a dielectric of the pixel capacitor 6 and the orientation thereof. Retention is performed. As a result, the amount of light transmitted through the pixel capacitor 6 is controlled, and the function as a display element is achieved.

However, actually, the potential difference written in the pixel capacitor 6 is lost without being held due to various causes. For example, the amorphous Si used for the thin film transistor 2 has photoconductivity enough to be used for an optical sensor, and when the thin film transistor 2 is exposed to light, the source 12 and the drain
The leakage current between 13 greatly increases. On the other hand, since the temperature dependence of the conductivity of the liquid crystal itself is large, the insulating property is greatly deteriorated by the temperature rise, and the self-discharge of the liquid crystal capacitor 6 occurs. At the same time, the leak current of the thin film transistor 2 also increases due to the temperature rise. Due to such various leaks, the potential difference of the pixel capacitor 6 is lost, and the retention of the liquid crystal alignment becomes unstable. Therefore, it is perceived as a decrease in display contrast or a flicker or the like, resulting in deterioration of display quality.

In order to avoid this, measures as shown in FIG. 3 are generally taken. In FIG. 3, reference numeral 8 denotes an incident light blocking pattern that blocks incident light to the thin film transistor 2.
The incident light blocking pattern 8 is made of an opaque metal. When the thin film transistor 2 has an inverted staggered structure, the incident light blocking pattern 8 is provided on the liquid crystal side. When the thin film transistor 2 has a staggered structure, the incident light blocking pattern is a substrate. Side is provided via an insulating film. Reference numeral 7 denotes a signal holding capacity electrode provided to face the transparent pixel electrode 4, and the signal holding capacity electrode 7 is connected to a dedicated holding capacity bus or the preceding gate bus 3. 9 is a transparent pixel electrode 4 and a signal holding capacitor electrode 7
The dielectric of the signal holding capacitor 9 is made of a highly insulating and stable insulating film such as a silicon oxide film or a silicon nitride film.

In the liquid crystal display device having such an active matrix structure, since the incident light blocking pattern 8 is provided, a leak current due to light irradiation on the thin film transistor 2 can be significantly reduced. In other words, as described above, the photoconductivity of amorphous Si cannot be excluded from being high. Therefore, the best measure is to prevent light irradiation on the thin film transistor 2. However, unlike a case in which light can be shielded by a jacket such as an IC, a liquid crystal display device is destined to be exposed to light, and it is necessary to block light in the element. Since light irradiation to the thin film transistor 2 can be prevented, leakage current due to light irradiation to the thin film transistor 2 can be significantly reduced. Further, since the signal holding capacitor 9 is provided in parallel with the pixel capacitor 6, the amount of charge stored in the pixel capacitor 6 can be greatly increased. Even if an increase in the leak current occurs, the variation in the potential difference of the pixel electrode 6 can be kept within an allowable range. Therefore, the stability of the alignment of the liquid crystal is increased, and a decrease in contrast and the like can be avoided.

[Problems to be solved by the invention]

However, in the liquid crystal display device having such an active matrix structure, since the incident light blocking pattern 8 and the signal holding capacitor 9 are provided, the number of manufacturing steps is increased, and the manufacturing cost is increased. For example, in order to provide the incident light blocking pattern 8, various steps of metal deposition, patterning, and insulating film deposition are required. On the other hand, when the signal holding capacitor electrode 7 is connected to the gate bus 3 in the preceding stage, there is no need to provide a holding capacitor bus, so the number of manufacturing steps does not increase.
The load on the gate bus 3 increases remarkably, making it difficult to apply to a large-sized display. In addition, since the sequential scanning is assumed, a strong restriction is imposed on the disturbance method. On the other hand, when the signal holding capacitor electrode 7 is connected to the holding capacitor bus, the load on the gate bus 3 is light, and the gate bus 3 can be applied to a large-sized display. Since the number of steps increases, the manufacturing cost increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide an active matrix structure which does not cause deterioration in display quality and has a low manufacturing cost, and a manufacturing method thereof.

[Means for solving the problem]

In order to achieve this object, according to the present invention, an incident light blocking pattern that blocks at least incident light to a thin film transistor on a glass substrate, a signal holding device that is electrically separated from the incident light blocking pattern and faces a transparent pixel electrode The storage capacitor bus for connecting the storage capacitor electrode and the signal storage capacitor electrode is formed of the same layer and of the same material, and the thin film transistor and the transparent pixel electrode are formed via an insulating film.

Further, an incident light blocking pattern for blocking at least incident light to the thin film transistor on the glass substrate, a signal holding capacitor electrode electrically separated from the incident light blocking pattern and facing the transparent pixel electrode, and the signal holding capacitor electrode In a method of manufacturing an active matrix structure in which the storage capacitor bus for connecting the storage capacitor buses is formed of the same layer and the same material, and the thin film transistor and the transparent pixel electrode are formed via an insulating film. The opening of the portion and the opening of the terminal connection portion of the bus line of the thin film transistor are provided simultaneously and collectively.

[Action]

In the active matrix structure according to the present invention, since the incident light blocking pattern is provided, the leak current due to light irradiation on the thin film transistor can be significantly reduced, and the signal holding capacitor electrode is provided. Since the amount of charge stored in the pixel capacitor can be greatly increased, and the incident light blocking pattern, the signal holding capacitor electrode and the holding capacitor bus are formed of the same layer and the same material, the number of manufacturing steps increases. Minimized.

In the method of manufacturing an active matrix structure according to the present invention, the opening of the terminal connection of the storage capacitor bus and the opening of the terminal connection of the bus line of the thin film transistor are provided simultaneously and collectively. The increase is kept to a minimum.

〔Example〕

FIG. 1 is a sectional view showing an active matrix structure according to the present invention. In the figure, 10 is a glass substrate, 19 is a holding capacity bus for connecting the signal holding capacity electrode 7, and an incident light blocking pattern 8 for blocking incident light to the thin film transistor 2 on the glass substrate 10, an incident light blocking pattern 8 Holding capacity electrode 7 and holding capacity bus electrically isolated from
19 is formed of the same layer and the same material, that is, Al having a thickness of 100 nm. Reference numeral 11 denotes an insulating film provided on the incident light blocking pattern 8, the signal holding capacity electrode 7, and the holding capacity bus 19, and the insulating film 11 is made of a silicon nitride film. Here, the capacitance per unit area of the signal holding capacitor 9 is determined by the material and thickness of the insulating film 11, and the incident light blocking pattern 8 is disposed below the thin film transistor 2. As a result, the parasitic capacitance between the source 12 and the drain 13 which has a problem in driving is also determined. Therefore, the thickness of the insulating film 11 needs to be set to an appropriate value.
0 nm. Reference numeral 14 denotes amorphous Si, reference numeral 20 denotes a storage capacitor external output terminal, and a source 12, a drain 13, a data bus 1, a storage capacitor external output terminal 20, and a transparent pixel electrode 4 on the insulating film 11.
And amorphous Si14 are formed, the source 12,
Drain 13, data bus 1, holding capacitor external extraction terminal 20
Consists of Al. Reference numeral 15 denotes an insulating film provided on the source 12, the drain 13, the data bus 1, the amorphous Si 14, the transparent pixel electrode 4, and the external terminal 20 for taking out the storage capacitor.
The gate bus 3, the gate 16, and the connection film 21 are provided on the insulating film 15 and are made of a 300 nm silicon nitride film. The gate bus 3, the gate 16, and the connection film 21 are formed of the same layer. 17
Is an opening provided in the insulating film 15, 18 is an opening provided in the insulating films 15 and 11, and openings 17 and 18 are simultaneously with openings (not shown) of terminal connection portions of the data bus 1 and the gate bus 3. The holding capacitance bus 19 and the holding capacitance external extraction terminal 20 are connected to each other through the openings 17 and 18 by the connection film 21.

In this active matrix structure, since the incident light blocking pattern 8 is provided, the thin film transistor 2
Since the leakage current due to light irradiation to the substrate can be greatly reduced, and the signal holding capacitor electrode 7 is provided,
Since the amount of charges stored in the pixel capacitor 6 can be greatly increased, the display quality does not deteriorate. Furthermore, since the incident light blocking pattern 8, the signal holding capacitor electrode 7 and the holding capacitor bus 19 are formed of the same layer and the same material, the increase in the number of manufacturing steps can be minimized.
Manufacturing cost is low.

Next, a method of manufacturing the active matrix structure shown in FIG. 1, that is, a method of manufacturing the active matrix structure according to the present invention will be described. First, the film thickness on the glass substrate 10
A 100 nm Al film is deposited. Next, a pattern is formed by photolithography, and an incident light blocking pattern 8, a signal holding capacity electrode 7, and a holding capacity bus 19 are provided. Next, an insulating film 11 is deposited on the entire surface. Next, source 12, drain
13, a data bus 1, a storage capacitor external extraction terminal 20, a transparent pixel electrode 4, and an amorphous Si 14 are provided. Next, an insulating film 15 is provided. Next, openings 17 and 18 by parallel plate dry etching using a fluorocarbon-based gas and openings for terminal connection portions of the data bus 1 and the gate bus 3 are provided. In this case, the holding capacitor external extraction terminal 20 and the holding capacitor bus 19
Since it is composed of Al, the holding capacitor external extraction terminal 20,
The holding capacity bus 19 is hardly eroded. Next, the gate bus 3, the gate 16, and the connection film 21 are provided. Next, after depositing a passivation film (not shown),
An opening (not shown) is provided in the external extraction terminal portion of the passivation film.

In this method of manufacturing the active matrix structure, the openings 17 and 18 of the terminal connection portions of the holding capacitance bus 19 and the openings of the terminal connection portions of the data bus 1 and the gate bus 3 are provided simultaneously and collectively. Since the increase in the number is minimized, the manufacturing cost is low. Further, since the insulating films 11 and 15 are made of a silicon nitride film, and the holding capacitor bus 19 and the holding capacitor external output terminal 20 are made of Al, the insulating films are formed by parallel plate dry etching using a fluorocarbon-based gas. When the openings 17 and 18 are provided in the holes 11 and 15, since the Al is not etched by the fluorocarbon-based gas, the holding capacitance bus 19 and the holding capacitance external extraction terminal 20 serve as etching stoppers. Even if the depths are different, the openings 17 and 18 can be provided simultaneously and collectively.

In the above embodiment, the incident light blocking pattern 8,
Although the signal holding capacitor electrode 7 and the holding capacitor bus 19 are formed of Al, they may be formed of Cr, Ta, Ti, Cu, Ag, or a composite metal film or alloy mainly composed of these.
If the storage capacitor bus 19 is formed of Ag, the resistance can be reduced. Further, in the above embodiment, the insulating film 11 is formed of a silicon nitride film, but may be formed of a silicon oxide film, tantalum oxide, or a composite layer thereof.
Further, in the above embodiment, the thickness of the insulating film 11 is set to 500 n
m, but the film pressure may be 100 to 1000 nm. Further, in the above embodiment, the insulating film 15 is formed of a silicon nitride film, but may be formed of a silicon oxide film, a tantalum oxide, or a composite layer thereof. Further, in the above embodiment, the storage capacitor external extraction terminal 20 is formed in the same layer as the source 12, drain 13, and data bus 1, but the storage capacitor external extraction terminal 20 is the same as the gate bus 3 and gate 16. Or the same layer as the incident light blocking pattern 8, the signal holding capacitor electrode 7, and the holding capacitor bus 19. Further, in the above-described embodiment, the passivation film is deposited and the opening is provided in the external extraction terminal portion of the passivation film. However, when the passivation film is not required to be processed by any means, an opening step of forming a bus connection portion is performed. It is also possible to do it at the same time.

〔The invention's effect〕

As described above, in the active matrix structure according to the present invention, the leak current due to light irradiation on the thin film transistor can be significantly reduced, and the amount of charge stored in the pixel capacitance can be significantly increased. In addition, the display quality does not deteriorate. further,
Since the increase in the number of structural steps is kept to a minimum, the manufacturing cost is low.

In the method of manufacturing an active matrix structure according to the present invention, the opening of the terminal connection of the storage capacitor bus and the opening of the terminal connection of the bus line of the thin film transistor are provided simultaneously and collectively. Manufacturing costs are low because the increase is minimized.

 Thus, the effect of the present invention is remarkable.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an active matrix structure according to the present invention, and FIGS. 2 and 3 are diagrams each showing an equivalent circuit of one pixel of a liquid crystal display device having a conventional active matrix structure. 2 Thin film transistor 4 Transparent pixel electrode 7 Signal holding capacitor electrode 8 Incident light blocking pattern 10 Glass substrate 11 Insulating film 17 Opening 18 Opening 19 Holding capacitor bus 20 ... Retention capacitor external extraction terminal

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tadamichi Kawada 1-1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Takunobu Nakagawa 4-3-1 Takatsukadai, Nishi-ku, Kobe-shi, Hyogo Prefecture 1 Inside the R & D Laboratory of Seiseki Manufacturing Co., Ltd. (72) Inventor Ikuhiro Ukai 4-3-1 Takatsukadai, Nishi-ku, Kobe-shi, Hyogo Prefecture Within the R & D Laboratory of Seiseki Manufacturing Co., Ltd. (72) Shigeo Aoki Kita, Yao-shi, Osaka No. 1-433, Kupoji Temple Seisei Manufacturing Co., Ltd. (56) References JP-A-60-207116 (JP, A) JP-A-2-72392 (JP, A) JP-A-3-125123 (JP, A) (58) Field surveyed (Int.Cl. ⁶ , DB name) G02F 1/136 500 H01L 29/786

Claims (2)

(57) [Claims] 1. An incident light blocking pattern for blocking at least incident light to a thin film transistor on a glass substrate, a signal holding capacitor electrode electrically separated from the incident light blocking pattern and facing a transparent pixel electrode, and the signal holding An active matrix structure in which a storage capacitor bus connecting the storage capacitor electrodes is formed of the same layer and of the same material, and the thin film transistor and the transparent pixel electrode are formed via an insulating film. 2. An incident light blocking pattern for blocking at least incident light to a thin film transistor on a glass substrate, a signal holding capacitor electrode electrically separated from the incident light blocking pattern and facing a transparent pixel electrode, and the signal holding A method for manufacturing an active matrix structure in which a storage capacitor bus connecting the storage capacitor electrodes is formed of the same layer and of the same material, and the thin film transistor and the transparent pixel electrode are formed via an insulating film. Wherein the opening of the terminal connection portion of the thin film transistor and the opening of the terminal connection portion of the bus line of the thin film transistor are provided simultaneously and collectively.