JP2804189B2 - Imaging equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to imaging using solid-state imaging means having a photoelectric conversion element and sequentially outputting an image signal corresponding to the amount of received light from the photoelectric conversion element in response to an external synchronization signal input. Related to the device.

[0002]

2. Description of the Related Art For example, in a chip mounter, a position detecting device for detecting a displacement of an electronic component adsorbed on a nozzle is provided, and a mounting position of the electronic component is corrected based on a detection result by the position detecting device. I have.

In such a position detecting device, a light source and a television camera are arranged at predetermined positions corresponding to the movement trajectory of the nozzle, and light is projected from the light source toward the nozzle with the nozzle moved to the predetermined position. The electronic components are photographed by a television camera.

In recent years, there has been a demand for an increase in the speed of a chip mounter, and high-speed imaging has been performed in order to cope with a reduction in imaging time by a position detecting device. In this case, in order to allow a sufficient amount of light to enter the television camera in a short time, the electronic flash attached to the tip of the nozzle is photographed by the television camera to emit light. Accordingly, since a sufficient amount of light enters the television camera at the flash emission timing, the position of the electronic component can be detected based on the image signal output from the television camera.

FIG. 6 shows the output timing of an image signal from a television camera. In this case, the television camera is provided with a two-dimensional CCD image sensor. This CC
Since the D image sensor utilizes the charge transfer function of the CCD, the charges accumulated in a large number of two-dimensionally arranged photodiodes are simultaneously transferred to the CCD at a predetermined timing, and the charge transferred to the CCD is transferred to the CCD. They are sequentially output as image signals. Accordingly, an image signal is output from the television camera when the predetermined charge time shown in FIG. 6 has ended. In addition, since the CCD image sensor employs an interlaced system in which one image is output using two image signals, it takes one image signal output time to output one image signal. 7msec
It takes about 33 msec which is twice as large as the above.

On the other hand, the image signal output from the television camera is A / D converted and stored in the buffer memory as a digital signal. When the digital signal for one image is stored in the buffer memory, the image signal is output to the image processing circuit. Thus, image processing can be executed based on the digital signal output from the buffer memory.

[0007]

However, in the case of the above-mentioned conventional configuration, the CCD image sensor has a configuration in which the charge transferred from the photodiode to the CCD is output as an image signal when the charge time is completed.
A maximum of 17 msec elapses from the time when electric charges are accumulated in the photodiode due to the emission of the strobe to the time when an image signal corresponding to the electric charges is output from the television camera. For this reason, a maximum of 50 msec is required until a digital signal corresponding to a sufficient amount of light from the strobe light emission is stored in the buffer memory from the strobe light emission timing, so that there is a disadvantage that image processing is delayed accordingly.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state imaging device having a photoelectric conversion element for photographing light projected from a light source onto an object to be photographed for a short time. It is an object of the present invention to provide an imaging apparatus capable of shortening the time from the light projection timing to the time when image processing can be executed.

[0009]

According to the present invention, there is provided solid-state imaging means having a photoelectric conversion element and sequentially outputting an image signal corresponding to the amount of received light from the photoelectric conversion element in response to the input of a synchronization signal from the outside. A storage area for storing a digital signal corresponding to a signal level of an image signal in a memory area corresponding to the photoelectric conversion element that outputs the image signal, wherein a memory area corresponding to the photoelectric conversion element is set; A light source that emits light for a short time toward an object to be photographed by the solid-state imaging means at a predetermined timing; a synchronization signal generating means that outputs the synchronization signal to the solid-state imaging means at a predetermined cycle; Output control means for outputting the digital signal stored in the storage means for one image immediately after or immediately after the output timing of the synchronization signal.

[0010]

The synchronizing signal generating means outputs a synchronizing signal at a predetermined cycle. Accordingly, the solid-state imaging means outputs an image signal corresponding to the amount of received light from the photoelectric conversion element in accordance with the output timing of the synchronization signal. Therefore, the digital signal corresponding to the signal level of the image signal from the photoelectric conversion element is stored in the storage means. Are sequentially updated and stored.

If the light source emits light for a short time while the image signal is being output from the solid-state image pickup means, the solid-state image pickup means picks up an image of a subject with a sufficient amount of light. A sufficient image signal is output. As a result, a digital signal corresponding to the signal level is stored in the storage unit from the memory area corresponding to the photoelectric conversion element that has output an image signal with a sufficient signal level. The output control means outputs one image of the digital signal stored in the storage means after the output timing of the synchronization signal output from the synchronization signal generation means immediately before or immediately after the light emission timing of the light source. Therefore, the digital signal corresponding to the signal level of the image signal output from the solid-state imaging means is stored in the storage means at substantially the light emission timing of the light source, so that image processing can be performed based on the digital signal stored in the storage means. It is possible to shorten the time until the program becomes executable.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. In FIG. 1 schematically showing the overall configuration, a television camera 1 has a two-dimensional MOS image sensor 2. This MOS type image sensor 2 is constituted by two-dimensionally arranging photodiodes as photoelectric conversion elements, for example, 512 × 512, and according to the amount of light received from the photodiodes determined by the scanning pulses from the vertical scanning circuit and the horizontal scanning circuit. It outputs an image signal. Therefore, in the MOS image sensor 2, unlike the CCD image sensor described in the related art, the charge from the photodiode is output as an image signal in real time without being stored in a scanning function such as a CCD.
In this case, the television camera 1 receives a vertical synchronization signal and a horizontal synchronization signal from outside, and the television camera 1 is arranged in the horizontal direction based on the input timing of the vertical synchronization signal.
In addition to the output from the photodiode on the line, the line of the photodiode for outputting the image signal is sequentially switched according to the input timing of the horizontal synchronizing signal.

The television camera 1 described above is used, for example, in a chip mounter position detecting device, and is positioned so as to photograph an electronic component 4 to be photographed, which is adsorbed to a nozzle 3 constituting the chip mounter. . Here, a diffuse reflection plate 5 is mounted above the nozzle 3, and an annular light source 6 is disposed below the nozzle 3. The light source 6 transmits light from a strobe 7 to an optical fiber 8
The light from the strobe 7 is projected toward the diffuse reflection plate 5 from the tip of the optical fiber 8 arranged annularly. With the above configuration, the television camera 1 captures an image of the shadow of the electronic component 4 adsorbed on the nozzle 3, and outputs an image signal corresponding to the captured image. In this case, the strobe 7 emits light in response to the input of a trigger signal from the outside.

In the control device 9, a synchronization signal generation circuit 10 as a synchronization signal generation means outputs a vertical synchronization signal VD and a horizontal synchronization signal HD to the television camera 1 and the timing signal generation circuit 11. The timing signal generation circuit 11 outputs a timing signal to the A / D conversion circuit 12 based on the vertical synchronization signal and the horizontal synchronization signal from the synchronization signal generation circuit.

The A / D conversion circuit 12 receives an image signal from the television camera 1, converts the image signal into an 8-bit digital signal based on a timing signal from the timing signal, and converts the image signal into an 8-bit digital signal. Output. The buffer memory 13 which constitutes storage means together with the A / D conversion circuit 12 has an 8-bit memory provided with a memory area corresponding to 512 × 512 addresses, and stores a digital signal from the A / D conversion circuit 12 at a predetermined address. Is stored in the memory area.

The flip-flop 14 outputs a high-level signal to the delay circuit 15 at the timing when the horizontal synchronizing signal HD is output from the synchronizing signal generation circuit 10 in the input state of an external trigger signal. In this case, when the nozzle 3 is located at a predetermined position, the flip-flop 14
Is supplied with an external trigger signal. The delay circuit 15 can set a delay time in advance. When a high-level signal is input from the flip-flop 14, the delay circuit 15 sends the signal to the buffer memory control circuit 16 as output control means when a predetermined delay time has elapsed from the timing. Outputs trigger signal. The buffer memory control circuit 16 receives a timing signal from the timing signal generation circuit 11, and the A / D conversion circuit 1
2 is stored in a memory area corresponding to the timing signal. Further, the buffer memory control circuit 16 sends the trigger signal and the signal generation circuit 11 from the delay circuit 15.
A digital signal for one image is output from the memory area at the head address of the buffer memory 13 on the basis of the timing signal from.

Next, the operation of the above configuration will be described. The synchronization signal generation circuit 10 outputs the vertical synchronization signal VD at a cycle of 60 Hz and outputs the horizontal synchronization signal HD at a cycle of 31.46 KHz. Accordingly, the television camera 1 outputs an image signal corresponding to the charge accumulated in the photodiode array on the first line in response to the input of the horizontal synchronization signal HD following the input of the vertical synchronization signal VD, and outputs the horizontal synchronization signal H.
Every time D is input, the lines of the photodiode array for outputting an image signal are sequentially switched.

When the nozzle 3 is located at a predetermined position,
Since the trigger signal is given to the flip-flop 14,
In that state, the horizontal synchronizing signal HD
Occurs, the flip-flop 14 is set.
As a result, the delay circuit 1
5, the start signal is output to the buffer memory control circuit 16 at a timing delayed from the delay circuit 15 by the delay time. At this time, as shown in FIG. 2, a trigger signal is output from the delay circuit 15 to the strobe 7, so that the light is emitted from the light source 6 to the diffuse reflection plate 5 of the nozzle 3 at substantially the output timing of the trigger signal. Here, after the trigger signal is given to the strobe 7 until the strobe 7 actually fires,
It takes 10 μsec and the flash period is 6-8
μsec (see FIG. 5), the strobe light may be emitted during the output period of the image signal depending on the set value of the delay time tD set in the delay circuit 15. In such a case, an image signal having a sufficient signal level is output from the television camera 1 in the middle of the image signal output period as shown in FIG.

On the other hand, the image signal from the television camera 1 is A
The digital signal is converted into a digital signal by the / D conversion circuit 12, and the digital signal is stored by the buffer memory control circuit 16 in a memory area of the buffer memory 13 corresponding to the address of the photodiode that has output the image signal.
Therefore, when the photodiode which has output the image signal at the light emission timing of the strobe 7 is the n + α line, the buffer memory 13 stores the n + α line or the n + α line.
A digital signal corresponding to an image signal of a sufficiently large signal level is stored from a memory area corresponding to the α + 1 line.

At this time, the buffer memory control circuit 16
Is a period from the input timing of the start signal (output timing of the trigger signal to the strobe 7) from the delay circuit 15 to the output timing of the image signal from the input timing of the horizontal synchronizing signal HD corresponding to the (n + α) line (H1 shown in FIG. 5). Period), the next n + α-1
The write operation to the buffer memory 13 is executed up to the digital signal corresponding to the image signal of the line, and the digital signal stored in the memory area at the head address of the buffer memory 13 at the next output timing of the vertical synchronizing signal VD. The image is output (see FIG. 2). In addition, the buffer memory control circuit 16 controls the period from the input timing of the start signal from the delay circuit 15 to the output timing of the image signal corresponding to the (n + α) line to the output timing of the horizontal synchronization signal corresponding to the (n + α + 1) th line (see FIG. 5). Period excluding the indicated H1 period).
The writing operation to the buffer memory 13 is executed up to the digital signal corresponding to the image signal of the line of + α, and the digital signal stored in the memory area of the head address of the buffer memory 13 at the next output timing of the vertical synchronization signal VD. One image is output.

In short, according to the above configuration, the television camera 1 having the MOS type image sensor 2 for outputting the charge accumulated in the photodiode as an image signal in real time is used, and the image signal is buffered as a digital signal. After storing in real time in the memory 13, the digital signal for one image stored in the buffer memory 13 from the timing at which the horizontal synchronizing signal was output from the synchronizing signal generation circuit 10 immediately before or immediately after the light emission timing with respect to the light source 6. Output
Buffer memory 13 with flash timing
Then, a digital signal having a sufficient signal level by the emission of the strobe 7 is stored. Therefore, unlike the conventional example using a television camera having a CCD type image sensor, which requires a long time from the timing of the emission of the strobe to the time when an image signal of a sufficient signal level is output by the strobe, the emission timing of the strobe 7 Thus, the digital signal can be immediately stored in the buffer memory 13, so that the time until the image processing becomes possible can be shortened accordingly.

In the above-described embodiment, the example in which the strobe 7 emits light during the output period of the image signal from the television camera 1 has been described. However, by adjusting the delay time set in the delay circuit 15, the strobe 7 emits light. The timing may be set to a period deviating from the image signal output period.
In this case, at the beginning of the output timing of the image signal from the television camera 1 (the timing indicated by the broken line in FIG. 5).
Outputs an image signal of a sufficient signal level by turning on the strobe 7, so that the detection accuracy can be improved.

[0023]

As is apparent from the above description, according to the photographing apparatus of the present invention, the digital signal corresponding to the signal level of the image signal is stored in the storage means at substantially the timing of light emission from the light source. Therefore, there is an excellent effect that it is possible to shorten the time from the light emission timing of the light source to the time when the image processing can be executed.

[Brief description of the drawings]

FIG. 1 is an overall schematic diagram showing an embodiment of the present invention.

FIG. 2 is a diagram schematically showing a relationship between a trigger signal to a strobe and an image signal.

FIG. 3 is a diagram showing a relationship between a trigger signal to a strobe and an image signal.

FIG. 4 is a diagram showing a relationship between a flash emission timing and a storage start line.

FIG. 5 is a diagram showing a relationship between a trigger signal to a strobe and an image signal.

FIG. 6 is a diagram corresponding to FIG. 2 showing a conventional example.

[Explanation of symbols]

1 is a television camera (solid-state imaging means), 4 is an electronic component (imaging target), 6 is a light source, 10 is a synchronization signal generation circuit (synchronization signal generation means), 13 is a buffer memory (storage means), 1
Reference numeral 6 denotes a buffer memory control circuit (output control means).

Claims (1)

(57) [Claims] 1. A solid-state imaging means having a photoelectric conversion element and sequentially outputting an image signal corresponding to an amount of received light from the photoelectric conversion element in response to an input of a synchronization signal from the outside, and a memory corresponding to the photoelectric conversion element Storage means for storing a digital signal corresponding to the signal level of the image signal while sequentially updating the digital signal in a memory area corresponding to the photoelectric conversion element which has set an area and output the image signal; A light source that emits light for a short period of time, a synchronizing signal generating means that outputs the synchronizing signal to the solid-state imaging means at a predetermined period, and after the output timing of the synchronizing signal immediately before or immediately after the light emitting timing of the light source. A photographing apparatus comprising: an output control unit that outputs the digital signal stored in the storage unit for one image.