JP2804868B2 - Circuit breaker - Google Patents
Circuit breakerInfo
- Publication number
- JP2804868B2 JP2804868B2 JP4238419A JP23841992A JP2804868B2 JP 2804868 B2 JP2804868 B2 JP 2804868B2 JP 4238419 A JP4238419 A JP 4238419A JP 23841992 A JP23841992 A JP 23841992A JP 2804868 B2 JP2804868 B2 JP 2804868B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- short
- voltage
- power supply
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Breakers (AREA)
Description
【0001】[0001]
【産業上の利用分野】この発明は、回路遮断器に関し、
特に交流電路より検出した回路遮断判定用の電流信号の
波形を再生する積分回路の動作を安定化するようにした
回路遮断器に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit breaker,
More particularly, the present invention relates to a circuit breaker for stabilizing the operation of an integrating circuit for reproducing a waveform of a current signal for circuit interruption determination detected from an AC electric circuit.
【0002】[0002]
【従来の技術】図5は従来の回路遮断器の全体構成を示
すブロック図である。図において、U,V,W,Nは交
流電源(図示しない)の各相、1は各相と負荷を結ぶ相
導体からなる交流電路としての主回路、3は引外し電磁
装置としてのトリップコイルであり、励磁された時に遮
断機構4を介して遮断接点2を開かせ、また消磁された
時に閉じさせる。5は主回路1の各相導体を1次巻線と
する変流器、6は変流器5に接続され主回路1の交流を
直流に変換する整流回路、7はこの整流回路6に接続さ
れ後述する諸回路に所要の電圧を供給する電源回路、8
はこの電源回路7の両端間でトリップコイル3と共に直
列に接続された電子式スイッチである。2. Description of the Related Art FIG. 5 is a block diagram showing the entire structure of a conventional circuit breaker. In the figure, U, V, W, and N denote each phase of an AC power supply (not shown), 1 denotes a main circuit as an AC electric circuit composed of phase conductors connecting each phase and a load, and 3 denotes a trip coil as a tripping electromagnetic device. When the magnetism is excited, the breaking contact 2 is opened via the breaking mechanism 4 and when the magnetism is demagnetized, the breaking contact 2 is closed. 5 is a current transformer having each phase conductor of the main circuit 1 as a primary winding, 6 is a rectifier circuit which is connected to the current transformer 5 and converts AC to DC of the main circuit 1, and 7 is connected to the rectifier circuit 6. A power supply circuit for supplying necessary voltages to various circuits to be described later;
Is an electronic switch connected in series with the trip coil 3 between both ends of the power supply circuit 7.
【0003】9は主回路1の各相導体に電磁結合された
電流検出コイルとしての空心コイルであり、各相導体の
磁束により負荷電流を検出し、コイル両端に誘起電圧を
発生する。10はこれら空心コイル9の両端に接続さ
れ、発生した誘起電圧を電流信号に再生する過電流信号
再生回路、11は過電流信号再生回路10によって再生
された電流信号を整流する整流信号回路、12A、12
Bはこの整流信号回路11の出力側で互いに接続された
各相の整流信号のうち最大相の整流信号を選択する最大
相選択回路、13,14は最大相選択回路12A,12
Bによって選択された整流信号をそれぞれピーク値,実
効値に変換するピーク値変換回路,実効値変換回路であ
る。Reference numeral 9 denotes an air-core coil as a current detection coil electromagnetically coupled to each phase conductor of the main circuit 1, which detects a load current by the magnetic flux of each phase conductor and generates an induced voltage at both ends of the coil. An overcurrent signal regeneration circuit 10 is connected to both ends of the air-core coil 9 and reproduces the generated induced voltage into a current signal. A rectification signal circuit 11 rectifies the current signal reproduced by the overcurrent signal regeneration circuit 10. , 12
B is a maximum phase selection circuit that selects the maximum phase rectification signal among the rectification signals of each phase connected to each other on the output side of the rectification signal circuit 11, and 13 and 14 are maximum phase selection circuits 12A and 12
A peak value conversion circuit and an effective value conversion circuit for converting the rectified signal selected by B into a peak value and an effective value, respectively.
【0004】15は最大相選択回路12からの整流信号
が既定の瞬時引外し特性を超えるとトリップ(引外し)
信号を電子式スイッチ8へ出力する瞬時引外し回路、1
6はピーク値変換回路13からのピーク値変換された整
流信号が既定の短限時引外し特性を超えるとトリップ信
号を電子式スイッチ8へ出力する短限時引外し回路であ
る。これら以外の諸回路はこの発明に直接関係しないの
で、ここではその説明を省略する。A trip 15 occurs when the rectified signal from the maximum phase selection circuit 12 exceeds a predetermined instantaneous trip characteristic.
Instantaneous trip circuit that outputs a signal to the electronic switch 8
Reference numeral 6 denotes a short time trip circuit for outputting a trip signal to the electronic switch 8 when the peak-converted rectified signal from the peak value conversion circuit 13 exceeds a predetermined short time trip characteristic. Since other circuits are not directly related to the present invention, the description thereof is omitted here.
【0005】図6は過電流信号再生回路10の詳細な構
成を示す回路図である。図において、10A〜10Dは
それぞれ積分回路を構成する演算増幅器であり、空心コ
イル9により微分信号の形で検出した誘起電圧を積分し
元の過電流波形を再生する。10A1,10A2は空心
コイル9からの過電流信号を演算増幅器10Aに入力す
る入力抵抗、10A3,10A4は演算増幅器10Aの
反転入力端子と出力端子間に並列接続され積分回路の時
定数回路を構成するフィードバック抵抗,積分コンデン
サである。尚、他の演算増幅器10B〜10Dにおいて
も同様な抵抗、コンデンサを接続して積分回路を構成し
ている。FIG. 6 is a circuit diagram showing a detailed configuration of the overcurrent signal reproducing circuit 10. As shown in FIG. In the figure, reference numerals 10A to 10D denote operational amplifiers constituting an integrating circuit, respectively, and reproduce the original overcurrent waveform by integrating the induced voltage detected by the air-core coil 9 in the form of a differential signal. 10A1 and 10A2 are input resistors for inputting an overcurrent signal from the air-core coil 9 to the operational amplifier 10A, and 10A3 and 10A4 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier 10A to form a time constant circuit of an integrating circuit. It is a feedback resistor and an integration capacitor. In the other operational amplifiers 10B to 10D, similar resistors and capacitors are connected to form an integrating circuit.
【0006】次に、従来の回路遮断器の動作について過
電流信号再生回路10の動作に注目して説明する。主回
路1を構成する各相導体に負荷電流が流れると相導体に
磁界が発生する。そしてその磁界を相導体と電磁結合し
ている空心コイル9が電磁誘導作用にて検知すると、空
心コイル9の両端には負荷電流波形を微分処理した波形
をなす誘起電圧が発生する。Next, the operation of the conventional circuit breaker will be described focusing on the operation of the overcurrent signal regeneration circuit 10. When a load current flows through each phase conductor constituting the main circuit 1, a magnetic field is generated in the phase conductor. When the air-core coil 9 electromagnetically coupled to the phase conductor detects the magnetic field by electromagnetic induction, an induced voltage having a waveform obtained by differentiating the load current waveform is generated at both ends of the air-core coil 9.
【0007】空心9の両端に発生した誘起電圧を例えば
入力抵抗10A1,10A2を通して演算増幅器10A
に入力すると、演算増幅器10Aは積分コンデンサ10
A4、入力抵抗10A3と共に積分回路を構成している
ため入力した誘起電圧を元の負荷電流波形、即ちsin
カーブをなす負荷電流波形が微分され位相の進んだco
sカーブをなす誘起電圧波形となったならば誘起電圧波
形を積分してsinカーブに再生し、電流信号として後
段の整流信号回路11に出力する。整流信号回路11は
入力した電流信号を全波整流し、負荷電流のピーク値を
求めるために最大相選択回路12Aを通してピーク値変
換回路13へ出力する。An induced voltage generated at both ends of the air core 9 is applied to the operational amplifier 10A through input resistors 10A1 and 10A2, for example.
, The operational amplifier 10A becomes the integrating capacitor 10
A4, since the integration circuit is configured together with the input resistor 10A3, the input induced voltage is converted to the original load current waveform, that is, sin.
The load current waveform forming the curve is differentiated and the phase is advanced.
When the induced voltage waveform forms an s-curve, the induced voltage waveform is integrated and reproduced as a sin curve, and is output as a current signal to the rectified signal circuit 11 at the subsequent stage. The rectified signal circuit 11 performs full-wave rectification on the input current signal, and outputs the current signal to the peak value conversion circuit 13 through the maximum phase selection circuit 12A to obtain the peak value of the load current.
【0008】[0008]
【発明が解決しようとする課題】従来の回路遮断器は、
以上のように過電流信号再生回路を含む総ての回路の電
源電圧を負荷電流を基に電源回路から供給される。その
ため過電流信号再生回路においては、電源電圧が一定電
圧値までに立ち上がらない状態で演算増幅器が空心コイ
ルより電流信号を取り込むと、電流信号は完全に積分さ
れず不正確な電流信号として出力され後段の回路が誤動
作するという問題点があった。A conventional circuit breaker is:
As described above, the power supply voltages of all the circuits including the overcurrent signal regeneration circuit are supplied from the power supply circuit based on the load current. Therefore, in the overcurrent signal regeneration circuit, if the operational amplifier captures the current signal from the air-core coil in a state where the power supply voltage does not rise to a certain voltage value, the current signal is not completely integrated but is output as an inaccurate current signal and is output in the subsequent stage. There is a problem that the above circuit malfunctions.
【0009】この発明は上記のような問題点を解決する
ためになされたもので、回路の電源電圧が一定値に立ち
上がった事を検知した後に、回路の動作を有効とするこ
とができる回路遮断器を得ることを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is possible to make the operation of the circuit effective after detecting that the power supply voltage of the circuit has risen to a constant value. The purpose is to obtain a vessel.
【0010】[0010]
【課題を解決するための手段】この発明に係る回路遮断
器は、交流電路を流れる電流検出時に電流値に応じた誘
起電圧を発生する電流検出コイルと、この電流検出コイ
ルに発生した誘起電圧を積分し電流波形を再生する積分
回路と、この積分回路を構成する演算増幅器の入力端子
と出力端子間に接続されたコンデンサを短絡する短絡手
段と、前記演算増幅器の電源電圧の立ち上がりを検出
し、電圧値が予め設定した値以下のときに前記短絡手段
を短絡して前記積分回路を無効とし、電圧値が予め設定
した値に至った時に前記短絡手段に対し短絡解除信号を
出力して前記積分回路を有効とする短絡制御手段とを備
えたものである。A circuit breaker according to the present invention comprises: a current detecting coil for generating an induced voltage corresponding to a current value when detecting a current flowing through an AC circuit; An integrating circuit for integrating and reproducing a current waveform, a short-circuiting means for short-circuiting a capacitor connected between an input terminal and an output terminal of an operational amplifier constituting the integrating circuit, and detecting a rise of a power supply voltage of the operational amplifier; When the voltage value is equal to or less than a preset value, the short-circuit means
And a short-circuit control means for outputting a short-circuit release signal to the short-circuit means to enable the integration circuit when the voltage value reaches a preset value. is there.
【0011】[0011]
【作用】この発明における回路遮断器は、回路の電源電
圧が一定値までに立ち上がるまでは、積分回路を構成す
るコンデンサの両端を短絡手段にて短絡し、電流のコン
デンサへ充電を停止して積分動作を停止し、短絡制御手
段にて電源電圧が一定値まで立ち上がったことを検出し
たならば短絡手段による短絡を解除し、電流をコンデン
サに充電して積分動作を開始することで誘起電圧の積分
を可能にする。In the circuit breaker according to the present invention, both ends of the capacitor constituting the integrating circuit are short-circuited by the short-circuit means until the power supply voltage of the circuit rises to a certain value, and the current is interrupted.
The charging of the capacitor is stopped to stop the integration operation. If the short-circuit control means detects that the power supply voltage has risen to a certain value, the short-circuit by the short-circuit means is released and the current is discharged.
By starting the integration operation by charging the battery, the induced voltage can be integrated.
【0012】[0012]
【実施例】実施例1.以下、この発明に一実施例を図に
ついて説明する。図1は本実施例に係る回路遮断器の全
体構成を示すブロック図である。尚、図中図5と同一符
号は同一又は相当部分を示す。図において、7Aは本実
施例における電源回路、101は本実施例における過電
流信号再生回路であり電源回路7Aより動作電源が供給
される。図2は図1に示した過電流信号再生回路101
の一部構成を示した回路図である。図中図6と同一符号
は同一又は相当部分を示す。図において、QA〜QCは短
絡手段としてのFETであり、演算増幅器10A〜10
Cの入力端子と出力端子間に接続されたフィードバック
抵抗10A3〜10C3と積分コンデンサ10A4〜1
0A4から構成される並列回路の両端を外部信号により
短絡或は開放する。[Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of the circuit breaker according to the present embodiment. In the drawing, the same reference numerals as those in FIG. 5 indicate the same or corresponding parts. In the figure, reference numeral 7A denotes a power supply circuit according to the present embodiment, and 101 denotes an overcurrent signal reproducing circuit according to the present embodiment. FIG. 2 shows the overcurrent signal regeneration circuit 101 shown in FIG.
FIG. 2 is a circuit diagram showing a partial configuration of the embodiment. 6, the same reference numerals as those in FIG. 6 indicate the same or corresponding parts. In FIG, Q A to Q C is the FET as short-circuiting means, operational amplifier 10A~10
Feedback resistors 10A3 to 10C3 and integrating capacitors 10A4 to 1 connected between the input and output terminals of C
Both ends of the parallel circuit composed of 0A4 are short-circuited or opened by an external signal.
【0013】102は短絡制御手段としての積分開始電
圧検出回路であり、その構成としてQ1は各FETQA〜
QCにゲート信号を与えるトランジスタであり、コレクタ
はコレクタ抵抗R1を介して電源回路7Aのグランド端
子GGに接続され、エミッタは電源回路7Aのマイナス
電源ラインV−に接続されている。またベースとグラン
ド端子GG間にはベースに一定電圧を与えるツェナーダ
イオードZD1と抵抗R2の直列回路が接続され、更に
ベースとエミッタ間にはベースにおいて抵抗R2と直列
接続される抵抗R3が接続されている。[0013] 102 is an integral starting voltage detecting circuit as a short-circuit control unit, Q 1 as constituent Each FETs Q A ~
A transistor providing a gate signal to the Q C, the collector is connected to the ground terminal GG of the power supply circuit 7A through collector resistor R 1, the emitter is connected to the negative power supply line of the power supply circuit 7A V-. Also between the base and the ground terminal GG are connected in series circuit of a resistor R 2 and the Zener diode ZD1 to provide a constant voltage to the base, the resistance R 3 is further connected resistor R 2 in series with the base between the base and emitter It is connected.
【0014】即ちベースにはツェナー電圧を抵抗R2,
R3で分圧した電圧が与えられ、この分圧電圧がトラン
ジスタQ1の動作電圧に到るとトランジスタQ1はオンし
てFETQA〜QCのゲートにマイナス電位を与えオフ動
作させる。That is, the Zener voltage is applied to the base by the resistors R 2 ,
Divided voltage is given by R 3, the divided voltage transistor Q 1 when reaching the operating voltage of the transistor Q 1 is turned on to off operation gives negative potential to the gate of the FETs Q A to Q C and.
【0015】図4は電源回路7Aの出力部を表す回路図
である。図において、C1は一端がプラス電源ライン
に、他端がグランド端子GGに接続されたコンデンサで
あり、グランド端子GGから見てプラス電源ラインに例
えば+12Vを与える。C2は一端がマイナス電源ライ
ンに、他端がグランド端子GGに接続されたコンデンサ
であり、グランド端子GGから見てマイナス電源ライン
に例えばー12Vを与える。ZD2はコンデンサC1に
並列接続されたツェナーダイオードであり、プラス側電
源を+12Vの一定電圧に制限する。FIG. 4 is a circuit diagram showing an output section of the power supply circuit 7A. In FIG, C 1 on one end is the positive power supply line, a capacitor whose other end is connected to the ground terminal GG, give to the positive power supply line for example + 12V when viewed from the ground terminal GG. C 2 to one end of the negative power supply line, a capacitor whose other end is connected to the ground terminal GG, give Tatoeba 12V to the negative power supply line when viewed from the ground terminal GG. ZD2 is a Zener diode connected in parallel with the capacitor C 1, to limit the positive-side power supply at a constant voltage of + 12V.
【0016】次に、上記構成に従って本実施例の動作に
ついて説明する。先ず、整流回路6より負荷電流に比例
した直流電圧が電源回路7Aに印加されると、電源回路
の出力部(図4)に設けたコンデンサC1,C2には図3
の電源電圧特性に示される様に徐々に電荷が充電され
る。この時プラス電源ラインに接続されたコンデンサC
1の充電電圧が+12Vに達すると、ツェナーダイオー
ドZD2がブレイクダウンを起こしプラス側電源V+を
+12Vに制限する。Next, the operation of this embodiment according to the above configuration will be described. First, when a DC voltage proportional to the load current is applied from the rectifier circuit 6 to the power supply circuit 7A, the capacitors C 1 and C 2 provided at the output section (FIG. 4) of the power supply circuit have the configuration shown in FIG.
As shown in the power supply voltage characteristic of FIG. At this time, the capacitor C connected to the positive power line
When the charging voltage of 1 reaches + 12V, the Zener diode ZD2 breaks down and limits the positive power supply V + to + 12V.
【0017】だが、マイナス側電源に関してはコンデン
サC2に抵抗R4を並列接続してあるためリップル成分
等、電源の変動要素がマイナス電源に現れ、電源電圧が
一定のマイナス電圧V−に至るまでに時間を要するよう
になつている。従って、このマイナス電源電圧V−が一
定電圧(ー12V)に至った時点で電源回路7Aの電源
電圧が一定値に立ち上がったことを検知することができ
る。[0017] However, the ripple component for regard to the negative power supply are connected in parallel a resistor R 4 to the capacitor C 2, etc., appear variables of the power supply to the negative power supply, until the supply voltage reaches a predetermined negative voltage V- It takes time. Therefore, when the minus power supply voltage V- reaches a constant voltage (-12 V), it can be detected that the power supply voltage of the power supply circuit 7A has risen to a constant value.
【0018】以上のように構成された電源回路7Aのグ
ランド端子GGとマイナス電源ラインをそれぞれ電流信
号再生回路101に内蔵された積分開始電圧検出回路1
02のグランド端子GGとマイナス電源端子V−に接続
する。この状態で遮断接点2を投入し、変流器5を通し
て負荷電流を整流回路6に流し直流電圧を電圧回路7A
に印加するとプラス、マイナスの電源電圧は徐々に立ち
上がる。しかし、マイナス電源電圧V−は前述したよう
にプラス電源電圧V+に比較して一定電圧に立ち上がる
までに時間を要する。The ground terminal GG and the negative power supply line of the power supply circuit 7A configured as described above are connected to the integration start voltage detection circuit 1 built in the current signal reproduction circuit 101, respectively.
02 is connected to the ground terminal GG and the negative power supply terminal V-. In this state, the breaking contact 2 is turned on, the load current is passed to the rectifier circuit 6 through the current transformer 5, and the DC voltage is supplied to the voltage circuit 7A.
, The positive and negative power supply voltages gradually rise. However, the negative power supply voltage V- requires a longer time to rise to a constant voltage than the positive power supply voltage V + as described above.
【0019】従って、積分開始電圧検出回路102にお
いては、グランド端子GGのグランド電位より見てマイ
ナス電源電圧V−は、トランジスタQ1のベースに接続
されたツェナーダイオードZD1がブレイクダウンを起
こす電位まで下がっていない。そのためトランジスタQ
1のベースには動作電圧はかからずオフ状態であること
からコレクタに接続された抵抗R1間の電位はグランド
電位となって各FETQA〜QCのゲートに伝えられる。
その結果各FETQA〜QCはオン動作してソース、ドレ
イン間が導通状態になり、各演算増幅器10A〜10C
に設けたフィードバック抵抗10A3〜10C3と積分
コンデンサ10A4〜10C4の並列回路の両端は各F
ETQA〜QCによって短絡される。これにより電源回路
の電圧が一定値に確立されない間は演算増幅器は積分動
作を行うことがないため誤った積分出力を後段の整流信
号回路11に出力することがない。[0019] Thus, in the integration start voltage detection circuit 102, the negative power supply voltage V- is viewed from the ground potential of the ground terminal GG, down zener diode ZD1 which is connected to the base of the transistor Q 1 is to the potential to cause breakdown Not. Therefore, the transistor Q
Potential between the resistor R 1 connected to the collector because the first base operating voltage is in the OFF state irrespective is transmitted at the ground potential to the gates of the FETs Q A to Q C.
As a result the FETs Q A to Q C becomes between the source and the drain is turned on in ON operation, the operational amplifiers 10A~10C
Of the parallel circuit of the feedback resistors 10A3 to 10C3 and the integrating capacitors 10A4 to 10C4
It is short-circuited by ETQ A to Q C. As a result, the operational amplifier does not perform the integration operation while the voltage of the power supply circuit is not established at a constant value, so that an erroneous integrated output is not output to the rectified signal circuit 11 at the subsequent stage.
【0020】しかし、マイナス電源電圧V−が一定電圧
値に下がると、ツェナーダイオードZDはブレイクダウ
ンを起こしツェナー電圧を発生する。このツェナー電圧
を抵抗R3とR2の比で分圧した電圧をトランジスタQ1
のベースとエミッタにかけると、トランジスタQ1はオ
ン動作しコレクタに接続した抵抗R1間の電位をマイナ
ス電源電圧V−に下がる。However, when the negative power supply voltage V- falls to a constant voltage value, the Zener diode ZD causes a breakdown to generate a Zener voltage. This Zener voltage is divided by the ratio of the resistors R 3 and R 2 to a transistor Q 1
When applied to the base and the emitter, the transistor Q 1 is lowered to the potential between the resistor R 1 connected to the on-operation by the collector to the negative supply voltage V-.
【0021】その結果各FETQA〜QCはオフ動作して
ソース、ドレイン間が非導通状態になり、各演算増幅器
10A〜10Cに設けたフィードバック抵抗10A3〜
10C3と積分コンデンサ10A4〜10C4の並列回
路の両端の短絡は解除される。これにより電源回路の電
圧が一定値に確立され後に演算増幅器が積分動作を行う
ことで正常な積分出力を後段の整流信号回路11に出力
することになる。[0021] As a result the FETs Q A to Q C off operation to the source, drain becomes nonconductive, the feedback resistor provided in each operational amplifier 1OA - 1OC 10A3~
The short circuit at both ends of the parallel circuit of 10C3 and integrating capacitors 10A4 to 10C4 is released. As a result, the operational amplifier performs an integration operation after the voltage of the power supply circuit is established at a constant value, and a normal integrated output is output to the rectified signal circuit 11 at the subsequent stage.
【0022】[0022]
【発明の効果】以上のようにこの発明によれば、交流電
路を流れる電流検出時に電流値に応じた誘起電圧を発生
する電流検出コイルと、この電流検出コイルに発生した
誘起電圧を積分し電流波形を再生する積分回路と、この
積分回路を構成する演算増幅器の入力端子と出力端子間
に接続されたコンデンサを短絡する短絡手段と、前記演
算増幅器の電源電圧の立ち上がりを検出し、電圧値が予
め設定した値以下のときに前記短絡手段を短絡して前記
積分回路を無効とし、電圧値が予め設定した値に至った
時に前記短絡手段に対し短絡解除信号を出力して前記積
分回路を有効とする短絡制御手段とを備え、演算増幅器
の電源電圧が一定値に確立された後に演算増幅器による
積分動作を可能としたことで電源立ち上がり時に誤った
積分出力が出されることがないという効果がある。As described above, according to the present invention, a current detecting coil for generating an induced voltage corresponding to a current value when a current flowing through an AC circuit is detected, and a current detected by integrating the induced voltage generated in the current detecting coil. An integrating circuit for reproducing a waveform, short-circuit means for short-circuiting a capacitor connected between an input terminal and an output terminal of an operational amplifier constituting the integrating circuit, and detecting a rise of a power supply voltage of the operational amplifier, and detecting a voltage value. When the value is equal to or less than a preset value , the short-circuit means is short-circuited, and
The integration circuit is disabled, and when the voltage value reaches a preset value, a short-circuit release signal is output to the short-circuit means to output the product.
Short-circuit control means for enabling the branch circuit, and enabling the integration operation by the operational amplifier after the power supply voltage of the operational amplifier is established at a constant value, so that an erroneous integration output is not output at power-on. This has the effect.
【図1】この発明のによる回路遮断器の一実施例の構成
を示すブロック図である。FIG. 1 is a block diagram showing a configuration of an embodiment of a circuit breaker according to the present invention.
【図2】本実施例による電流信号再生回路の構成を示す
回路図である。FIG. 2 is a circuit diagram showing a configuration of a current signal reproducing circuit according to the embodiment.
【図3】本実施例による電源回路の電源電圧立ち上がり
特性を示す特性図である。FIG. 3 is a characteristic diagram illustrating a power supply voltage rise characteristic of the power supply circuit according to the present embodiment.
【図4】本実施例による電源回路の出力部を示す回路図
である。FIG. 4 is a circuit diagram showing an output unit of the power supply circuit according to the embodiment.
【図5】従来の回路遮断器の構成を示すブロック図であ
る。FIG. 5 is a block diagram showing a configuration of a conventional circuit breaker.
【図6】従来の電流信号再生回路の構成を示す回路図で
ある。FIG. 6 is a circuit diagram showing a configuration of a conventional current signal reproducing circuit.
1 主回路 9 空心コイル 10A〜10C 演算増幅器 102 積分開始電圧検出回路 QA〜QC FET1 the main circuit 9 air-core coil 10A~10C operational amplifier 102 integration start voltage detecting circuit Q A to Q C FET
フロントページの続き (56)参考文献 特開 昭49−135563(JP,A) 特開 平2−232875(JP,A) 特開 平4−135948(JP,A) 実開 昭61−141988(JP,U) 実開 昭63−33949(JP,U) (58)調査した分野(Int.Cl.6,DB名) H02H 3/08 - 3/52Continuation of the front page (56) References JP-A-49-135563 (JP, A) JP-A-2-232875 (JP, A) JP-A-4-135948 (JP, A) Jpn. , U) Actually open 63-33949 (JP, U) (58) Fields investigated (Int. Cl. 6 , DB name) H02H 3/08-3/52
Claims (1)
応じた誘起電圧を発生する電流検出コイルと、この電流
検出コイルに発生した誘起電圧を積分し電流波形を再生
する積分回路と、この積分回路を構成する演算増幅器の
入力端子と出力端子間に接続されたコンデンサを短絡す
る短絡手段と、前記演算増幅器の電源電圧の立ち上がり
を検出し、電圧値が予め設定した値以下のときに前記短
絡手段を短絡して前記積分回路を無効とし、電圧値が予
め設定した値に至った時に前記短絡手段に対し短絡解除
信号を出力して前記積分回路を有効とする短絡制御手段
とを備えたことを特徴とする回路遮断器。1. A current detection coil for generating an induced voltage according to a current value when a current flowing in an AC circuit is detected, an integration circuit for integrating the induced voltage generated in the current detection coil to reproduce a current waveform, and an integration circuit for integrating the induced voltage. Short-circuit means for short-circuiting a capacitor connected between an input terminal and an output terminal of an operational amplifier constituting a circuit; detecting a rise of a power supply voltage of the operational amplifier; detecting a short-circuit when a voltage value is equal to or less than a preset value;
Short-circuit control means for short-circuiting the connection means and disabling the integration circuit , outputting a short-circuit release signal to the short-circuit means when the voltage value reaches a preset value, and enabling the integration circuit . A circuit breaker, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4238419A JP2804868B2 (en) | 1992-09-07 | 1992-09-07 | Circuit breaker |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4238419A JP2804868B2 (en) | 1992-09-07 | 1992-09-07 | Circuit breaker |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0690516A JPH0690516A (en) | 1994-03-29 |
| JP2804868B2 true JP2804868B2 (en) | 1998-09-30 |
Family
ID=17029929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4238419A Expired - Fee Related JP2804868B2 (en) | 1992-09-07 | 1992-09-07 | Circuit breaker |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2804868B2 (en) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49135563A (en) * | 1973-04-30 | 1974-12-27 | ||
| JPS61141988U (en) * | 1985-02-22 | 1986-09-02 | ||
| JPS6333949U (en) * | 1986-08-22 | 1988-03-04 | ||
| JPH02232875A (en) * | 1989-03-07 | 1990-09-14 | Mitsubishi Electric Corp | magnetic disk device |
| JPH0710656B2 (en) * | 1990-09-27 | 1995-02-08 | 株式会社カンセイ | Vehicle occupant protection device |
-
1992
- 1992-09-07 JP JP4238419A patent/JP2804868B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0690516A (en) | 1994-03-29 |
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