JP2808701B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device in which an SOI region is formed by using a semiconductor substrate bonding technique.

[Summary of the Invention]

When forming an SOI region using a single crystal silicon semiconductor substrate containing an impurity to be a defect nucleus, forming a concave portion on the first surface of the semiconductor substrate, forming an insulating film, and then bonding a base, This is a method for manufacturing a semiconductor device in which a high-temperature short-time gettering process is performed, and a second surface of a semiconductor substrate is polished until an insulating film is exposed to form an SOI region made of defect-free single crystal silicon. By gettering, a defect-free single crystal silicon film having a thickness of 0.1 μm or less can be realized.

[Conventional technology]

There are several methods for forming an SOI region using a dielectric isolation technique.A typical method is to grow silicon on an insulating film on the surface of a semiconductor substrate by epitaxial growth or use a single crystal by laser irradiation or the like. And forming an island-shaped single crystal region, that is, an SOI region, and bonding a base as a support to a single crystal silicon semiconductor substrate using a substrate bonding technique. There is a method of forming on the semiconductor substrate side.

In any of the methods, a defect easily occurs in the SOI region, and a method for realizing defect-free has been studied. For example, in an example using an epitaxial growth technique, as disclosed in JP-A-58-103124,
On a single-crystal silicon substrate to be epitaxially grown,
In some cases, the epitaxial growth surface is made defect-free by injecting oxygen or carbon into a region having a predetermined depth by an ion implantation method in advance to contain an impurity to be a defect nucleus. Further, in an example using a substrate bonding technique, as shown in JP-A-64-47044, oxygen is previously implanted into a single-crystal silicon semiconductor substrate by an ion implantation method to form an SOI region. The purpose is to make the surface layer of the semiconductor substrate to be defect-free.

[Problems to be solved by the invention]

When a normal MIS or MOS element is formed on a semiconductor substrate, the potential of the semiconductor substrate is grounded or fixed, and the potential of the channel region does not fluctuate. Is in a float state, so that a kink phenomenon due to electrons or holes occurs. In order to avoid this, the thickness of the channel region may be 0.1 μm or less. If the thickness of the channel region, that is, the thickness of the SOI region is 0.1 μm or less, the kink phenomenon does not occur because the entire channel region is depleted. If the impurity concentration in the channel region is much lower, the occurrence of the kink phenomenon can be suppressed even at about 0.2 μm. However, in the thin film transistor, the channel region is realized using amorphous silicon or polycrystalline silicon. If this channel region can be formed of a single crystal silicon thin film,
A thin film transistor having high mobility and high switching speed can be realized.

[Means for solving the problem]

The present invention uses a substrate laminating technique and a selective polishing technique to reduce the thickness of a silicon thin film in a channel region to 0.1 μm.
The following defect-free single crystal silicon thin film can be realized.

[Action]

If a single-crystal silicon semiconductor substrate to be a channel region is previously made to contain a high concentration of an impurity such as oxygen to become a defect nucleus, a high-temperature short-time getter is obtained after the semiconductor substrate and the base are bonded together. If you perform the ring process,
A defect-free layer can be formed up to a depth of about 0.1 μm on the surface of the semiconductor substrate to be a channel region. Also, 0.
In order to realize a single-crystal silicon layer of 1 μm or less by polishing, if the selective polishing is performed using the insulating film as a stopper, the polishing amount can be controlled with high precision.

Embodiment An embodiment of the present invention will be described with reference to FIGS.

First, the semiconductor substrate 1 of single crystal silicon shown in FIG.
For example, in the case of pulling by the CZ method, the concentration is 1.2 to 2.7 × 10 ¹⁸
/ cm ³ of oxygen. This high concentration of oxygen becomes a defect nucleus of intrinsic gettering. As a means for forming a defect nucleus, there is also an extrinsic gettering method. Further, oxygen may be implanted into the first surface of the semiconductor substrate to a predetermined depth by using an ion implantation method. A recess 2 having a depth of 0.1 μm or less is formed on the first surface of the semiconductor substrate 1 by etching or the like.

Next, as shown in FIG. 1B, an insulating film 3 such as a silicon oxide film or a silicon nitride film is formed on the first surface of the semiconductor substrate 1 by a CVD method or the like, and a polycrystalline silicon film 4 is used as a buffer material. Is deposited. The surface of the polycrystalline silicon film 4 is flattened by polishing or grinding.

Next, as shown in FIG. 1c, a base 5 as a support is bonded onto the flattened polycrystalline silicon film 4.

Next, as shown in FIG. 1d, the semiconductor substrate 1 and the base 5
And then gettering processing is performed. Gettering is a high-temperature, short-time RTA (Rapid Thermal Anneal)
Processing is good. When the gettering process is performed, the defects in the single crystal are gettered by the defect nuclei 6, and a region of about 0.1 μm near the surface of the semiconductor substrate 1 becomes a defect-free region.

After that, the second surface of the semiconductor substrate 1 is polished by polishing to just before the insulating film 3 is exposed, and further polished by the selective polishing method using the insulating film 3 as a stopper. Polishing can be performed up to the final polished surface 7 to form an SOI region 8 of a single crystal silicon thin film as shown in FIG. 1E. The thickness 9 of this SOI region is substantially equal to the depth of the concave portion 2 initially formed,
It is 0.1 μm or less, and there is no defect in the SOI region 8 due to the gettering process. As shown in FIG. 1F, a source region 10a and a drain region 10b are formed in the SOI region 8 to form an MIS. Alternatively, a MOS element is formed. Source region 10a and drain region 10b that may cause contamination
May be formed before the insulating film 3 is formed.

〔The invention's effect〕

According to the embodiment of the present invention, when forming the SOI region, using a single crystal silicon semiconductor substrate containing high concentration of oxygen, by selective polishing method, 0.1μm or less defect-free single crystal silicon thin film SOI region Can be formed, and it is possible to realize an MIS or MOS element in which the kink phenomenon does not occur and the switching speed is high.

[Brief description of the drawings]

1a to 1f are sectional views showing an embodiment of the present invention in the order of steps. DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Recess 3 ... Insulating film 4 ... Polycrystalline silicon film 5 ... Base 6 ... Defect nuclei 7 ... Final polished surface 8 ... SOI region 9 ... SOI region thickness 10a: Source region 10b: Drain region

Claims (1)

(57) [Claims] A step of forming a concave portion on a first surface of a single crystal silicon semiconductor substrate containing an impurity to be a defect nucleus; and a step of forming an insulating film on the first surface of the semiconductor substrate. Bonding a base to a first surface of the semiconductor substrate, performing a gettering process on the semiconductor substrate, and polishing a second surface of the semiconductor substrate to a surface where the insulating film is exposed. A method for manufacturing a semiconductor device comprising: