JP2809647B2 - Differential amplifier - Google Patents

Description

The present invention relates to a differential amplifier, and more particularly, to a differential amplifier suitable for a class B amplifier or a current source for controlling a voltage controlled oscillator.

(Prior Art) FIG. 2 shows a general voltage controlled oscillator (hereinafter referred to as VCO).
FIG. 3 is a block diagram showing the configuration of FIG.

A frequency selection element 3 such as a quartz oscillator is connected to an input terminal 2 of the oscillator 1. The oscillator 1 is a frequency selection element 3
Oscillates at a frequency based on
It is output to the phase shifter 4 and the vector synthesizer 5. The 90-degree phase shifter 4 generates a signal obtained by shifting the input signal by 90 degrees, and outputs the signal to the vector synthesizer 5. A control voltage is introduced into the vector synthesizer 5, the vector synthesizer 5 adjusts the amplitude of the signal based on the control voltage, adds the signal to the oscillation signal of the oscillator 1, and feeds back the signal to the oscillator 1. Therefore, the phase of the feedback signal changes based on the control voltage. Due to the phase characteristics of the frequency selection element 3, the oscillation frequency of the oscillator 1 changes so as to cancel the phase difference between the feedback signal and the signal. Thus, in the VCO, the oscillation frequency of the oscillator 1 is controlled by the control voltage.

FIG. 3 is a circuit diagram showing a specific configuration of the vector synthesizer 5.

Transistors Q1 and Q2 constitute a differential amplifier circuit,
A signal from the oscillator 1 is introduced into the base of the transistor Q1. The emitters of the commonly connected transistors Q1 and Q2 are connected to a reference potential point via a current source 8,
A bias is supplied to the base of Q2. The collector of the transistor Q1 is connected to the power supply terminal 6, and the collector of the transistor Q2 is connected to the output terminal 7. Output terminal 7 and power terminal 6
, A load resistor RL is connected between them, and the signal is amplified by the transistors Q1 and Q2 and led out to the output terminal 7.

On the other hand, transistors Q3 to Q6 forming a differential amplifier circuit
Is for amplifying the signal. The emitters of the transistors Q3 and Q4 forming a differential pair are commonly connected, and are connected via a current source 9 to a reference potential point. The collector of the transistor Q3 is connected to the power supply terminal 6, and a bias is supplied to the base. Introduce a signal to the base of transistor Q4,
The collector is connected to the output terminal 7. Transistor
From the collector of Q4, it is possible to derive a reverse phase signal of the signal input to the base at a level based on the current I1 of the current source 9.

Also, transistors Q5 and Q5 forming a differential pair connected in common
The emitter of 6 is connected to the reference potential point via the current source 10,
A signal is introduced to the base of the transistor Q5, and the collector is connected to the power supply terminal 6. A bias is supplied to the base of the transistor Q6, and the collector is connected to the output terminal 7. A signal having the same phase as that of the signal at the level based on the current I2 of the current source 10 is led out to the output terminal 7 from the collector of the transistor Q6. Thus, the transistor
The signals appearing at the collectors of Q2, Q4, and Q6, and the signals having the opposite phase and the same phase can be derived from the output terminal 7.

The currents I1, I2 of the current sources 9, 10 change on the basis of the control voltage. For example, assuming that the current I1 and the current I2 are equal, the opposite-phase and in-phase signals appearing at the collectors of the transistors Q4 and Q6 cancel each other, and a signal appears at the output terminal 7. In this case, the feedback signal to the oscillator 1 shown in FIG. 2 becomes a signal, and the oscillation frequency of the oscillator 1 does not change. It is assumed that only the current I1 flows among the currents I1 and I2. In this case, an inverted signal of the signal appears at the collector of the transistor Q4, and the signal and the inverted signal appear at the output terminal 7. This composite signal is
When the level of I1 changes and the amplitude of the signal changes, the phase changes. As described above, by changing the currents I1 and I2 of the current sources 9 and 10 based on the control voltage,
The phase of the feedback signal fed back to the oscillator 1 can be changed.

Generally, when the control voltage is 0, the VCO operates at the free-run frequency. Therefore, when the control voltage is 0, the currents I1 and I2 are set to be equal. In order to reduce the drift of the free-run frequency, a current source in which the currents I1 and I2 become 0 when the control voltage is 0 is adopted.

FIG. 4 is a circuit diagram showing a conventional differential amplifier constituting such a current source.

The emitters of the transistors Q7 to Q10 constituting the differential amplifier circuit are commonly connected and connected to the power supply terminal 11 via the bias current source I. The control voltage Vi having the same polarity as the control voltage Vi is applied to the bases of the transistors Q7 and Q8 from the control voltage input terminal 12.
⁺ , And a control voltage Vi ⁻ having a polarity opposite to that of the control voltage Vi is introduced from the control voltage input terminal 13 to the bases of the transistors Q9 and Q10.

The collector current of transistor Q7 is
Flows through the collector-emitter path and the resistor R1 to the reference potential point, or flows through the diode D1 and the resistor R2 to the reference potential point. The collector current of the transistor Q9 flows to the reference potential point via the diode D2 and the resistor R3. The transistor Q11, the diode D2 and the resistors R1 and R3 form a current mirror circuit. Therefore, transistors Q7, Q
The difference between the nine collector currents flows through the diode D1. The multi-emitter transistor Q12 forms a current mirror circuit with the diode D1, and the collector and the transistor of the transistor Q12 connected between the output terminal 14 and the reference potential point.
A current, which is the difference between the collector currents of the transistors Q7 and Q9, is n times larger and flows through the emitter path and the resistor R4. This current corresponds to the current I1 in FIG. 3, and the output terminal 14 is connected to transistors Q3 and Q3.
4 connected to the emitter.

Similarly, transistor Q13, diode D3 and resistor R5,
R6 forms a current mirror circuit, and the multi-emitter transistor Q14, diode D4, and resistors R7 and R8 also form a current mirror circuit. The collector current of the transistor Q8 flows to the reference potential point via the diode D3 and the resistor R5.
A current equal to the collector current of the transistor Q8 flows through the collector-emitter path of the transistor Q13 and the resistor R6,
The difference between the collector currents of the transistors Q8 and Q10 flows through the diode D4 and the resistor R7. Further, the current of this difference flows through the collector-emitter path of the transistor Q14 and the resistor R8 connected between the output terminal 15 and the reference potential point by n times. The current flowing through the output terminal 15 corresponds to the current I2 in FIG.

Now, it is assumed that the control voltage Vi is 0. In this case,
If the characteristics of the transistors Q7 to Q10 are the same, the collector currents of the transistors Q7 to Q10 are all the same. Therefore, no current flows through the diodes D1 and D4, and the current I
1 and I2 are both 0.

If the control voltage Vi is negative, the transistors Q7 and Q8 are turned on, and the transistors Q9 and Q10 are turned off. Therefore, the transistor Q11 is cut off, and the collector current of the transistor Q7 flows to the diode D1. This current is multiplied by n, and a current I1 is output from the output terminal 14. On the other hand, since the transistor Q13 is saturated and the diode D4 is cut off, the current I2 is zero.

FIG. 5 is a graph showing the characteristics of the conventional differential amplifier, with the control voltage Vi on the horizontal axis and the currents I1 and I2 on the vertical axis.

As shown in FIG. 5, when the control voltage Vi is negative, the current I2 is substantially zero since the diode D4 is cut off.
When the control voltage Vi becomes positive, it changes based on the level of the control voltage Vi. Conversely, the current I1 changes based on the level of the control voltage Vi when the control voltage Vi is negative, and is approximately 0 when the control voltage Vi is positive because the diode D1 is cut off.

Thus, when the control voltage Vi is 0, the currents I1, I2
Are substantially zero, and because the control voltage Vi is positive or negative, only one of the currents I1 and I2 flows and changes. It is suitable.

However, since the current path is cut off by saturating the transistor and only one of the currents I1 and I2 flows, the operation speed is extremely slow due to the accumulated charge of the transistor, and the control voltage with a high frequency is not applied. There was a problem that they could not respond. Furthermore,
There is a problem that the circuit configuration is relatively complicated, the number of elements is large, and a large occupied area is required when integrated circuits are used, and the cost is high.

(Problems to be Solved by the Invention) As described above, in the above-described conventional differential amplifier,
There is a problem that the operation speed is slow and the circuit is complicated, resulting in an increase in size and a high cost.

The present invention has been made in view of such a problem, and has as its object to provide a differential amplifier that can be configured at low cost and that can increase the operation speed.

[Constitution of the Invention] (Means for Solving the Problems) The present invention comprises a first and a second transistor which constitute a differential amplifier circuit and have positive and negative control voltages introduced to a base, respectively. A current source for supplying a bias current to a common emitter of the first and second transistors; a third and fourth transistor having a base connected in common and respective emitters connected to a reference potential point; First and second transistors respectively connected between each collector of the second transistor and each collector of the third and fourth transistors.
And third and fourth resistors respectively connected between the collectors of the first and second transistors and the common base of the third and fourth transistors, and the third and fourth resistors. And a first and second voltage-current conversion circuit for flowing a current based on the collector potential of the transistor to the first and second output terminals.

(Operation) In the present invention, mutually equal currents flow through the collectors of the third and fourth transistors. When one of the first and second transistors is turned off, a half of the bias current supplied from the current source is supplied to the third or fourth transistor via the third and fourth resistors. Flow to the collector. Since the base potentials of the third and fourth transistors are equal and the connection point of the third and fourth resistors is connected to the common base of the third and fourth transistors,
And the collector potential of the fourth transistor is the first to fourth
Is based on the resistance value of the resistor. Therefore, if the first and second voltage-current converters convert the third and fourth collector potentials into currents and supply them to the first and second output terminals, respectively, for example, the positive or negative polarity of the control voltage Based on the first
Alternatively, a current corresponding to the level of the control voltage can be supplied to only one of the second output terminals.

Hereinafter, the present invention will be described in detail with reference to the drawings. First
FIG. 1 is a circuit diagram showing one embodiment of the differential amplifier according to the present invention. In FIG. 1, the same components as those in FIG. 4 are denoted by the same reference numerals.

The emitter of the transistor Q15, Q16 constituting the differential amplifier circuit are commonly connected, it is connected to the power supply terminal 11 via a bias current source I flowing a bias current I _B. Control voltage Vi
The control voltage Vi ⁺ having the same polarity as the above is supplied to the base of the transistor Q15 via the control voltage input terminal 12. Transistor Q
The collector of 15 is resistor R10 and the collector of transistor Q17
Connected to the reference potential point via the emitter path and the resistor R11,
The connection point between the resistor R10 and the collector of the transistor Q17 is connected to the base of the transistor Q18. The emitter of the transistor Q18 is connected to the reference potential point via the resistor R12, and the collector is connected to the output terminal 14.

On the other hand, a control voltage Vi ^{− having a} polarity opposite to that of the control voltage Vi is supplied to the base of the transistor Q16 via the control voltage input terminal 13. The collector of the transistor Q16 is connected to the reference potential point via the resistor R13, the collector-emitter path of the transistor Q19 and the resistor R14. The connection point between the resistor R13 and the collector of the transistor Q19 is connected to the base of the transistor Q20,
The collector of the transistor Q20 is connected to the output terminal 15, and the emitter is connected to the reference potential point via the resistor R15.

Resistors R16 and R are connected between the collectors of transistors Q15 and Q16.
17 are connected, and the connection point of the resistors R16 and R17 is commonly connected to the bases of the transistors Q17 and Q19. Resistance R10 to R1
The resistance value of 7 is set to R10 = R13, R11 = R14, R12 = R15, R16 = R17.

Next, the operation of the thus configured embodiment circuit will be described.

Now, assuming that the control voltage Vi is 0, the transistor
Q15, the collector current of Q16 is equal, both the current I _B / 2. If the characteristics of the transistors Q17 and Q19 are the same, the current flowing through the collector-emitter path is also equal to the current I _B / 2
Therefore, no current flows through the resistors R16 and R17.

Assuming that the base-emitter voltage of the forward-biased transistor is V _F , the base potentials V18, V20 (= V _B ) of the transistors Q18, Q20 are values obtained by the following equation (1).

Is set to _{R13> R14, V B <V} F becomes, the transistors
Q18 and Q20 are cut off, and no current flows through the output terminals 14 and 15.

Next, it is assumed that a positive control voltage Vi is introduced to the input terminals 12 and 13. In this case, the transistor Q15 turns off and the transistor Q16 turns on. The collector current of the transistor Q16 is I _B. Collector of transistors Q17 and Q19
Since the currents flowing in the emitter paths are equal, the transistor Q1
1/2 of the collector current I _B of 6 flows through the resistor R17, R16, R10 to the collector of the transistor Q17, the transistor Q17, Q19
The collector current flows in the I _B / 2. Therefore, the base potential V20 of the transistor Q20 has a value obtained by the following equation (2).

The base potential V18 of the transistor Q18 is Becomes Thus, <it is set to R17, the above equation (2), V20> (R13 -R14) is V _F, and the transistor Q20 is turned on, current flows through the output terminal 15 I2 is Becomes The R10> R11, is set to (R10-R11) <R16, V18 <V F , and the transistor Q18 has no current flows to the output terminal 14 in the cut-off.

When a negative control voltage Vi is introduced to the input terminals 12 and 13, no current flows to the output terminal 15 and the output terminal 14
Obviously, only the current I1 flows.

As described above, in the present embodiment, the current gain, which is conventionally n times, can be easily set by appropriately setting the resistance values R10 to R17. The same applies to the cutoff level. The output currents I1 and I2 are obtained without saturating the transistors Q18 and Q20, and the operation speed is significantly improved as compared with the conventional case. Further, in the conventional example shown in FIG. 4, eight transistors Q7 to Q14, four diodes D1 to D4, and eight resistors R1 to R8 are required.
In the embodiment, the circuit can be constituted by six transistors Q15 to Q20 and eight resistors R10 to R17, and the circuit can be constituted with a small chip area by reducing the number of elements, thereby contributing to cost reduction.

[Effects of the Invention] As described above, according to the present invention, the operation speed can be remarkably improved, and the number of elements can be reduced, so that the configuration can be realized at low cost.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of a differential amplifier according to the present invention, FIG. 2 is a circuit diagram showing a voltage controlled oscillator, FIG. 3 is a circuit diagram showing a vector synthesizer, and FIG. FIG. 5 is a circuit diagram showing the differential amplifier, and FIG. 5 is a graph for explaining the operation of the conventional differential amplifier. 12, 13: Control voltage input terminal, 14, 15: Output terminal, I: Bias current source, Q15 to Q20: Transistor, R10 to R17: Resistance.

Claims (1)

(57) [Claims] 1. A first and a second transistor which constitute a differential amplifier circuit and have positive and negative control voltages introduced to a base, respectively, and a bias current is applied to a common emitter of the first and second transistors. A third source and a fourth source, the bases of which are connected in common, and the respective emitters connected to a reference potential point; the collectors of the first and second transistors; and the third and fourth transistors A first and a second resistor respectively connected between the respective collectors of the fourth and fourth transistors, and between the respective collectors of the first and second transistors and a common base of the third and fourth transistors. Third and fourth resistors respectively connected thereto, and first and second voltage-current converters for flowing currents based on the collector potentials of the third and fourth transistors to first and second output terminals. Ingredient Differential amplifier, characterized in that the.