JP2817899B2 - Information playback device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information reproducing apparatus for reproducing information recorded on an information recording medium, and more particularly to an information reproducing apparatus for reproducing information recorded by a pit edge recording method. Things.

[Related Art] Conventionally, when reproducing information recorded by pit edge recording, there is a method of differentiating a reproduced signal twice and detecting a zero-cross point of the differentiated signal to binarize the reproduced signal. Further, as shown in FIG. 3, a method of performing a waveform shaping process on a reproduced signal using a waveform shaping circuit 30 such as a high-pass filter and then binarizing the reproduced signal by comparing it with a predetermined slice level by a comparator 31. Is also known. FIG. 4 is a time chart showing the operation of the method shown in FIG. 3, and FIG. 4A shows a reproduced signal output from the waveform shaping circuit 30. This reproduced signal is compared with a predetermined slice level by a comparator 31, and as a result,
31 outputs a binary signal as shown in FIG. 4 (b).

[Problem to be Solved by the Invention] However, in the above-mentioned conventional example, when information is recorded on a recording medium by a magnetic field modulation method, the shape of the recording pit becomes arrow-shaped. Therefore, the binarized reproduction signal shown in FIG. 4 (b) is shifted from the recording signal shown in FIG. 4 (c), and there is a problem that the recorded information cannot be accurately reproduced. FIG. 5 shows a reproduced signal waveform of an arrow-shaped recording pit obtained by computer simulation. In this simulation, the recording pit length was 0.82 to 2.41 μm
And a reproduction signal waveform was obtained for each recording pit. The horizontal axis is a value normalized by the period, and the vertical axis is an amplitude including a DC component. The zero point on the vertical axis indicates the point at which the magneto-optical signal (difference signal) becomes zero.

As is apparent from FIG. 5, it can be seen that the reproduced signals at the respective pit lengths do not intersect at the point where the magneto-optical signal becomes zero. Therefore, in the conventional binarizing circuit shown in FIG. 3, the binarized output and the recording signal are different even if the slice level is set to any level, which causes an increase in jitter and an error rate. There was a problem.

The present invention has been made to solve such a problem, and an object of the present invention is to provide an information reproducing apparatus capable of faithfully reproducing recorded information and greatly improving reliability.

[Means for Solving the Problems] An object of the present invention is to reproduce a pit recorded on an information recording medium, and to obtain an edge of the pit by a binarized signal obtained by binarizing an obtained reproduced signal. In an information reproducing apparatus for detecting a position, first comparing means for comparing the reproduced signal with a first slice level to detect an edge position corresponding to a front end of the pit; Level comparing means for detecting an edge position corresponding to the trailing end of the pit, and a first comparing means for comparing the edge positions corresponding to the leading ends of the first and second pits having different lengths from each other. The phase difference between the reference clock signal and the detection signal at the front end of the first pit is equal to the phase difference between the reference clock signal and the detection signal at the front end of the second pit. The first sly First level setting means for setting a threshold level, and detection of a front end of a pit when the first and second comparison means detect edge positions corresponding to a front end and a rear end of a pit having a predetermined length, respectively. And second level setting means for setting the second slice level so that a time difference between the signal and the detection signal at the rear end of the pit matches a time difference corresponding to the predetermined length. This is achieved by an information reproducing apparatus having the feature.

Examples Hereinafter, examples of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the information reproducing apparatus of the present invention.

In FIG. 1, reference numeral 1 denotes a high-pass filter (HPF) for cutting a DC component of a reproduced signal. This playback signal is
This is a signal obtained by irradiating a not-shown magneto-optical recording medium such as a magneto-optical disk with a reproducing light beam having a predetermined intensity, detecting the reflected light with a sensor, and further amplifying the detection signal with a preamplifier. Reference numeral 2 denotes a comparator for comparing the reproduced signal with the slice level to detect a leading edge position of the recording pit, and reference numeral 3 denotes a comparator for similarly detecting a trailing edge position of the recording pit. 4 and 5 are phase comparators, 4 compares the phase of the binary signal of the 3T pattern with the clock, and 5 compares the phase of the binary signal of the 4T pattern with the clock, and determines the phase difference. It is a circuit to detect. Here, T is the length of one cycle of the channel clock, and 3T
The pattern is a pit pattern recorded with a length of 3T, 4T
The pattern is a pit pattern similarly recorded with a length of 4T. These 3T and 4T pattern binarized signals are:
The signals are input to the corresponding phase comparators by the switching operation of the switch 15.

Reference numeral 6 denotes a 6T delay circuit that delays the output of the 3T phase comparator 4 by 6T, and 7 denotes a phase comparator that detects a phase difference between the output of the 6T delay circuit 6 and the output of the 4T phase comparator 5. A signal having a pulse width corresponding to the phase difference is output. Reference numeral 8 denotes a rising slice level determination circuit that varies the slice level of the comparator 2 according to the pulse width. Therefore, when binarizing the reproduced signal, the rising timing of the binarized signal corresponding to the front end of the recording pit is set by the rising slice level determination circuit 8.

9 is an inverter for inverting the output of the comparator 3;
Is a phase comparator for detecting the phase difference between the output of the inverter 9 and the clock. Reference numeral 11 denotes a 3T delay circuit that is delayed by 3T of the output of the phase comparator 10, and 12 denotes a phase comparator that detects a phase difference between the output of the 3T delay circuit 11 and the output of the 6T delay circuit 6. Reference numeral 13 denotes a falling slice level determination circuit that sets the slice level of the comparator 3 according to the phase difference detected by the phase comparator 12. Therefore, the falling timing of the binary signal corresponding to the trailing end of the recording pit is set by the falling slice level determination circuit 13. Reference numeral 14 denotes a D-type flip-flop circuit (hereinafter abbreviated as FF circuit) which receives the output signals of the comparators 2 and 3 and outputs a binary signal whose rising and falling are corrected.

Next, a specific operation of the present embodiment will be described with reference to a time chart shown in FIG.

FIG. 2A shows a reproduced signal read from a recording medium, and FIG. 2B shows a reference channel clock signal output from the control unit. The reproduction signal is a reproduction signal of a pattern in which 3T and 4T patterns are recorded alternately, and a 3T and 3T pattern reproduction signal is used to determine the fall of the binarized signal. In addition, a reproduction signal of a 3T pattern is used in determining the fall. Note that the reference channel clock signal 1
The period is T. The reproduced signal is output to the comparators 2 and 3 after the DC component is cut by the high-pass filter 1,
The clock is output to the 3T phase comparator 4 and the 4T phase comparator 5. Here, it is assumed that the rising slice level determination circuit 8 initially outputs 0 level to the comparator 2 as the slice level. As a result, a binary signal as shown in FIG. 2 (c) is output from the comparator 2.

The binarized signal is separated into a 3T pattern signal and a 4T pattern signal by the switch 15, and the corresponding phase comparator 4,
Entered into 5. In the 3T phase comparator 4, the 2T of the 3T pattern
The phase difference between the value signal and the clock is detected, and FIG.
A phase difference signal having a pulse width corresponding to the phase difference is output to the 6T delay circuit 6 as shown in FIG. 6T delay circuit 6
In order to compare the phase with the output of the 4T phase comparator 5, a signal obtained by delaying the input phase difference signal by 6T as shown in FIG. 2E is output. On the other hand, in the 4T phase comparator 5,
Detects the phase difference between the 4T pattern binary signal and the clock,
A signal having a pulse width corresponding to the phase difference is output as shown in FIG. These phase difference signals are output to a phase comparator 7, which outputs a phase difference signal having a pulse width corresponding to the phase difference between them to a rising slice level determination circuit 8, as shown in FIG. 2 (g). Accordingly, the rising slice level determination circuit 8 varies the slice level of the comparator 2 according to the pulse width. That is, in the rising slice level determination circuit 8, the slice level is set so that the output pulse width of the phase comparator 7 shown in FIG. 2 (g) becomes 0 or less than a predetermined value.

The setting of the rising slice level as described above is such that the phase difference between the rising detection signal of the 3T pattern and the clock is equal to the phase difference between the rising detection signal of the 4T pattern and the clock. This means that the rising slice level corresponding to the intersection of the reproduced signals of the pits having different lengths shown in FIG. 5 has been set. When the rising slice level is set in this manner, the phase difference between the clock and the rising detection signal becomes constant regardless of the pit length, and the edges of all the pits can be detected under the same condition.

When the setting of the rising slice level is completed, the setting of the falling slice level is performed. The slice level of 0 level is initially given to the comparator 3 as described above. The reproduction signal input to the comparator 3 is a 3T pattern reproduction signal. The signal binarized by the comparator 3 is inverted by the inverter 9 as shown in FIG. 2 (h), and then output to the phase comparator 10. The phase comparator 10 detects the phase difference between the output of the inverter 9 and the clock, and outputs a phase difference signal having a pulse width corresponding to the phase difference to the 3T delay circuit 11 as shown in FIG. The 3T delay circuit 11 outputs a signal obtained by delaying the output of the phase comparator 10 by 3T as shown in FIG. 2 (j) in order to compare the phase with the output of the 6T delay circuit 6. The phase comparator 12 detects the phase difference between these two signals, and outputs a phase difference signal having a pulse width corresponding to the phase difference to the falling slice level determination circuit 13 as shown in FIG. 2 (k). The falling slice level determination circuit 13 sets the slice level of the comparator 3 so that the phase difference of the phase comparator 12 becomes 0 or less than a predetermined value, as described above.

The setting of the falling slice level is such that the time difference between the rising detection signal of the 3T pattern and the falling detection signal of the 3T pattern becomes equal to 3T. As shown in FIG. 5, when normalized by the period, the reproduced signals of the pits having different lengths intersect at the rising and falling points. Therefore, when the slice level is set so that the time difference between the rise detection signal and the fall detection signal in the pits of a predetermined length matches the time difference corresponding to the predetermined length, the pits of all lengths On the other hand, edge detection can be performed under the same conditions.

As a result of setting the rising and falling slice levels in this way, as shown in FIGS. 2 (l) and (m), comparators 2 and 3 produce binary signals whose rising and falling positions have been corrected. Is output. The output of comparator 2 is FF circuit 14
And the output of the comparator 3 is input to the CL terminal of the FF circuit. Thus, the output of the FF circuit 14 is set at the rising edge of the comparator 2 and reset at the falling edge of the comparator 3 as shown in FIG. In the pit edge recording, the meaning of information is given to the edge position of the pit. Here, the rising edge of the comparator 2 and the falling edge of the comparator 3 each have information meaning. Therefore, the output of the FF circuit 14 is output to an information reproducing circuit (not shown) as a final binary signal in which the positions of the rising and falling edges have been corrected.

FIG. 2 (o) shows a recording signal when information is recorded on a recording medium. In the figure, the slice level setting time t ₁ at the falling edge is not performed,
There is a difference between the recording signal and the falling edge of the comparator 3. Becomes a time t _2, the finished set of the slice level falling, a state in which the rise and fall of the slice level is set to both the optimum value. Thus, the timing of the output signal of the FF circuit 14 is a recording signal and the final binary signal at time t ₂ is completely matched, it can be seen that the recording information is faithfully reproduced.

In the above embodiment, when setting the slice level of the comparator 2, 3T and 4T recording patterns are used, and in setting the slice level of the comparator 3, 3T and 4T are used.
The pattern is used. However, the present invention is not limited to this, and it is possible to set a recording pattern having two or more pit lengths when setting the rising slice level and a recording pattern having one or more pit lengths when setting the falling slice level. . Further, the rising slice level determining circuit 8 and the falling slice level determining circuit 13 set the slice level by using a signal having a pulse width corresponding to the phase difference. The output may be set by two outputs, ie, an output meaning + polarity and an output meaning -polarity.

[Effects of the Invention] As described above, according to the present invention, the slice level of the comparison means for detecting the edge position of a recording pit is set to an appropriate value at each of the front end and the rear end of the edge.
The edge position of the recording pit can be accurately detected, and the recorded information can be faithfully reproduced. Therefore, there is an effect that the reliability of the device can be greatly improved without increasing the jitter or the error rate.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an information reproducing apparatus according to the present invention, FIG. 2 is a time chart showing the operation of the embodiment, and FIG. 3 is a circuit for binarizing a reproduced signal in conventional pit edge recording. FIG. 4 is a time chart showing the operation of the binarization circuit, and FIG. 5 is a view showing a reproduced signal of an arrow-shaped recording pit obtained by computer simulation. 1: High-pass filter 2, 3: Comparator 4: 3T phase comparator, 5: 4T phase comparator 7, 10, 12: Phase comparator 8: Rising slice level decision circuit 13: Falling slice level decision circuit 14: FF circuit

Claims (1)

(57) [Claims] A pit recorded on an information recording medium is reproduced, and a binary signal obtained by binarizing an obtained reproduction signal is used.
In the information reproducing apparatus for detecting an edge position of the pit, a first signal for comparing the reproduced signal with a first slice level to detect an edge position corresponding to a front end of the pit is provided.
Comparing means for comparing the reproduced signal with a second slice level to detect an edge position corresponding to the trailing end of the pit; and first and second comparing means having different lengths from each other. When the edge position corresponding to the front end of the pit is detected by the first comparing means, the phase difference between the reference clock signal and the detection signal at the front end of the first pit is determined by the difference between the reference clock signal and the front end of the second pit. A first level setting means for setting the first slice level so as to be equal to a phase difference with the detection signal, and an edge position corresponding to a front end and a rear end of a pit having a predetermined length, respectively. And detecting the second slice so that the time difference between the detection signal at the front end of the pit and the detection signal at the rear end of the pit coincides with the time difference corresponding to the predetermined length. Set level The information reproducing apparatus is characterized in that a level setting means, the provided.