JP2825964B2 - Video signal enlargement device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an aspect ratio of 16: 9, corresponding to a case where a video signal of a letter box type, a Vista size, a cinema size, or the like having a screen lacking at the top and bottom is input. And a video signal magnifying device in a wide-screen television receiver.

2. Description of the Related Art In recent years, there are various types of digital video equipment practically used by digital signal processing technology using an image memory. Among them, a video signal enlargement device realized by a digital video effect (hereinafter, DVE) or the like as a special effect has been devised. For example, the Journal of the Institute of Television Engineers of Japan, 32, 6 (197
8) Pages 459-461.

Hereinafter, an example of the above-described conventional video signal enlarging device will be described with reference to FIG.

FIG. 8 shows a circuit configuration of a conventional video signal enlarging device. 8, reference numeral 101 denotes a video signal input terminal; 102, an A / D converter for video signals; 103, a field memory having a storage capacity for one screen; 104, a Y / C separation circuit;
5 is a vertical interpolation circuit for vertically expanding the luminance signal and chrominance signal output from the Y / C separation circuit 104, and 106 is a horizontal expansion circuit for the luminance signal and chrominance signal output from the vertical interpolation circuit. 107 is a video signal D / A converter, 108 is a video signal output terminal, 109 is a synchronous reproduction circuit that reproduces a horizontal / vertical synchronization signal from the video signal input from the input terminal 101, 110 is A control signal input terminal for controlling an enlargement ratio of a video signal input from the input terminal 101, and an expansion unit 111 receives an output signal of the synchronous reproduction circuit 109 and a control signal from the control signal input terminal 110 as input and expands the memory by controlling the memory. This is a control signal generation circuit that controls the rate.

Regarding the video signal enlargement device configured as described above,
The operation will be described below.

First, the video signal input to the video signal input terminal 101 is converted into a digital signal by the A / D converter 102, and the output is written to the field memory 103 for storing one screen. The video signal input to the video signal input terminal 101 is reproduced by the synchronous reproduction circuit 109 into a horizontal / vertical synchronization signal, which is then input to the control signal generator 111. In the control signal generation circuit 111, a memory control pulse corresponding to the enlargement ratio is input to the field memory 103 according to the control signal for the enlargement ratio of the video signal input from the control signal input terminal 110. That is, the data is written to the memory with the reference clock, and the data is slowly read in accordance with the enlargement at the time of reading, and input to the Y / C separation circuit 104 in the next stage. In the Y / C separation circuit 104, the signal is separated into a luminance signal and a chrominance signal by a comb filter, and the output is input to the vertical interpolation circuit 105. Also,
The vertical interpolation control pulse corresponding to the enlargement ratio is input to the vertical interpolation circuit 105 according to the control signal of the video signal enlargement ratio input from the control signal input terminal 110. In the vertical interpolation circuit 105, both the luminance signal and the chrominance signal are enlarged in the vertical direction, and the output is input to the horizontal enlargement circuit 106. In addition, a horizontal enlargement control pulse having the same magnification in the horizontal direction as the enlargement ratio in the vertical direction is input to the horizontal enlargement circuit 106 according to the control signal of the image signal enlargement ratio input from the control signal input terminal 110. In the horizontal enlargement circuit 106, both the luminance signal and the chrominance signal are enlarged in the horizontal direction.
The input video signal is input to the D / A converter 107, and the enlarged video signal is output to the video signal output terminal.

Problems to be Solved by the Invention In the above-mentioned conventional example, the demand for enlarging and displaying a part of an input video signal is satisfied, but in a wide TV receiver having an aspect ratio of 16: 9, the input video signal is Depending on the type of signal, for example, when the input video signal is a cinema size with an aspect ratio of 4: 3 (the aspect ratio of the video portion is 21: 9), if it is enlarged in the vertical direction so that the upper and lower masked signals disappear, Since the horizontal direction is also enlarged at the same magnification as the vertical direction, there is a problem that both ends of the image portion are missing, so that all information of the image cannot be displayed on the entire screen.

Means for Solving the Problems In order to solve the above problems, a video signal enlarging device of the present invention comprises: an A / D converter for converting a video signal input from a video signal input terminal into a digital signal; A Y / C separation circuit that separates the output of the converter from Y / C, a scan conversion circuit that scan-converts a luminance signal and a color signal of the output of the Y / C separation circuit, a luminance signal of the output of the scan conversion circuit, A field memory having a storage capacity of one screen for each color signal, a vertical interpolation circuit for vertically expanding a luminance signal and a color signal of the output of the field memory, and a variable vertical expansion ratio of the vertical interpolation circuit A control terminal capable of horizontally expanding the luminance signal and the chrominance signal of the output of the transition direct interpolation circuit in a horizontal direction at a constant magnification regardless of the vertical magnification of the vertical interpolation circuit, and performing double-speed conversion. An expansion circuit and the water It has a D / A converter connected to the output of the flattening circuit.

Effect of the Invention According to the above configuration, the present invention provides a wide-screen television having an aspect ratio of 16: 9 when a video signal having an aspect ratio of 4: 3 such as a letter box type, a Vista size, a cinema size, etc., in which a screen is not provided vertically, is input. The image information can be accurately displayed on the entire screen of the receiver without being enlarged without being lost.

Example Regarding a video signal enlargement device according to an embodiment of the present invention,
This will be described with reference to FIGS. 1 to 7.

FIG. 1 is a circuit block diagram of a video signal according to one embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a video signal input terminal, 2 denotes an A / D converter for converting a video signal input from the video signal input terminal 1 into a digital signal, and 3 denotes an output from the A / D converter 2 in Y. /
A Y / C separation circuit 4 for C separation, a scan conversion circuit 4 for scan conversion of a luminance signal and a chrominance signal output from the Y / C separation circuit 3,
Reference numeral 5 denotes a field memory having a capacity for storing one screen of the current line signal of the luminance signal output from the scan conversion circuit 4, and 6 denotes one of the interpolation line signals of the luminance signal output from the scan conversion circuit 4. A field memory having a capacity for storing a screen portion, a field memory having a capacity for storing one screen portion of a current line signal of a color signal output from the scan conversion circuit 4, and a field memory having a capacity for storing one screen portion. The field memory 9 has a capacity to store one screen of the interpolation line signal of the color signal which is the output of
A vertical interpolation circuit for expanding the current line signal of the luminance signal, the current line signal of the interpolation signal and the current line signal of the chrominance signal and the interpolation line signal outputted from 7, 8 in the vertical direction, and 10 is inputted from the video signal input terminal 1. A synchronous reproduction circuit for reproducing a horizontal / vertical synchronization signal from a video signal; 11, a control signal input terminal for controlling an enlargement ratio of a video signal input from a video signal input terminal 1; 12, an output signal of the synchronous reproduction circuit 10; A control signal generating circuit for inputting a control signal from a control signal input terminal 11 to control the field memories 5, 6, 7, 8 and to control the vertical interpolation circuit 9, and outputs a control signal from the vertical interpolation circuit 9 The current line signal of the luminance signal, the interpolation line signal, and the current line signal and the interpolation line signal of the chrominance signal expanded in the vertical direction are horizontally scaled at a certain magnification (independent of the vertical magnification). 14 is a D / A converter that converts the double-speed luminance signal and color signal output from the horizontal expansion circuit 13 into analog signals, and 15 is a D / A converter. Video signal output terminal connected to 14.

Regarding the video signal enlargement device configured as described above,
The operation will be described below.

The video signal input to the video signal input terminal 1 is input to the Y / C separation circuit 3 converted into a digital signal by the A / D converter 2. The Y / C separation circuit 3 is configured, for example, as shown in FIG. In FIG. 2, a motion detection circuit 25 detects motion information of a video signal input to an input terminal 21. The video signal input to the input terminal 21 is input to the frame comb filter 22 and the line comb filter 23,
Each color signal is separated and input to the changeover switch 24. Depending on the presence or absence of motion information detected by the motion detection circuit 25,
The changeover switch 24 is switched to separate the color signals and output to the output terminal 28. Further, the video signal input to the input terminal 21 and the color signal from the changeover switch 24 are input to the subtracter 26, where the luminance signal is separated and output to the output terminal 27.

The luminance signal and the chrominance signal output from the Y / C separation circuit 3 are input to the scan conversion circuit 4. For example, the scan conversion circuit 4
It is configured as shown in the figure. In FIG. 3, a video signal input to an input terminal 31 is output as a current line signal to an output terminal 32.
Output to In addition, the video signal input to the input terminal 31 is input to the field interpolation circuit 33 and the line interpolation circuit 34, where an interpolation signal is generated and input to the changeover switch 35. The motion detection circuit 37 detects motion information of the video signal input to the input terminal 31. Depending on the presence or absence of the motion information detected by the motion detection circuit 37, the changeover switch 35 is switched to create an interpolation signal, and the output terminal 36
Output to

The current line signal and the interpolation line signal of the luminance signal output from the scan conversion circuit 4 are written in the field memories 5 and 6, respectively. The current line signal and the interpolation line signal of the color signal output from the scan conversion circuit 4 are written in the field memories 7 and 8, respectively. Here, in order to enlarge the video signal in the vertical direction, the number of scanning lines must be increased. The conversion ratio of the number of scanning lines is 16: 9 for the aspect ratio of the image displayable portion, for example, if the input signal is a letterbox type signal, the original input signal has an aspect ratio of 4: 3.
Assuming that the aspect ratio of the horizontally long video part is 16: 9, to make the height of the video displayable part and the video signal equal, it is necessary to make 12 scanning lines from 9 scanning lines, and the conversion ratio is 4/9. Three
Double.

Such a scanning line conversion method will be described with reference to FIG. FIG. 4 is a diagram for explaining scanning line conversion. In FIG. 4, a circle in the left vertical column indicates a scanning line at the luminance signal current line signal output of the field memory 5 (color signal current line signal output of the field memory 7).
The numbers in parentheses in A indicate the number of the scanning line counted from the top. The circles in the vertical column at the center indicate scanning lines in the luminance signal interpolation line signal output of the field memory 6 (color signal interpolation line signal output in the field memory 8). Indicates the number from the beginning. A circle in the vertical column at the right end indicates a scanning line converted by the vertical interpolation circuit 9 and output from the vertical interpolation circuit 9.
The numbers in parentheses indicate the number of the scanning line counted from the top. In the vertical interpolation circuit 9, three of A and three of B total 6
We make from book to eight of C.

The vertical interpolation circuit 9 is configured, for example, as shown in FIG.
In FIG. 5, a changeover switch 60 switches a current line signal of a luminance signal (color signal) input to an input terminal 50 and an interpolation line signal of a luminance signal (color signal) input to an input terminal 51.
, And is switched every horizontal period (double speed). Also, changeover switch
The output of the line memory 52 for delaying the luminance signal (color signal) from one pixel 60 by one horizontal period (double speed) is input to the multiplier 55. Line memory that further delays one horizontal period (double speed)
The output of 53 is input to a multiplier 56. Also, input terminal 57
Line memories 52, 53 according to the vertical magnification input to
And the multiplication coefficients of the multipliers 54, 55, 56 are controlled, and the outputs of the multipliers 54, 55, 56 are input to the adder 58,
A luminance signal (color signal) corresponding to the vertical magnification is input to the changeover switch 59, and the current line signal of the luminance signal (color signal) is input to the input terminal 61 every one horizontal period (double speed), and the luminance signal (color signal) Is output to the output terminal 61. For example, the scanning line conversion formula of the vertical interpolation circuit 9 with a vertical magnification of 4/3 is as follows.

C (4n + 0) = 0.5 × A (3n + 0) + 0.5 × B (3n + 0) C (4n + 1) = 0.25 × A (3n + 1) + 0.75 × B (3n + 0) C (4n + 2) = 1.0 × A (3n + 1) C (4n + 3) = 0.25 × A (3n + 1) + 0.75 × B (3n + 1) C (4m + 0) = 0.5 × A (3n + 2) + 0.5 × B (3n + 1) C (4m + 1) = 0.75 × A (3n + 2) +0. 25 × B (3n + 2) C (4m + 2) = 1.0 × B (3n + 2) C (4m + 3) = 0.75 × A (3n + 0) + 0.25 × B (3n + 2) where m = n + 1. Hereinafter, this is repeated. For example, A (3n + 1) and B (3n +) of C (4n + 1)
0) is determined from the fact that the spatial positional relationship has a ratio of C (4n + 1) to A (3n + 1) 1 C (4n + 1) to B (3n + 1) 3.

In the above description, the spatial arrangement of the scanning lines has been mainly described. However, when actually configuring the circuit, the horizontal period at the output of the field memories 5 (7) and 6 (8) and the video signal Therefore, the memory control of the control signal generation circuit 12 requires some contrivance.

The memory control will be described with reference to FIG.
FIG. 6 is an operation waveform diagram of memory control in scanning line conversion.

In FIG. 6, waveform a is the output of the synchronous reproduction circuit 10,
This is a horizontal synchronization pulse. A waveform b is one of the output signals of the control signal generation circuit, and is an output enable of the field memories 5 (7) and 6 (8). When the output level is 1, reading of the field memories 5 (7) and 6 (8) is prohibited.
Waveforms c and d are output data of the field memories 5 (7) and 6 (8). The letters A and B () in the figure correspond to the numbers of the scanning lines used in FIG. The waveform e is an input enable of the line memory 52 of the vertical interpolation circuit 9. When the output level is 1, writing to the line memory 52 is stopped. The waveform f is output data of the line memory 52, the waveform g is output data of the line memory 53, and the waveform h is output data of the adder 58.

The operation of the memory control will be described below with reference to the above waveform diagrams. The output enable waveforms b of the field memories 5 (7) and 6 (8) have an output level of 1 over one horizontal period among the four horizontal periods. This has a vertical magnification of 4/3
When the magnification is changed, the field memory 5
The output enable waveforms b of (7) and 6 (8) change. During the corresponding period, the field memories 5 (7) and 6 (8)
The output data waveforms c and d are undefined as indicated by X in the figure and are input to the line memory 52. The input enable waveform e of the line memory 52 has an output level of one over one horizontal period of the four horizontal periods similarly to the waveform b. During the period corresponding to this, the writing to the line memory 52 is stopped, and in the next horizontal cycle, the same data output as the previous horizontal cycle is repeated. The output of the line memory 52 is an output data waveform f, and the output data waveform g of the line memory 53 is further delayed by one horizontal period (double speed).
Multiplier coefficient L of multiplier 54, multiplier coefficient K of multiplier 55 and multiplier
The multiplication coefficient J of 56 can be realized in the vertical direction by setting the multiplication coefficient according to the scanning line conversion formula explained in FIG.

The current line signal of the luminance signal, the interpolation line signal, and the current line signal and the interpolation line signal of the color signal output from the vertical interpolation circuit 9 are input to the horizontal enlargement circuit 13. The horizontal enlargement circuit 13 is composed of, for example, two line memories as shown in FIG. In FIG. 7, a current line signal of a luminance signal (color signal) input to an input terminal 71 is input to a line memory 73 having a storage capacity of at least one horizontal period, and a luminance signal (color signal) input to an input terminal 72 is input. The interpolation line signal of the color signal is input to the line memory 74 having a storage capacity of at least one horizontal period, and the output enable is used to reduce the data input by the reference clock to M times the reference clock regardless of the vertical magnification. By alternately reading at (constant value), enlargement in the horizontal direction and multiple conversion are performed. Here, M can be realized by setting a frequency lower than a clock for outputting a video signal having a normal aspect ratio of 4: 3, and setting such that both ends of the video portion are not applied even when the input video signal is enlarged. . In this embodiment, M = 3/4.

The double-speed luminance signal and color signal output from the horizontal enlargement circuit 13 are connected to a D / A converter 14 and an output terminal 15 outputs an analog double-speed luminance signal and color signal.

As described above, according to the present embodiment, the input video signal, even if the input of the upper and lower masked signal such as cinema size, in the wide TV receiver having an aspect ratio of 16: 9, the upper and lower of the video signal, It can be displayed accurately on the entire screen without missing the left and right.

Although the read clock of the horizontal enlargement circuit 13 is 3/4 times the reference clock, M may be any number as long as both ends of the video portion are set so as not to be cut off. If both ends of the video portion are not missing, M may be set according to the vertical enlargement ratio, and M may be set to a constant value from where both ends of the video portion start to be missing.

Effects of the Invention As described above, according to the present invention, an A / D converter that converts a video signal input from a video signal input terminal into a digital signal, and Y / C separation of the output of the A / D converter A Y / C separation circuit, a field memory having a storage capacity of one screen for each of the luminance and chrominance signals of the output of the Y / C separation circuit, and a luminance signal and a chrominance signal of the output of the field memory are vertically expanded. A vertical interpolation circuit, a control terminal capable of changing the vertical magnification of the vertical interpolation circuit, and a luminance signal and a color signal output from the vertical interpolation circuit regardless of the vertical magnification of the vertical interpolation circuit. A letter box whose screen is lacking at the top and bottom by providing a horizontal enlargement circuit that enlarges in the horizontal direction at a constant enlargement rate and performs double-speed conversion, and a D / A converter connected to the output of the horizontal enlargement circuit Formula, Vista size, Cinema size, etc. When a video signal with an aspect ratio of 4: 3 is input, the image can be enlarged to the entire screen of a wide-screen television receiver with an aspect ratio of 16: 9 and displayed accurately without missing the video information section.

[Brief description of the drawings]

FIG. 1 is a block diagram of a vertical enlargement device according to an embodiment of the present invention, FIG. 2 is a block diagram of a Y / C separation circuit of FIG. 1,
FIG. 3 is a block diagram of the scan conversion circuit of FIG. 1, FIG. 4 is a horizontal view showing scan line conversion of the vertical interpolation circuit of FIG. 1, and FIG. 5 is a vertical interpolation circuit of FIG. FIG. 6 is an operation waveform diagram showing scanning line conversion of the vertical interpolation circuit of FIG. 1,
FIG. 7 is a block diagram of the horizontal enlargement circuit of FIG. 1, and FIG. 8 is a block diagram of a conventional vertical enlargement device. 1 ... Video signal input terminal, 2 ... A / D converter, 3 ... Y / C
Separation circuit, 4 ... Scan conversion circuit, 5, 6, 7, 8 ... Field memory, 9 ... Vertical interpolation circuit, 10 ... Synchronous reproduction circuit,
11 Control signal input terminal, 12 Control signal generation circuit, 13 Horizontal enlargement circuit, 14 D / A converter, 15
Video signal output terminal.

Claims (1)

(57) [Claims] A video signal input terminal, an A / D converter for converting a video signal input from the video signal input terminal into a digital signal, and a Y / C separating an output of the A / D converter. / C separation circuit, a scan conversion circuit that scan-converts the luminance signal and color signal of the output of the Y / C separation circuit, and the storage capacity of one screen each of the luminance signal and the color signal of the output of the scan conversion circuit. A field memory having the same, a vertical interpolation circuit for vertically expanding a luminance signal and a chrominance signal output from the field memory, a control terminal capable of changing a vertical expansion ratio of the vertical interpolation circuit, and the vertical interpolation circuit A horizontal enlargement circuit that enlarges the luminance signal and the color signal of the output in the horizontal direction at a constant enlargement ratio regardless of the vertical enlargement ratio of the vertical interpolation circuit, and performs double-speed conversion, and is connected to the output of the horizontal enlargement circuit. D / A converter For example was the video signal magnifying device.