JP2828036B2 - Decoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device, and more particularly to a decoding device in a terrestrial distance measuring device.

[0002]

2. Description of the Related Art A distance measuring device (DME: distance measu)
ring equipment) is a secondary radar system composed of an onboard device mounted on an aircraft and a ground station. A ground station (hereinafter referred to as a terrestrial DME device) receives an interrogation pulse from an aircraft and decodes it with a decoding device. Decode and send the response pulse to the aircraft again after a certain delay. The on-board device receives the response pulse, measures the time from transmission of the inquiry pulse to reception of the response pulse, and calculates the distance from the ground DME device by a predetermined formula based on the time.

The terrestrial DME device transmits a response pulse as described above when an inquiry pulse is received. However, even when an inquiry pulse is not received, a random response pulse having an average of 700 pulses or more per second may be generated. Mandatory. This random response pulse is called a squitter pulse, and it is important that the random response pulse is generated randomly in order to minimize the correlation with the inquiry pulse from the aircraft. For this reason, a decoding device that receives, decodes, and uses the thermal noise of the receiver simultaneously with the interrogation pulse is used in the terrestrial DME device.

Such a decoding device combines automatic threshold control and pulse width classification in order to determine a received pulse. As a conventional decoding circuit, a circuit for shaping an input signal into a digital pulse using a threshold adjusted on the basis of a pulse peak and then extracting a signal having a pulse width within a certain allowable value (see Japanese Patent Application Laid-Open No. Hei 5 - 72880 JP) and, such as a circuit for taking out a predetermined pulse width or more pulses from the shaped pulse groups (JP-a-5-196733) are known.

FIG. 3 is a circuit diagram of an example of a conventional decoding apparatus, and FIGS. 4A and 4B are time charts for explaining the operation at the time of normal setting and at the time of multipath setting in FIG. 3, respectively. As shown in FIG. 3, the decoding circuit 101 includes a switch 102, a multivibrator 103, a delay unit 104,
And an AND gate 105.

First, the operation at the time of normal setting will be described. At this time, the switch 102 is connected to the terminal 102a. The pulse 108 shaped via the input terminal 100 is applied to the monostable multivibrator 103,
As a result, a pulse 109 having a fixed width as shown in FIG. The pulse 109 whose waveform has been shaped is delayed by a predetermined delay amount by the delay means 104 to become a delay pulse indicated by 110 in FIG.
The signal is supplied to one input terminal of the ND gate 105, and is supplied to the two-input AND gate 105 via the switch 102.
Is input to the other input terminal without delay.

Assuming that the delay amount of the delay means 104 is α, A
As shown by 112 in FIG. 4A, the output pulse of the ND gate 105 decodes a pulse train having a pulse interval of α in the pulse 109 whose waveform is shaped.

The decoding circuit 101 decodes the interrogation pulse from the aircraft, and decodes only the interrogation pulse indicated by 115 in FIG. 4A as indicated by 117 in FIG. The output pulse 112 of the decode circuit 101 includes a pulse 117 resulting from the receiver noise in addition to the pulse 117 obtained by decoding the interrogation pulse. ) Is decoded as shown at 116.

The output pulse 112 of the decoding circuit 101
Is supplied to the system delay time generation means 107 through the reception pause means 106, where it is output as a response pulse 113 after being delayed by a predetermined time determined by the system. Note that the reception suspending unit 106 is a unit for not accepting a pulse input within a predetermined time interval.

In the case of a terrestrial DME device, the number of pulses decoded with respect to the number of pulses caused by input receiver noise is about 1/30 times per unit time.
Therefore, when the number of squitter pulses of the DME is set to “700”, the number of pulses (hereinafter referred to as “single noise pulse”) due to the receiver noise is about 21,000 pulses per second on average.

On the other hand, the interrogation pulse from the aircraft is a paired pulse having a predetermined interval. However, the pulse width is widened and sometimes deformed into a single pulse due to multipath due to the terrain and the building. In order to decode this pulse, the switch 102 may be switched to the terminal 102b side (multipath setting). in this case,
Input pulse 108 of monostable multivibrator 103,
Output pulse 109, output delay pulse 1 of delay means 104
10 is as shown in FIG. 4B, and the AND gate 10
Numeral 5 outputs a pulse indicated by 112 in FIG. 4B by calculating the logical product of the input pulse 108 and the delay pulse 110.

When the delay amount α is relatively short, the AND gate 105 can normally decode a pulse having a pulse width larger than α even if the input pulse 108 is not a pair pulse, and can perform reception processing in a multipath environment.

[0013]

However, in the above conventional decoding apparatus, when the delay amount α of the delay means 104 is long, the single noise pulse existing before the original interrogation signal and the multipath portion of the interrogation signal are decoded. Therefore, the probability that an inconvenient decode pulse as shown by 118 in FIG. 4B appears before the original decode pulse increases, and there is a defect that the prescribed response rate cannot be satisfied.

If an inconvenient decode pulse 118 occurs immediately before a valid decode pulse 117, the reception pause time means 106 and the system delay time generation means 10 shown in FIG.
7, the effective decode pulse 117 is supplied to the system delay time generating means 107 as shown by 113 in FIG.
Output.

Now, assuming that the number of single pulses generated per second is Ns, the probability Pu that an undesired decode pulse is generated is Pu = α × Ns (1), and the probability Pd that an effective decode pulse is generated is Pd = 1−α × Ns (2) In the case of the X mode using an interrogation pulse with a pulse interval of 12 μs, if α = 12 μs and Ns = 21000, Pd = 0.748, which can satisfy the specified 0.7. However, in the case of the Y mode using an interrogation pulse with a pulse interval of 36 μs, α = 36 μs and Ns = 21
Since it is 000, Pd = 0.244, which is much lower than the specified value 0.7.

[0018] When applying the discrimination circuit of JP-5-72880 and JP 5-196733, JP-only passes pulses of tolerance, to process a narrow single noise pulse of a pulse width It was not possible to simultaneously reduce unnecessary decoding and generate a squitter pulse.

The present invention has been made in view of the above points,
An object is to provide a decoding device that can improve response efficiency in an environment including multipath.

[0018]

According to the present invention, in order to achieve the above object, a first pulse having a predetermined pulse interval and a constant pulse width, and a pulse interval and a pulse width caused by noise are indefinite. Is input, and a third pulse having a constant width is synchronized with each pulse of the pulse train.
A first pulse generating circuit for generating a pulse, and a third pulse generating circuit.
Delay time equal to the predetermined pulse interval.
One delay means, at least a third pulse and a first delay
From the output pulse of the
Output the first decode pulse obtained by decoding the pulse
A first decoding circuit including a first gate means , a pulse train, and a pulse obtained by extracting a pulse having a width equal to or more than a predetermined pulse width from the input pulse train, and a predetermined pulse from the input pulse train A second decoding circuit that decodes pulses at pulse intervals and outputs a second decode pulse; a gate circuit that outputs first and second decode pulses, respectively; Pulse output means for receiving only an input pulse and outputting it after a predetermined time delay, and the pulse output means
And reset means for resetting based on the second decode pulse.

According to the present invention, there is provided a pulse output means for receiving only a pulse input at a predetermined interval or more from among output pulses of a gate circuit for outputting the first and second decode pulses and delaying the output for a predetermined time. , Based on the second decode pulse, and start the operation from the reset point. Therefore, the operation of the pulse output means due to the inconvenient decode pulse output from the first decode circuit is ignored because it is returned to the initial state by the above-mentioned reset, and the effective output from the second decode circuit is ignored. The second decode pulse is input to the pulse output means.

[0020]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a decoding circuit according to an embodiment of the present invention. 3, the same components as those of FIG. 3 are denoted by the same reference numerals, and the description thereof will be omitted. In FIG. 1, a decoding device 10 according to this embodiment
Is provided in the first decoding circuit 101 having the same circuit configuration as the conventional one shown in FIG.
In this configuration, a gate 131 and a reset unit 132 are added. Further, the reception suspending means 106 and the system delay time generating means 107 constitute a pulse output means for receiving only pulses input at a predetermined interval or more among the output pulses of the OR gate 131, and delaying and outputting the pulses for a predetermined time. I have.

The second decoding circuit 121 has an input terminal 1
00, a pulse width determination means 122 cascaded to
Monostable multivibrator 123 and delay means 124
And the output signal 203 of the delay means 124 and the input pulse 10
It is composed of a two-input AND gate 125 to which 8 is input, and supplies its output pulse 204 to the OR circuit 131 and the reset means 132, respectively.

Next, the operation of this embodiment will be described with reference to the time chart of FIG. The input pulse 108 shown in FIG. 2 input from a receiver (not shown) via the input terminal 100 is supplied to the first decoding circuit 101 and also supplied to the pulse width determination means 122 in the second decoding circuit 121. Is done. Pulse width determination means 122
Removes a pulse whose pulse width is smaller than a predetermined value (a value slightly smaller than the pulse width of a normal interrogation pulse) from the input pulse 108, and passes only a pulse having a pulse width wider than the predetermined value.

As a result, as shown by 201 in FIG. 2, most of the single noise pulse 114 is removed from the input pulse 108 from the pulse width determination means 122, and a pulse having a pulse width equal to or more than a predetermined value is extracted. The signal is supplied to the next-stage monostable multivibrator 123, which is triggered by its rising edge, shaped into a pulse having a constant pulse width as shown by 202 in FIG.
Supplied to

The delay means 124 receives the input pulse 202
, A delay pulse equal to the pulse space interval α is given, and a delay pulse indicated by 203 in FIG. 2 is supplied to one input terminal of a two-input AND gate 125, where two inputs A
An AND operation is performed on the input pulse 108 supplied to the other input terminal of the ND gate 125. As a result, the AND gate 125 outputs a pulse obtained by decoding a paired pulse having a pulse space interval α or a single pulse having a pulse width exceeding the pulse space interval α.

In the case of a paired pulse, the allowable value of the decoding process for the pulse space is determined by the pulse width set in the monostable multivibrator 123. That is, when the pulse width set in the monostable multivibrator 123 is 1 μs, a pair pulse having an interval of α ± 1 μs is decoded.

In the example shown in FIG. 2, the input pulse 108 includes an interrogation pulse 115a with a multipath, which is a single pulse having a pulse width exceeding the pulse space interval α. Is
As indicated by reference numeral 204 in FIG. 2, a pulse 1 obtained by decoding a single pulse having a pulse width exceeding the pulse space interval α.
19 is output.

On the other hand, as described with reference to FIG. 3, the output pulse of the first decoding circuit 101 outputs an ineffective decode pulse 118 together with an effective decode pulse 117 as shown at 112 in FIG. The output pulse of the first decoding circuit 101 is ORed with the output pulse 204 of the second decoding circuit 121 by the OR gate 131 and input to the reception suspending means 106. Once the signal is input to the reception suspending means 106, the reception suspending means 106 continues until the processing of the system delay time generating means 107 ends.
Thus, a new input to the system delay time generating means 107 is blocked.

At the same time, the output pulse 204 of the second decoding circuit 121 is also supplied to the reset means 132, and a reset pulse is generated at its rising edge. The generating means 107 is returned to the initial state.

Here, the decode pulse 119 output from the second decode circuit 121 is the same as the effective decode pulse 1 output from the first decode circuit 101.
17 and is input to the reception suspending means 106 through the OR gate 131, while the input blocking operation of the reception suspending means 106 and the system delay time generating means 107 for a predetermined time from the reset point of the rising edge of the decode pulse 119. Starts the delay time generation operation.

Therefore, the operations of the reception suspending means 106 and the system delay time generating means 107 caused by the inconvenient decoding pulse 118 output from the first decoding circuit 101 are ignored because they are returned to the initial state by the above-mentioned resetting. In addition, since the effective decode pulse 119 output from the second decode circuit 121 is input to the reception suspending means 106 through the OR gate 131, the squitter is output from the system delay time generating means 107 as shown by 113 in FIG. Only the pulse delayed by time τ in synchronization with the effective decode pulse 119 together with the pulse 116 is output. Since the decode pulse 119 is not suppressed in any other way, when the number of inquiry pulses from the aircraft is small, a response efficiency almost 100% can be obtained. This feature increases as the pulse interval to be decoded increases.

[0031]

As described above, according to the present invention,
The operation of the pulse output means due to an inconvenient decode pulse output from the first decode circuit is ignored because it is returned to the initial state by the above-described reset, and the valid second output from the second decode circuit is ignored. Is input to the pulse output means, it is possible to output an effective decode pulse by removing the influence of an inconvenient decode pulse caused by a pulse accompanied by multipath, and thus to reduce the multipath. It is possible to improve the response efficiency in an environment including the above, and is suitable for application to a DME system.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a time chart for explaining the operation of FIG. 1;

FIG. 3 is a circuit diagram of a conventional example.

FIG. 4 is a time chart for explaining the operation of FIG. 3;

[Explanation of symbols]

 Reference Signs List 10 decoding device 100 input terminal 101 first decoding circuit 102 switch 103, 123 monostable multivibrator 104, 124 delay means 105, 125 two-input AND gate 106 reception pause means 107 system delay time generation means 114 single noise pulse 115 interrogation pulse 115a Interrogation pulse with multipath 116 Squitter pulse 117 Effective decode pulse 118 Inconvenient decode pulse 121 Second decode circuit 122 Pulse width determination means 131 Two-input OR gate 132 Reset means

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G01S 7/00-7/42 G01S 13/00-13/95

Claims (3)

(57) [Claims] 1. A pulse train composed of a first pulse having a predetermined pulse interval and a constant pulse width and a second pulse having a pulse interval and a pulse width indefinite due to noise are input, and the pulse train of the pulse train is input . Synchronous with each pulse
A first pulse generating circuit for generating a third pulse;
Pulse for a time equal to the predetermined pulse interval
First delay means for delaying at least the third pal
From the output pulse of the first delay means.
The first pulse obtained by decoding the pulse at the determined pulse interval.
A first decoding circuit comprising first gate means for outputting a decoding pulse; and the pulse train is input, and a pulse having a width equal to or larger than the predetermined pulse width is extracted from the input pulse train. A second decoding circuit that decodes the pulse at the predetermined pulse interval from the obtained pulse and the input pulse train and outputs a second decode pulse; and outputs the first and second decode pulses, respectively. a gate circuit for a pulse output means for outputting the delayed a predetermined time only accept pulses input at least a predetermined interval of the output pulse of said gate circuit, said pulse output means, said second decoding pulses A reset unit for resetting the decoding device based on the reset signal. 2. The first decoding circuit according to claim 1, wherein
The third pulse from the pulse train and the first pulse generation circuit.
One of the pulses is selected and one of the input terminals of the gate means is selected.
To the other input terminal of the gate means.
Logical operation with the output pulse of the first delay means
A switch for outputting the first decode pulse is provided.
And, said second decode circuit, the said constant and the pulse width determination means for extracting a pulse of the pulse width or wider, constant width in synchronism with the output pulse of the pulse width determination means from among said pulse train A second pulse generating circuit for generating four pulses, a second delay means for delaying the fourth pulse by a time equal to the predetermined pulse interval, and an output of the pulse train and the second delay means. 2. The decoding device according to claim 1, further comprising second gate means for outputting the second decode pulse from a pulse. 3. The method according to claim 2, wherein the pulse having the predetermined pulse interval is transmitted from the on-board device and received by the ground station in a secondary radar system including an on-board device and a ground station mounted on an aircraft. 3. The decoding device according to claim 1, wherein the decoding device transmits the response pulse to the aircraft after a certain delay after receiving the interrogation pulse.