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JP2830633B2 - Method for manufacturing semiconductor device - Google Patents
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JP2830633B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

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Publication number
JP2830633B2
JP2830633B2 JP20864392A JP20864392A JP2830633B2 JP 2830633 B2 JP2830633 B2 JP 2830633B2 JP 20864392 A JP20864392 A JP 20864392A JP 20864392 A JP20864392 A JP 20864392A JP 2830633 B2 JP2830633 B2 JP 2830633B2
Authority
JP
Japan
Prior art keywords
support plate
semiconductor
semiconductor element
semiconductor substrate
selectively
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP20864392A
Other languages
Japanese (ja)
Other versions
JPH0661388A (en
Inventor
智司 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP20864392A priority Critical patent/JP2830633B2/en
Publication of JPH0661388A publication Critical patent/JPH0661388A/en
Application granted granted Critical
Publication of JP2830633B2 publication Critical patent/JP2830633B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、特にプレイテッド・ヒート・シンク構造(以下
PHS構造とよぶ)を有する半導体装置の製造方法に関
するものである。
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a plated heat sink structure (hereinafter, referred to as a PHS structure).

【0002】[0002]

【従来の技術】一般にPHS構造を有する半導体装置の
製造方法は、半導体基板表面に素子を形成した後図4に
示すフローの通り、半導体基板裏面を所定の厚さまで機
械的研摩ならびに化学的浸食で削り取り、半導体基板の
裏面におのおのの表面素子に対向する位置に選択的に、
PHSとなるような厚さの熱良導体金属を蒸着又はめっ
きによって成長させ裏面電極を形成し、化学的浸食又は
機械的切断によって、おのおのの半導体素子に分離して
いる。
2. Description of the Related Art In general, a method of manufacturing a semiconductor device having a PHS structure is as follows. After an element is formed on the surface of a semiconductor substrate, the back surface of the semiconductor substrate is subjected to mechanical polishing and chemical erosion to a predetermined thickness as shown in FIG. Scraping, selectively on the back side of the semiconductor substrate at the position facing each surface element,
A thermally conductive metal having a thickness to be PHS is grown by vapor deposition or plating to form a back electrode, and is separated into semiconductor elements by chemical erosion or mechanical cutting.

【0003】しかし、半導体基板表面素子形成後、半導
体基板を厚さ20〜40μm程度に薄く削るため、半導
体基板だけであると、半導体基板のそり、および結晶に
歪がはいり、半導体基板が割れやすく、取り扱いができ
ないため、通常、半導体基板1aを機械的研摩,化学的
浸食を行なうまえに図3(a)に示すように、半導体基
板1aの素子表面側を支持板2に貼り付け材3aにて貼
り付けられ、後の工程を行うことで半導体基板1aのそ
り、割れを防止している。
However, after the surface element of the semiconductor substrate is formed, the semiconductor substrate is shaved to a thickness of about 20 to 40 μm. If the semiconductor substrate alone is used, the semiconductor substrate is warped and the crystal is distorted, and the semiconductor substrate is easily broken. Before the semiconductor substrate 1a is subjected to mechanical polishing and chemical erosion, the element surface side of the semiconductor substrate 1a is usually attached to the support plate 2 as shown in FIG. The semiconductor substrate 1a is prevented from warping or cracking by performing the subsequent steps.

【0004】ここで用いられている貼り付け材3aは、
半導体基板1aと支持板2との機械的強度、耐薬品性、
耐熱性を考え、ワックス又はネガレジスト等が用いら
れ、厚さは通常5〜30μm程度である。
[0004] The bonding material 3a used here is:
Mechanical strength and chemical resistance between the semiconductor substrate 1a and the support plate 2;
In consideration of heat resistance, wax or a negative resist is used, and the thickness is usually about 5 to 30 μm.

【0005】又、裏面電極形成し、おのおのの素子に分
離した後、支持板2に貼り付けられた半導体素子1bを
剥離、洗浄する必要があり、図3(b)に示すように、
貼り付け材3aが溶解するような処理液6の中に支持板
2に貼り付けられた半導体素子1bを浸漬させ、貼り付
け材3aを溶解させ半導体素子1bを支持板2から剥離
し半導体素子1bは、半導体素子1bより小さい開口の
金網で作くられたカゴ状治具8に受け、さらに半導体素
子1bの洗浄が行なわれる。ここで用いる処理液6bと
は貼り付け材3aが容易に溶解するような通常異なる溶
剤系のものを複数槽用いている。
After the back electrode is formed and separated into individual elements, the semiconductor element 1b attached to the support plate 2 needs to be peeled off and washed, as shown in FIG.
The semiconductor element 1b attached to the support plate 2 is immersed in a treatment liquid 6 in which the adhesive 3a is dissolved, the adhesive 3a is dissolved, and the semiconductor element 1b is separated from the support plate 2 to remove the semiconductor element 1b. Is received by a basket-shaped jig 8 made of a wire mesh having an opening smaller than that of the semiconductor element 1b, and the semiconductor element 1b is further cleaned. The processing liquid 6b used here uses a plurality of tanks which are usually of a different solvent type so that the adhesive material 3a is easily dissolved.

【0006】又、このとき、剥離、および洗浄を促進さ
せるために、処理液中で支持板2に貼り付けられた半導
体素子1bおよびカゴ状治具5に受けられた半導体素子
1bに揺動又は、超音波等が加えられている。
At this time, in order to promote peeling and cleaning, the semiconductor element 1b affixed to the support plate 2 and the semiconductor element 1b received by the cage jig 5 in the processing liquid swing or move. , Ultrasonic waves, and the like.

【0007】剥離、洗浄が終了した半導体素子1bは乾
燥させ、マウントを行なうため、半導体素子1bを1片
づつ、裏表を確認し、トレーに整列させていた。
The semiconductor element 1b, which has been peeled and washed, is dried and mounted, so that the semiconductor elements 1b are aligned one by one on the tray, one by one, with the front and back sides checked.

【0008】[0008]

【発明が解決しようとする課題】このような従来の半導
体装置の製造方法では、工程の目動化を考えた場合、カ
ゴ状治具8に裏表ばらばらに、かさなり合った状態では
いっている半導体素子1bを認識し、個々を拾い上げ整
列させることは非常に困難なことである。
In such a conventional method of manufacturing a semiconductor device, when the process is to be considered, the semiconductor elements which are put into the basket-shaped jig 8 in a face-to-face manner and in a superposed state are considered. It is very difficult to recognize 1b and pick up and align the individual.

【0009】剥離、洗浄時に半導体素子1bが、反転、
および半導体素子1bどうしが重なり合わないように、
支持板2の貼り付け材3a側の面と、カゴ状治具5の底
面金網との寸法(図3(b)のt寸法)を、半導体素子
1bの厚さの2倍以下にするように支持板を保持すれば
半導体素子1bの反転および重なり合いをなくすことが
でき、自動化を容易に行なうことができるが、半導体素
子1bは裏面電極を形成した状態でも厚さが40〜10
0μmと非常に薄く、支持板2とカゴ状治具8の底面金
網との寸法、t寸法は80〜200μmと、非常に狭く
する必要があり、処理後6bで剥離、洗浄時、半導体素
子1bの近傍では処理液6bの置換が悪く、半導体素子
1bに貼り付け材3および処理液6bが洗浄時間および
洗浄回数を増しても残り乾燥するため、シミになっての
こり、外観不良,ボンディング不良が発生する。
When the semiconductor element 1b is peeled off and washed,
And the semiconductor elements 1b do not overlap each other,
The dimension (t dimension in FIG. 3B) between the surface of the support plate 2 on the side of the bonding material 3a and the bottom wire mesh of the cage jig 5 is set to be not more than twice the thickness of the semiconductor element 1b. By holding the support plate, inversion and overlapping of the semiconductor element 1b can be eliminated, and automation can be easily performed. However, the semiconductor element 1b has a thickness of 40 to 10 even when the back electrode is formed.
It is very thin, 0 μm, and the dimension of the support plate 2 and the bottom wire mesh of the cage jig 8, the t dimension, must be very narrow, 80 to 200 μm. In the vicinity of the above, the replacement of the processing liquid 6b is poor, and the adhesive 3 and the processing liquid 6b remain on the semiconductor element 1b and remain dry even if the cleaning time and the number of times of cleaning are increased, so that stains, appearance defects, and bonding defects may occur. Occur.

【0010】又、上記の方法で、洗浄時の液の置換をよ
くするため、支持板2から半導体素子1bが剥離した時
点で、支持板2を取り、支持板2のかわりにカゴ状治具
8の底面金網との寸法tを全面で維持でき半導体素子1
bのより小さい開口の金網等で覆い洗浄をすれば、液の
置換がよくなり、洗浄効果が向上し、貼り付け材3a、
および処理液6bの残りがなくなると考えられるが、半
導体素子1bが支持板2から、剥離した時点で、支持板
2を取りはずすことは、半導体素子1bのサイズが非常
に小さく(製品によって異なるが、0.5〜1.0W ×
0.5〜1.5D ×0.04〜0.1t mm程度)又、
半導体素子1bと支持板2は処理液6bで濡れているた
め、半導体素子1bは、支持板2からとれない。また、
一度、半導体素子1bを剥離洗浄した時点で乾燥させ、
支持板2をはずしてから全面を金網で覆い、再洗浄すれ
ば、半導体基板2にひっつくことなく半導体素子1bを
取りはずすことは可能になるが、一端半導体素子1に付
いたシミは再洗浄してもなかなかとれない等の問題点が
あった。
Further, in order to improve the replacement of the liquid at the time of cleaning by the above-mentioned method, when the semiconductor element 1b is peeled off from the support plate 2, the support plate 2 is removed, and a cage jig is used instead of the support plate 2. 8 can maintain the dimension t with the bottom wire mesh on the entire surface.
If cleaning is performed by covering with a wire mesh or the like having an opening smaller than b, the replacement of the liquid is improved, and the cleaning effect is improved.
It is considered that the remaining of the processing liquid 6b disappears. However, when the semiconductor element 1b is separated from the support plate 2 and the support plate 2 is removed, the size of the semiconductor element 1b is very small (depending on the product, 0.5 to 1.0 W ×
About 0.5~1.5 D × 0.04~0.1 t mm) In addition,
Since the semiconductor element 1b and the support plate 2 are wet with the processing liquid 6b, the semiconductor element 1b cannot be removed from the support plate 2. Also,
Once the semiconductor element 1b is peeled and washed, it is dried,
If the support plate 2 is removed, the entire surface is covered with a wire mesh, and re-cleaning is performed, the semiconductor element 1b can be removed without sticking to the semiconductor substrate 2. However, stains on the semiconductor element 1 once are cleaned again. There were problems such as difficulties in taking it.

【0011】本発明の目的は、PSH構造を有する半導
体素子を支持板から、半導体素子が重なり合うことな
く、又反転することを防ぎ、充分な洗浄効果を保つこと
ができる半導体装置の製造方法を提供することにある。
An object of the present invention is to provide a method of manufacturing a semiconductor device capable of preventing a semiconductor element having a PSH structure from a support plate from overlapping and inverting the semiconductor element from a support plate and maintaining a sufficient cleaning effect. Is to do.

【0012】[0012]

【課題を解決するための手段】本発明の特徴は、一主面
に複数の半導体素子が形成された半導体基板の該一主面
に貼り付け材を介して選択的に剥離可能な貼り付け材に
より支持板を貼り付ける工程と、前記支持板に貼り付け
られた前記半導体基板の裏面を研磨あるいは侵食させ該
半導体基板を薄くする工程と、前記半導体素子に対応す
る裏面電極を形成する工程と、前記支持板に貼り付けら
れた前記半導体基板を貼り付けられた状態で各前記半導
体素子に切断分離する工程と、前記選択的に剥離可能な
貼り付け材から前記支持板を引離す取外し工程と、前記
半導体素子を貼り付ける前記貼り付け材を小穴をもつ板
材で挟み込み処理液に浸漬し前記半導体素子を洗浄する
工程とを含んで構成される半導体装置の製造方法であ
また前記取外し工程は、前記選択的に剥離可能な
貼り付け材を熱で溶かし取り外す工程であるか、あるい
は、前記選択的に剥離可能な貼り付け材を薬液で溶かし
取り外す工程であるかが望ましい。
The feature of the present invention is one principal aspect.
One main surface of a semiconductor substrate on which a plurality of semiconductor elements are formed
Material that can be selectively peeled off via the material
A step of attaching a support plate, and attaching the support plate.
Polishing or eroding the back surface of the semiconductor substrate
A step of thinning a semiconductor substrate, and a step corresponding to the semiconductor element.
Forming a back electrode, and attaching the back electrode to the support plate.
Each of the semiconductors in a state where the
Cutting and separating into a body element, and selectively peelable
Removing the support plate from the adhesive material,
A plate having a small hole as the material for attaching the semiconductor element.
Clean the semiconductor element by immersing it in a processing solution
And a method for manufacturing a semiconductor device.
You . Also , the removing step is capable of selectively peeling.
It is a process of melting and removing the paste with heat, or
Melts the selectively peelable adhesive material with a chemical solution
It is desirable that this is a removal step .

【0013】[0013]

【実施例】次に本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0014】図1は本発明の一実施例を説明するための
断面図である。
FIG. 1 is a sectional view for explaining an embodiment of the present invention.

【0015】図1(a)は、半導体基板1aを薄く削る
ために支持板2に貼り付けた状態を示すものである。半
導体基板1a側に貼り付け材3aここでは密着力の強い
ネガ系レジスト、支持板2側に選択的に剥離可能な貼り
付け材3b、ここではネガ系レジストに対し熱によって
選択的に剥離できるワックスを用いて、半導体基板1a
と支持板2を2層の貼り付け材によって、貼り付けを行
なっている。おのおのの貼り付け材の層の厚さは5〜3
0μm程度である。
FIG. 1A shows a state where the semiconductor substrate 1a is attached to a support plate 2 in order to cut the semiconductor substrate 1a thinly. Adhesive material 3a on the side of semiconductor substrate 1a here is a negative resist with strong adhesion, adhesive material 3b that can be selectively peeled off on support plate 2, here a wax that can be selectively peeled off from the negative resist by heat The semiconductor substrate 1a
And the support plate 2 are pasted with a two-layer pasting material. The thickness of each adhesive layer is 5 to 3
It is about 0 μm.

【0016】上記の方法で貼り付けられた半導体基板1
aは図4に示すフローのように半導体基板1aを所定の
厚さに削り込み、裏面電極を形成し、支持板に貼り付い
た状態でおのおのの素子に分離が行なわれ、次に半導体
素子1bを支持板2から剥離、洗浄することになる。
Semiconductor substrate 1 attached by the above method
In FIG. 4A, the semiconductor substrate 1a is cut into a predetermined thickness as shown in the flow chart of FIG. 4, a back electrode is formed, and each element is separated while being attached to a support plate. Is separated from the support plate 2 and washed.

【0017】ここで、図1(b)に示すように、まず支
持板2をホットプレートなどによって、選択性貼り付け
材3bここではワックスが溶ける所定の温度にすること
にもより、半導体素子1bが他の貼り付け材3aここで
はネガ系レジストに保持されたままフィルム状態で支持
板2から容易に剥離することができる。このフィルム状
態になった半導体素子1bを図1(c)に示すような半
導体素子1bの寸法より小さい開口の穴が多数開いてあ
り、たわみ等がなく、半導体素子1bを両面から半導体
素子の厚さ以上で厚さの2倍以下の寸法が全面で維持で
きるような薄い板ではさみ込むように保持し、貼り付け
材3aが溶解する処理液で処理することで、処理液6b
の置換がよくなり洗浄効果が向上し半導体素子1bが反
転なく又、お互い重り合うことなく、洗浄することがで
き、工程間の自動化が容易に行なうことができる。又こ
こで、液の置換を促進させるために従来どうりの揺動又
は超音波を加えてもよい。
Here, as shown in FIG. 1 (b), first, the support plate 2 is set to a predetermined temperature at which the wax is melted by using a hot plate or the like to selectively attach the semiconductor element 1b. However, it can be easily peeled from the support plate 2 in a film state while being held by the negative resist in the other bonding material 3a. The semiconductor element 1b in the film state has many openings smaller than the dimensions of the semiconductor element 1b as shown in FIG. 1 (c). A thin plate that can maintain a dimension of not less than twice the thickness and not less than the thickness is held so as to be sandwiched, and is treated with a treatment liquid in which the adhesive material 3a is dissolved.
And the cleaning effect is improved, and the semiconductor element 1b can be cleaned without inversion and without overlapping, and automation between processes can be easily performed. Further, here, a conventional rocking or ultrasonic wave may be applied to promote the replacement of the liquid.

【0018】図2は第2の実施例を示す断面図である。FIG. 2 is a sectional view showing a second embodiment.

【0019】図2(a)は実施例1と同様に半導体基板
1aを支持板2に貼り付けた状態を示すものである。半
導体基板1a側に貼り付け材3a、ここでは密着性の強
いネガ系レジスト用い、選択可能な貼り付け材3bは溶
剤なよってネガ系レジストと選択剥離が可能な材質ここ
ではメチル・エチル・ケトン(以下MEKとよぶ)を用
いるとネガ系レジストと選択剥離が可能なポジ系レジス
トを用いる。ポジ系レジストは一般的にMEKに容易に
溶解されることが知られており、ネガ系レジストは、M
EKでは溶解しないことが知られている。但し、ポジ系
のレジストは、半導体基板1aとか支持板2(たとえば
ガラス板)とは接着強度がよわいため、補強としてネガ
系レジストでポジ系レジストをはさんだ状態で用いる。
FIG. 2A shows a state in which the semiconductor substrate 1a is attached to the support plate 2 as in the first embodiment. An adhesive material 3a, here a negative resist having strong adhesion, is used on the semiconductor substrate 1a side, and a selectable adhesive material 3b is a material which can be selectively peeled off from the negative resist by using a solvent. Here, methyl ethyl ketone ( (Hereinafter referred to as MEK), a negative resist and a positive resist that can be selectively peeled off are used. It is known that a positive resist is generally easily dissolved in MEK.
It is known that EK does not dissolve. However, since the positive resist has good adhesive strength to the semiconductor substrate 1a or the support plate 2 (for example, a glass plate), it is used in a state where the positive resist is sandwiched between negative resists as reinforcement.

【0020】図2(b)はおのおのお半導体素子1bに
分離した後の支持板2からの剥離を示す図である。図示
するように選択性貼り付け材3bここではポジ系レジス
トだけを、処理液6a、ここではMEKにて溶解するこ
とが容易に行なうことができ、半導体素子1bが貼り付
け材3aここではネガ系レジストに保持されたまま、フ
ィルム状態で支持板2から容易に剥離することができ
る。このフィルム状態になった半導体素子1bを実施例
1と同様に洗浄することができる。又、この実施例の場
合ネガ系レジストでフィルム状態になった半導体素子の
洗浄をドライ処理(O2 プラズマ処理)などによって
も、行なうことができ、特殊な治具を用いずに、半導体
素子1bが反転なく又、お互い重り合うこともなく洗浄
するこができる。
FIG. 2B is a view showing the separation from the support plate 2 after each semiconductor element 1b is separated. As shown in the figure, the selective bonding material 3b can be easily dissolved only in the positive resist in the processing liquid 6a, here, in the MEK, and the semiconductor element 1b can be easily dissolved in the bonding material 3a, here, in the negative system. It can be easily peeled off from the support plate 2 in a film state while being held by the resist. The semiconductor element 1b in the film state can be washed as in the first embodiment. Further, in the case of this embodiment, the semiconductor element in a film state with the negative resist can be washed by dry treatment (O 2 plasma treatment) or the like, and the semiconductor element 1b can be cleaned without using a special jig. Can be washed without inversion and without overlapping each other.

【0021】なお、本発明方法と従来方法による剥離、
洗浄工程に起因する不良率並に半導体素子どおしの重な
り、反転がない割合(整列率)を測定した結果を表1に
示す。
The peeling by the method of the present invention and the conventional method,
Table 1 shows the results of measurement of the defect rate due to the cleaning process and the rate of no overlap and inversion of semiconductor elements (alignment rate).

【0022】 [0022]

【0023】表1から明らかなように従来方法(1)で
不良率を1%以下におさえると整列率は5%以下とな
り、又、従来方法(2)のように整列率を100%にす
ると不良率は90%以上となり好ましい結果が得られな
かったのに対し、本発明方法では不良率を1%以下に
し、整列率も100%にすることができた。
As is clear from Table 1, when the defect rate is reduced to 1% or less by the conventional method (1), the alignment rate becomes 5% or less. When the alignment rate is 100% as in the conventional method (2), the alignment rate becomes 100%. The defective rate was 90% or more, and a favorable result was not obtained. On the other hand, in the method of the present invention, the defective rate was 1% or less, and the alignment rate was 100%.

【0024】[0024]

【発明の効果】以上説明したように本発明はあらかじ
め、半導体素子を支持板からフィルム状で剥離すること
によって、半導体素子が重なり合うことなく、又反転す
ることなく、貼り付け材から剥離、洗浄が可能であり、
剥離、洗浄工程に起因する不良率を1%以下にすること
ができる。
As described above, according to the present invention, the semiconductor element is previously peeled off from the support material in the form of a film without peeling off and washing without overlapping or reversing by peeling off the semiconductor element from the support plate. Is possible,
The defect rate due to the peeling and cleaning steps can be reduced to 1% or less.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を説明するための工程別の断
面図である。
FIG. 1 is a cross-sectional view illustrating a process according to an embodiment of the present invention.

【図2】本発明の他の実施例を説明するための工程別の
断面図である。
FIG. 2 is a cross-sectional view for explaining another embodiment of the present invention in each step.

【図3】従来の半導体装置の製造方法を説明するための
断面図である。
FIG. 3 is a cross-sectional view for explaining a conventional method for manufacturing a semiconductor device.

【図4】従来の半導体装置の製造方法の工程のフローを
示す図である。
FIG. 4 is a diagram showing a flow of steps of a conventional semiconductor device manufacturing method.

【符号の説明】[Explanation of symbols]

1a 半導体基板 1b 半導体素子 2 支持板 3a 貼り付け材 3b 選択性貼り付け材 4 保持治具 5a,5b 処理槽 6a,6b 処理液 7 ホットプレート 8 カゴ状治具 Reference Signs List 1a Semiconductor substrate 1b Semiconductor element 2 Support plate 3a Adhesive material 3b Selective adhesive material 4 Holding jig 5a, 5b Processing bath 6a, 6b Processing liquid 7 Hot plate 8 Basket jig

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/301 H01L 23/40──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. 6 , DB name) H01L 21/301 H01L 23/40

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 一主面に複数の半導体素子が形成された
半導体基板の該一主面に貼り付け材を介して選択的に剥
離可能な貼り付け材により支持板を貼り付ける工程と、
前記支持板に貼り付けられた前記半導体基板の裏面を研
磨あるいは侵食させ該半導体基板を薄くする工程と、前
記半導体素子に対応する裏面電極を形成する工程と、前
記支持板に貼り付けられた前記半導体基板を貼り付けら
れた状態で各前記半導体素子に切断分離する工程と、前
記選択的に剥離可能な貼り付け材から前記支持板を引離
す取外し工程と、前記半導体素子を貼り付ける前記貼り
付け材を小穴をもつ板材で挟み込み処理液に浸漬し前記
半導体素子を洗浄する工程とを含んで構成されることを
特徴とする半導体装置の製造方法。
1. A plurality of semiconductor elements are formed on one main surface.
Selectively peel off the one main surface of the semiconductor substrate via an adhesive.
A step of attaching the support plate with a detachable attaching material,
Polishing the back surface of the semiconductor substrate attached to the support plate;
Polishing or eroding to thin the semiconductor substrate;
Forming a back electrode corresponding to the semiconductor element;
The semiconductor substrate attached to the support plate is attached.
Cutting and separating each of the semiconductor elements in the separated state;
The support plate is separated from the adhesive material that can be selectively peeled off
Removing step and attaching the semiconductor element
Insert the material between the plates with small holes and immerse in the treatment liquid
A method of manufacturing a semiconductor device, comprising: cleaning a semiconductor element .
【請求項2】 前記取外し工程は、前記選択的に剥離可
能な貼り付け材を熱で溶かし取り外す工程であることを
特徴とする請求項1記載の半導体装置の製造方法。
2. The method according to claim 1 , wherein said removing step is capable of selectively peeling.
2. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of melting and removing the functional adhesive material by heat .
【請求項3】 前記取外し工程は、前記選択的に剥離可
能な貼り付け材を薬液で溶かし取り外す工程であること
を特徴とする請求項1記載の半導体装置の製造方法。
3. The method according to claim 1, wherein the removing step includes the step of selectively peeling.
A method according to claim 1 Symbol mounting, characterized in that the ability of pasted material is a step of removing dissolved in the chemical solution.
JP20864392A 1992-08-05 1992-08-05 Method for manufacturing semiconductor device Expired - Fee Related JP2830633B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20864392A JP2830633B2 (en) 1992-08-05 1992-08-05 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20864392A JP2830633B2 (en) 1992-08-05 1992-08-05 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH0661388A JPH0661388A (en) 1994-03-04
JP2830633B2 true JP2830633B2 (en) 1998-12-02

Family

ID=16559645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20864392A Expired - Fee Related JP2830633B2 (en) 1992-08-05 1992-08-05 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2830633B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008041987A (en) * 2006-08-08 2008-02-21 Tokyo Ohka Kogyo Co Ltd Method and apparatus for peeling support plate and wafer

Also Published As

Publication number Publication date
JPH0661388A (en) 1994-03-04

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