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JP2834841B2 - High heat resistant resin encapsulated semiconductor device - Google Patents
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JP2834841B2 - High heat resistant resin encapsulated semiconductor device - Google Patents

High heat resistant resin encapsulated semiconductor device

Info

Publication number
JP2834841B2
JP2834841B2 JP2102904A JP10290490A JP2834841B2 JP 2834841 B2 JP2834841 B2 JP 2834841B2 JP 2102904 A JP2102904 A JP 2102904A JP 10290490 A JP10290490 A JP 10290490A JP 2834841 B2 JP2834841 B2 JP 2834841B2
Authority
JP
Japan
Prior art keywords
semiconductor device
resin
resistant resin
die bonding
high heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2102904A
Other languages
Japanese (ja)
Other versions
JPH043438A (en
Inventor
信二 武井
茂 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP2102904A priority Critical patent/JP2834841B2/en
Publication of JPH043438A publication Critical patent/JPH043438A/en
Application granted granted Critical
Publication of JP2834841B2 publication Critical patent/JP2834841B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、高耐熱性樹脂封止型半導体装置に係り、特
に200℃以上の加熱によってもパッケージにクラック発
生の無い高耐熱性樹脂封止型半導体装置に関するもので
ある。
Description: BACKGROUND OF THE INVENTION (Industrial Application Field) The present invention relates to a high heat-resistant resin-sealed semiconductor device, and particularly to a high heat-resistant resin-sealed package having no cracks even when heated at 200 ° C. or more. The present invention relates to a semiconductor device.

(従来の技術) 一般に、リードフレームのアイランド上にダイボンデ
ィング材で半導体チップを固着させた高耐熱性樹脂封止
型半導体装置の全体構造は、第5図に示すようになって
いる。
(Prior Art) In general, the overall structure of a high heat-resistant resin-sealed semiconductor device in which a semiconductor chip is fixed on a lead frame island with a die bonding material is as shown in FIG.

この図において、1は外部リード、2はアイランド、
3は半導体チップ、4はボンディングワイヤ、5はダイ
ボンディング材硬化物、6はモールド樹脂、7はベント
孔である。
In this figure, 1 is an external lead, 2 is an island,
Reference numeral 3 denotes a semiconductor chip, 4 denotes a bonding wire, 5 denotes a cured die bonding material, 6 denotes a mold resin, and 7 denotes a vent hole.

ここで、ベント孔7は、アイランド2の裏面のモール
ド樹脂部に円柱または多角柱の穴をあけ、極度に肉厚の
薄い部分またはモールド樹脂がない部分を形成すること
によって、半導体の加熱に際して、半導体チップ周辺の
水分の蒸発によるガスを逃がす役割を果たしている。
Here, the vent hole 7 is formed by forming a column or a polygonal column in the mold resin portion on the back surface of the island 2 to form an extremely thin portion or a portion having no mold resin. It plays a role of releasing gas due to evaporation of moisture around the semiconductor chip.

(発明が解決しようとする課題) しかしながら、前記した従来の半導体装置において
は、リードフレームのアイランド上に半導体チップを固
着させるためのダイボンディング材は、Au−Si共晶であ
ったが、半導体チップの大型化に伴い、ダイボンディン
グ材はエポキシ系、ポリイミド系、シリコーン系等の有
機高分子材料に移行してきている。こうした有機高分子
材料の使用は、Au−Si共晶に比べて材料自体の耐熱性が
低いため、半田耐熱性の低下を招いている。このため、
半導体装置が熱を受けると、ダイボディング材の樹脂自
体が大きく膨張して、アイランド部のモールド樹脂部が
変形してクラックを生じたり、更にモールド樹脂部の変
形によりベント孔を塞ぎ、ベント孔から水分を逃がすこ
とが困難となる。特に、半導体装置のプリント回路基板
への実装時に行われる加熱、例えば、200℃以上で行わ
れるIR(赤外線)リフローによる加熱処理によって、こ
のような欠陥が現れる。
(Problems to be Solved by the Invention) However, in the above-described conventional semiconductor device, the die bonding material for fixing the semiconductor chip on the island of the lead frame is Au-Si eutectic. With the increase in size, die bonding materials have shifted to organic polymer materials such as epoxy, polyimide, and silicone. The use of such an organic polymer material lowers the solder heat resistance because the material itself has lower heat resistance than the Au-Si eutectic. For this reason,
When the semiconductor device receives heat, the resin itself of the die-bonding material expands greatly, and the mold resin portion of the island portion is deformed and cracks are formed. It is difficult to release moisture. In particular, such defects appear due to heating performed at the time of mounting the semiconductor device on the printed circuit board, for example, a heating process by IR (infrared) reflow performed at 200 ° C. or higher.

第5図は欠陥の現れてない正常な従来の半導体装置の
断面図を示しており、第6図は欠陥の現れた半導体装置
の断面図を示している。
FIG. 5 is a cross-sectional view of a normal conventional semiconductor device having no defect, and FIG. 6 is a cross-sectional view of a semiconductor device having a defect.

本発明は、上記問題点を除去し、有機高分子材料をダ
イボンディング材として使用する樹脂封止型半導体装置
において、基板実装時の200℃以上の加熱によるパッケ
ージの変形及びクラックの発生を防止することができる
高耐熱性樹脂封止型半導体装置を提供することを目的と
する。
The present invention eliminates the above-mentioned problems, and in a resin-encapsulated semiconductor device using an organic polymer material as a die bonding material, prevents deformation and cracking of a package due to heating at 200 ° C. or more when mounting a substrate. It is an object of the present invention to provide a highly heat-resistant resin-encapsulated semiconductor device that can be used.

(課題を解決するための手段) 本発明は、上記目的を達成するために、ダイボンディ
ング材としての有機高分子接着剤を介してリードフレー
ムのアイランド部へ半導体チップを固着し、封止樹脂で
封止した樹脂封止型半導体装置において、接着剤硬化物
の200℃以上の弾性率が4×109dyn/cm2以上であり、か
つ85℃/85%R.H.(相対湿度)で72時間放置後の吸湿率
が0.2%以下である有機高分子接着剤を用いるようにし
たものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a semiconductor chip fixed to an island portion of a lead frame via an organic polymer adhesive as a die bonding material, and a sealing resin. In a sealed resin-sealed semiconductor device, the cured adhesive has a modulus of elasticity of 200 ° C. or more of 4 × 10 9 dyn / cm 2 or more, and is left at 85 ° C./85% RH (relative humidity) for 72 hours. In this case, an organic polymer adhesive having a moisture absorption of 0.2% or less is used.

(作用) ダイボンディング層の膨張変形において、変形を生じ
る因子は主として熱膨張係数であり、一方、変形を阻止
する因子は主として弾性率である。しかし、ダイボンデ
ィング材樹脂のガラス転移点以上であるゴム状領域では
弾性率が低下し、具体的に言えば、200℃以上では室温
に対して弾性率は約1/10に低下し、容易に変形を受け易
くなる。従って、200℃以上における弾性率の高いダイ
ボンディング材であればダイボンディング層の膨張変形
の防止に役立つ。
(Operation) In the expansion deformation of the die bonding layer, the factor causing the deformation is mainly the thermal expansion coefficient, while the factor preventing the deformation is mainly the elastic modulus. However, the elastic modulus decreases in the rubbery region which is equal to or higher than the glass transition point of the die bonding material resin. More specifically, the elastic modulus decreases to about 1/10 with respect to room temperature at 200 ° C. or higher. Becomes easily deformed. Therefore, a die bonding material having a high elastic modulus at 200 ° C. or more is useful for preventing the die bonding layer from expanding and deforming.

更に、ダイボンディング層に吸湿した水分、及び接着
性の弱い界面に凝集した水分が200℃以上の高温に晒さ
れると気化、膨張しダイボンディング層を第6図のよう
に塑性変形に至らしめる外力となる。従って、ダイボン
ディング材は水分を含み難い樹脂、即ち吸湿率の低い樹
脂であることが必要である。
Further, when the moisture absorbed by the die bonding layer and the moisture agglomerated on the interface having weak adhesiveness are exposed to a high temperature of 200 ° C. or more, an external force which evaporates and expands and causes the die bonding layer to undergo plastic deformation as shown in FIG. Becomes Therefore, the die bonding material needs to be a resin that hardly contains moisture, that is, a resin having a low moisture absorption rate.

(実施例) 以下、本発明の実施例について図を参照しながら詳細
に説明する。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第1図は本発明の高耐熱性樹脂封止型半導体装置の断
面図である。
FIG. 1 is a sectional view of a highly heat-resistant resin-sealed semiconductor device of the present invention.

この図に示すように、リードフレームのアイランド上
の半導体チップ3のダイボンディングに、ダイボンディ
ング材10として、以下に示す材料を用いる。即ち、半導
体チップ3のリードフレームのアイランド2への接着剤
として、5種類の組成の異なるエポキシ樹脂A〜Eとポ
リイミド樹脂をダイボンディング材として用いて接着
し、樹脂封止してなる樹脂封止型半導体装置を作製し
た。エポキシ樹脂A〜Eの組成は第2図に示すものを用
いた。製造された半導体装置を85℃/85%R.H.雰囲気中
で30時間、及び72時間放置後に240℃のIRリフローによ
る加熱処理を行った時に半導体装置のパッケージに発生
したクラック数を次の表1に示す。
As shown in the figure, the following materials are used as the die bonding material 10 for die bonding of the semiconductor chip 3 on the island of the lead frame. That is, as an adhesive to the island 2 of the lead frame of the semiconductor chip 3, five types of epoxy resins A to E having different compositions and a polyimide resin are bonded and used as a die bonding material, and resin sealing is performed. A semiconductor device was fabricated. The compositions of the epoxy resins A to E shown in FIG. 2 were used. Table 1 shows the number of cracks generated in the package of the semiconductor device when the manufactured semiconductor device was subjected to heat treatment by IR reflow at 240 ° C. after being left in an atmosphere of 85 ° C./85% RH for 30 hours and 72 hours. Show.

表1において、 チップサイズ8.0×8.0mm2 100pパッケージ 20mm×14mm×2.75mm 表1からは、エポキシ樹脂硬化物A及びBが、クラッ
クの発生のない優れたものであることがわかる。
In Table 1, the chip size is 8.0 × 8.0 mm 2 100p package 20 mm × 14 mm × 2.75 mm From Table 1, it can be seen that the cured epoxy resins A and B are excellent without cracks.

上記各エポキシ樹脂硬化物A〜Eの温度の変化に対す
る貯蔵弾性率を測定したところ第3図に示すグラフが得
られた。表1で優れた硬化を示したエポキシ樹脂硬化物
A及びBは、第3図から明らかなように、200℃以上の
加熱においても貯蔵弾性率が4×109dyn/cm2以上である
ことがわかる。
When the storage modulus of each of the epoxy resin cured products A to E was measured with respect to the change in temperature, the graph shown in FIG. 3 was obtained. As is clear from FIG. 3, the epoxy resin cured products A and B showing excellent curing in Table 1 have a storage elastic modulus of 4 × 10 9 dyn / cm 2 or more even at a temperature of 200 ° C. or more. I understand.

更に、エポキシ樹脂硬化物A〜E及びポリイミド樹脂
硬化物の85℃/85%R.H.雰囲気中での放置時間に対する
各種樹脂硬化物の吸湿率の変化を測定した結果を第4図
にグラフで示す。
Further, FIG. 4 is a graph showing the results of measuring the change in the moisture absorption of each of the cured epoxy resins A to E and the cured polyimide resin with respect to the standing time in a 85 ° C./85% RH atmosphere with respect to the cured resin.

この図から明らかなように、表1で優れた効果を示し
たエポキシ樹脂硬化物A及びBは吸湿率が0.2%以下で
あることがわかる。
As is clear from this figure, it is understood that the epoxy resin cured products A and B, which exhibited excellent effects in Table 1, have a moisture absorption of 0.2% or less.

なお、本発明は上記実施例に限定されるものではな
く、本発明の趣旨に基づいて種々の変形が可能であり、
これらを本発明の範囲から排除するものではない。
It should be noted that the present invention is not limited to the above embodiment, and various modifications are possible based on the gist of the present invention.
They are not excluded from the scope of the present invention.

(発明の効果) 以上、詳細に説明したように、本発明によれば、樹脂
硬化物の200℃以上の弾性率が4×109dyn/cm2以上であ
り、かつ85℃/85%R.H.で72時間放置後の吸湿率が0.2%
以下である樹脂硬化物を用いることによって、基板実装
時に受ける200℃以上の加熱によっても、樹脂封止型半
導体装置のパッケージの変形及びパッケージのクラック
の発生を防止することができる。
(Effects of the Invention) As described above in detail, according to the present invention, the elastic modulus of the cured resin at 200 ° C or more is 4 × 10 9 dyn / cm 2 or more, and 85 ° C / 85% RH. Moisture absorption after leaving for 72 hours at 0.2%
By using the following cured resin, deformation of the package of the resin-encapsulated semiconductor device and generation of cracks in the package can be prevented even by heating at 200 ° C. or more when the substrate is mounted.

【図面の簡単な説明】 第1図は本発明の実施例を示す高耐熱性樹脂封止型半導
体装置の断面図、第2図は本発明の実施例で用いたエポ
キシ樹脂の組成を示す図、第3図は樹脂硬化物の温度−
貯蔵弾性率特性図、第4図は樹脂硬化物の時間−吸湿率
特性を示す図、第5図は従来の樹脂封止型半導体装置の
断面図、第6図は欠陥の現れた従来の樹脂封止型半導体
装置の断面図である。 2……アイランド、3……半導体チップ、10……ダイボ
ンディング材。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a highly heat-resistant resin-sealed semiconductor device showing an embodiment of the present invention, and FIG. 2 is a diagram showing a composition of an epoxy resin used in the embodiment of the present invention. Fig. 3 shows the temperature of the cured resin-
FIG. 4 is a diagram showing time-moisture absorption characteristics of a cured resin, FIG. 5 is a cross-sectional view of a conventional resin-encapsulated semiconductor device, and FIG. 6 is a conventional resin having defects. It is sectional drawing of a sealing type semiconductor device. 2 ... Island, 3 ... Semiconductor chip, 10 ... Die bonding material.

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/52 H01L 23/30Continuation of the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/52 H01L 23/30

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】リードフレームのアイランド上の半導体チ
ップのダイボンディングに、ダイボンディング材として
有機高分子接着剤を使用し、封止樹脂で封止した樹脂封
止型半導体装置において、 接着剤硬化物の200℃以上の弾性率が4×109dyn/cm2
上であり、かつ85℃/85%R.H.で72時間放置後の吸湿率
が0.2%以下である有機高分子接着剤を用いたことを特
徴とする高耐熱性樹脂封止型半導体装置。
1. A resin-encapsulated semiconductor device in which an organic polymer adhesive is used as a die-bonding material for die-bonding a semiconductor chip on an island of a lead frame and is sealed with a sealing resin. Using an organic polymer adhesive having a modulus of elasticity at 200 ° C or higher of 4 × 10 9 dyn / cm 2 or higher and a moisture absorption of 0.2% or lower after standing at 85 ° C / 85% RH for 72 hours. A highly heat-resistant resin-sealed semiconductor device characterized by the following.
JP2102904A 1990-04-20 1990-04-20 High heat resistant resin encapsulated semiconductor device Expired - Fee Related JP2834841B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2102904A JP2834841B2 (en) 1990-04-20 1990-04-20 High heat resistant resin encapsulated semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2102904A JP2834841B2 (en) 1990-04-20 1990-04-20 High heat resistant resin encapsulated semiconductor device

Publications (2)

Publication Number Publication Date
JPH043438A JPH043438A (en) 1992-01-08
JP2834841B2 true JP2834841B2 (en) 1998-12-14

Family

ID=14339848

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2102904A Expired - Fee Related JP2834841B2 (en) 1990-04-20 1990-04-20 High heat resistant resin encapsulated semiconductor device

Country Status (1)

Country Link
JP (1) JP2834841B2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06209054A (en) * 1993-01-08 1994-07-26 Mitsubishi Electric Corp Semiconductor device
KR100333452B1 (en) 1994-12-26 2002-04-18 이사오 우치가사키 Film-like organic die-bonding material and semiconductor device using the same
US6717242B2 (en) 1995-07-06 2004-04-06 Hitachi Chemical Company, Ltd. Semiconductor device and process for fabrication thereof
TW310481B (en) * 1995-07-06 1997-07-11 Hitachi Chemical Co Ltd
US6791194B1 (en) 1996-05-30 2004-09-14 Hitachi, Ltd. Circuit tape having adhesive film, semiconductor device, and a method for manufacturing the same
JP3195236B2 (en) 1996-05-30 2001-08-06 株式会社日立製作所 Wiring tape having adhesive film, semiconductor device and manufacturing method
JP4643864B2 (en) * 2001-07-19 2011-03-02 株式会社日立メディコ X-ray equipment

Also Published As

Publication number Publication date
JPH043438A (en) 1992-01-08

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