JP2839845B2 - Microprogram verification method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of verifying a microprogram, and more particularly to a method of verifying a microprogram suitable for performing a source-level verification of a violation of a specification restriction of the microprogram.

[0002]

2. Description of the Related Art As a conventional method for verifying a microprogram, as described in Japanese Patent Application Laid-Open No. 02-083748, a method for statically verifying a microprogram at a source level can be derived from a specific step of the microprogram. All routes are traced in advance, an address table storing a list of paths is obtained, and a corresponding restriction rule is verified for the route.

[0003] In this method, all the restriction rules can be verified in theory, but if there are many loops, branches, and merging paths due to the configuration of the microprogram, the combination becomes enormous, and in practice, it is derived from each step. In many cases, a storage area for recording the route information cannot be secured. For this reason, from the specific starting point, limit the range to be traced,
By limiting the depth of each route to be generated, sliding the starting point and repeating the trace to the end point within the limit,
All routes were generated and the restriction rules were determined.

In the case where there is a restriction rule that requires verification in the direction opposite to the direction in which the microprogram proceeds, in the conventional method, the verification is performed by replacing the relevant restriction rule with a rule having an even number relationship. Was.

As a method of evaluating the performance of a microprogram, the number of cycles required from the starting point to the end point is a large indicator. However, in the conventional method of evaluating a microprogram at the source level, manual evaluation is required. I was doing a desk check.

[0006]

In the conventional method, a restriction rule beyond the set trace range is verified, and "after the issuance of the microinstruction A, the issuance of the microinstruction B is prohibited until the end point of the route." However, it is impossible to verify a rule without a limited range, and an actual instruction is evaluated as being absent.

Although this could be improved to some extent by improving the information to be stored and the table format, the limited range of the trace was only expanded and the restriction was not eliminated.

Although the route is generated while sliding the starting point, most of the route overlaps with the portion that has already been judged once. However, since the starting point is independent judgment, the same step is repeated many times. A rule is determined, and the processing speed is extremely slow.

Furthermore, if there is an error in the description of the microprogram source, the recognition of the designated position of the microinstruction in the same step is erroneous, which is pointed out as a restriction violation. Looking at the results alone could not tell whether they were caused by a description error or a true restriction violation, making analysis difficult and time-consuming to correct.

Furthermore, if the restriction rule has a restriction in the direction opposite to the direction of microprogram execution, all of the restrictions cannot be replaced with a treatment relationship. In the case of a restriction rule such as "Issuance of B
, The issue of the microinstruction A must be issued within two cycles from the issuance of the microinstruction B, the violation of the issue position of the microinstruction B can be pointed out, but in the case of omission, it cannot be pointed out.

When evaluating the performance of a microprogram, in the case of a microprogram source having a complicated configuration, it is necessary to cover all possible routes.
It is almost impossible to spend a lot of time manually. In addition, even if the microprogram source has a configuration and scale that can be confirmed, it takes time and requires room for error if it is manually performed.

SUMMARY OF THE INVENTION An object of the present invention is to solve these conventional problems, to realize a verification that is not limited by a storage capacity and that is not limited in a verifiable range or direction, and furthermore, a description violation of a microprogram source description. Microprograms with high verification accuracy and efficiency by minimizing the need for duplication of judgment processing in the same step and improving the processing speed It is to provide a verification method.

[0013]

According to the present invention, there is provided a microprogram verifying method for statically verifying that a microprogram is correctly described according to specification restrictions. Without prior derivation of all possible routes that can be passed, determination of restriction rules, etc., and tracing of paths proceed simultaneously, and each route is digested so that verification without limit to the verifiable range is performed. I do.

For this purpose, the data sequence at the time of reading the microprogram source information is sorted in the order of the paths, the addresses of the data table are arranged in the order of the paths,
By storing, it is set so that the user can always refer to the data string of the next path without searching.

Further, each step of the microprogram source is divided into blocks for each branching step, and a route is constructed in block units such as the context of the own block and the cycle from the starting point, and all patterns are recognized.

Further, in performing the restriction rule determination while tracing the path of the microprogram, information on the relevant restriction rule, the result of the determination, and information such as the appearance status of an arbitrary microinstruction are recorded and retained in block units. I do.

Further, when a certain step of the microprogram reappears in the same route or is used in another route, the above-described recording in block units is used,
By judging the necessity of the reprocessing, the duplication of the processing to the same step is minimized, and the processing speed is improved.

Furthermore, for a restriction rule that needs to be determined in the direction opposite to the direction in which the microprogram proceeds, the occurrence of a microinstruction to be restricted is always recognized during tracing, and the microinstruction that is a key to the restriction is identified. By confirming the record of the occurrence status of the microinstruction to be restricted at the present time, it is possible to verify the restriction rule in the reverse direction without replacing the rule or separately performing tracing.

Further, various definition information of the microprogram such as the definition of the microinstruction and the definition of the description format of the microprogram source are encoded, and based on this, the microprogram source and the restriction rules are also encoded, and the path trace and the judgment processing are performed. And the like, and a reduction in the storage area usage is realized.

Further, the description format of the microprogram source is verified in advance based on the definition information of the description format defined in the specification of the microprogram, and the violating part is pointed out before the restriction rule is verified, and an output device is provided. Output to the user to make it easier to distinguish between restriction violations.

As information for supporting the performance evaluation of the microprogram, all passing paths from the starting point to the end point of the microprogram are covered, and the number of cycles and passing paths are sampled for each route, and the information is output to an output device. I do.

In addition, as information supporting the performance evaluation of the microprogram, in covering all the passing paths from the starting point to the end point of the microprogram, it recognizes the issuance of an arbitrary microinstruction and issues it on the microprogram source. The position and the number of cycles from the starting point are collected and output to an output device.

[0023]

According to the present invention, a verification rule without restriction on a verification range or direction of a restriction rule in the specification of a microprogram is efficiently implemented.

First, the microinstructions defined in advance on the specification of the microprogram to be verified are replaced with arbitrary codes from the character strings, and accordingly, the restriction rules and all the microinstructions on the microprogram source to be verified are replaced with the character strings. Is replaced with the code according to the definition code. As a result, the determination process between the microprogram source and the restriction rules and various types of definition information is performed at high speed, and the weight of the storage area required for verification is reduced.

When coding the microprogram source, it is verified whether or not the description format of the microprogram source to be verified is described in accordance with the microinstruction specification. At this time, if there is a violation, the information of the pointed out point and the place of the violation are collected and output to the output device, so that only the description violation can be obtained before the restriction rule is verified. Realize.

The coded microprogram source has a table structure in which one step is defined as one unit, and is sorted as information of the next step in accordance with the order of a path indicated by a unique mnemonic address for each step.

According to the sorting result, an array in which each table address is stored organically is generated, and according to the array, the data sequence of the microprogram source at the path destination is searched without being searched during the restriction rule verification. This makes it possible to trace a path at the same time as determination of a restriction rule without deriving route information in advance.

Further, each step of the microprogram is divided into blocks at branch points, and information for recognizing the interrelationship between the parent block and the child block is stored in units of blocks, so that the microprogram can be passed in terms of its configuration. Get all possible route combinations.

Further, various information at the time of tracing, such as the number of cycles from the starting point, the identification information of the route, and the information of the determination result of the restriction rule are also held in block units, so that the same block reappears in the same route. (Loop), and recognizes the case of being used in a plurality of routes. For the verified part, the necessity of re-verification is determined, and if new verification is not necessary, for example, the environment is the same as that of the previous verification, the verified information is used to avoid duplication of processing.

As a method of verifying a restriction rule, for a restriction rule that needs to be determined in the direction opposite to the traveling direction of a microprogram, the issue of a microinstruction to be restricted is always recognized during tracing, and At the time of issuing the key microinstruction, by checking the record of the occurrence status of the microinstruction subject to the restriction, it is possible to replace the restriction rule with an even numbered content and not separately trace in the reverse direction, Verify the restriction rule in the reverse direction.

Further, in the present invention, by utilizing the information of the path trace, all the passing paths from each starting point to the end point on the microprogram source are combined, and all the routes are covered. Provides cycle number information from Also, the issuing status of an arbitrary microinstruction is recognized for each root, and information such as the position on the microprogram and the number of cycles from the starting point is provided. These accurate and high-speed information provision functions support performance evaluation of microprograms.

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a schematic diagram of a system according to an embodiment of the present invention. The overall configuration will be described with reference to FIG.

In FIG. 1, reference numeral 1 denotes a file storing microinstruction specifications.

Reference numeral 2 denotes a file which stores a microprogram source to be verified, which is designed and described based on the specification.

3 is from the microinstruction specification file 1,
A microinstruction specification compiling unit for extracting definition information of a microprogram such as a microprogram source description format definition information file 4, a microinstruction definition information file 5, and a restriction rule information file 6.

As means for extracting the definition information of the microprogram in 4, 5 and 6, it is also conceivable to obtain the same information from the microinstruction specification manually without passing through the microinstruction specification compiling section 3. Can be

Reference numeral 7 denotes a preprocessing unit which encodes a microprogram source and a definition information group of the microprogram,
And verification of the microprogram source description format. Reference numeral 8 denotes a file for storing the microprogram source description format violation information pointed out by the preprocessing unit 7.

Reference numeral 9 denotes a microprogram verification execution unit that executes a root trace and determines a microinstruction restriction rule.

Reference numeral 10 denotes a post-processing unit which edits output information such as a micro instruction specification restriction violation message.

Reference numeral 11 denotes a file for storing specification restriction violation information of a microinstruction.

Reference numeral 12 denotes a file for storing performance evaluation support information including pass information and cycle information of a microprogram on a route basis.

Reference numeral 13 denotes feedback of a description format violation for the microprogram source.

Numeral 14 indicates feedback such as a violation of the specification restriction of the microinstruction.

FIG. 2 is a functional block diagram showing a detailed configuration of the preprocessing unit 7 in FIG. The pre-processing unit will be described with reference to FIG.

In FIG. 2, reference numeral 201 denotes an initial setting unit for setting a microprogram source description format definition 4, a microinstruction definition 5, and a restriction rule 6. The character string of the microinstruction is replaced with a unique code from the microinstruction definition, and a microinstruction code correspondence table (FIG. 3) is created. The microinstructions in the restriction rule information are code-converted according to the correspondence table.

Reference numeral 202 denotes a microprogram source description format verification unit. Verify whether the data read from the microprogram source file is described according to the microprogram source description format definition.
If there is a violation, violation information indicating the violation location and the content is created, stored in the microprogram source description format violation information file 8 via the post-processing unit 205, and output to the output device. Violation is pointed out for all steps of the microprogram, but may be output to the output device every time a point is pointed out, or may be output after verification of all steps.

Reference numeral 203 denotes a microprogram source code conversion unit. The microprogram source that has been verified by the microprogram source description format verification unit 202 is
Edit to a data string with one step as one unit. At this time, the microinstruction is coded according to the microinstruction code correspondence table (FIG. 3) obtained from the microinstruction definition.

Reference numeral 204 denotes a microprogram source sorting unit. Microprogram source code converter 2
The data string in units of one step coded in 03 is sorted according to the path information of each step, and an organic array (FIG. 4) storing the addresses of the data string in the order of the paths is created.

Reference numeral 205 denotes a post-processing unit that edits and outputs microprogram source description violation information, and performs processing for shifting to a verification execution unit such as determination of a restriction rule.

The microprogram source description violation pointed out at 202 indicates information for identifying the location on the microprogram source, such as the mnemonic address of the violating step, as the violation location, and the description of the violation portion as the content of the violation. If a legitimate statement can be specified for the violation, it is also noted.

As a countermeasure for the case where a microprogram source description violation is pointed out, if there is at least one violation, the subsequent verification processing is interrupted, or only the violating part is eliminated in steps and only the correct part is verified. A method of implementing is conceivable. In any case, the verification of the restriction rule is avoided while the description of the microprogram source contains an error.

The microinstruction definition set in 201, the microinstruction code correspondence table, the coded restriction rule, the microprogram source data string address storage array, the starting point extraction information (described later), etc., are passed to the verification execution unit 9.

Next, the configuration of the data string after sorting by the microprogram source sorting unit 204 will be described with reference to FIG.

Numeral 401 denotes a schematic diagram of a microprogram source. Numeral 402 denotes one of microprogram sources set in the reading order through the microprogram source description format verification unit 202 and the microprogram source code conversion unit 203. This is a data string in units of steps.

Reference numeral 403 denotes a table in which addresses of sorted data strings of the microprogram source 402 are set.

Reference numeral 405 indicates the address of the data string in each step.

406 is used to set an already set array number when a path destination has appeared in the past and the address of the data string has already been stored in the array, such as when merging from one step to a plurality of steps. This is the part to do.

In step 407, when the path branches from one step to a plurality of steps, the path which is not the branch is prioritized and arranged. On the branch side, the process waits until the data string address of the branch destination is set, and the set path is set. This part sets the sequence number.

403 corresponds to the sequence [n] shown in 404
The next step is configured in the order of the paths so that the array becomes [n + 1]. However, in the case where the above-mentioned setting is made to 406 or 407, the following recognition is made. If there is a data setting in 406, it is prioritized, and the next step is array [n +
1], but a data string indicated by the address set in the set array element number. In the step where the pass ends, a special code is set and recognized as indicated by 409. These may be recognized by separately preparing a flag or the like.

Thus, an effective path trace at the time of verifying the restriction rule can be realized. Reference numeral 410 denotes starting point extraction information that summarizes the steps recognized as the starting point of the route at the time of sorting, and has a mnemonic address of the corresponding step and an array number 404.

FIG. 5 is a functional block diagram showing a detailed configuration of the verification unit 9 of FIG.

In FIG. 5, reference numeral 501 denotes an execution management unit.
The operation will be described with reference to FIG.

In the execution management unit, the preprocessing unit 7 passes the start step to the execution unit according to the generated start point extraction information 410 while the start step exists (step 601). At this time, a starting point number for route recognition in the execution unit (502) is set (step 602). When the starting step is completed (step 601), the verification processing is completed, the control is transferred to the post-processing unit 10, and the violation information, the information of the path trace result, and the like are passed.

In FIG. 5, reference numeral 502 denotes an execution unit.
A route generation / management unit 03, a restriction rule determination unit 504, and a violation information creation unit 505 are provided.

In the execution unit 502, the route generation / management unit 5
In step 03, the restriction rule is determined in each step by the restriction rule determination unit 504 while the block is managed while tracing the path. If there is a violation, the violation information generation unit 505 generates violation information. The above series of processing is repeated until generation of all routes for one starting point is completed, and control is returned to the execution management unit after completion.

Note that the restriction rule can basically be expressed as "if micro instruction A, [condition] must be micro instruction B (must not exist)."
In the following description, the microinstruction corresponding to "if the microinstruction A" is called a "key instruction", and the microinstruction corresponding to "being a microinstruction B (must not be)" is called a "target instruction". .

The route generation / management unit 503 generates a set of steps that recognizes a given step as the top of a block and recognizes a step of a path that branches or joins as one block from the start of the block. It has the function of a path trace for grasping the relationship between blocks and generating a route.

Hereinafter, the route generation / management unit 5 will be described with reference to FIG.
03 will be described. An example of block generation and an example of a data string are shown in FIG. 8, and the following description will be given as needed.

First, before block generation, it is determined whether a given step has been processed in the past (step 70).
1, 702), but the processing when the processing has been completed will be described later, and the basic flow will be described first.

At 703, a block creation process is performed. This is a part of the present invention, which simultaneously performs tracing by path block division and verification processing such as restriction rule determination.

When the block creation is completed, the created block does not have a path indicating the next step, or
Whether the microprogram source data string indicated by the path does not exist or not is determined by the microprogram source data string address storage array 403 (step 704).

If there is a next path, the path indicated by the next step is set as the head of the next block (step 705).
Then, the process returns to step 701 to repeat the above processing.

If there is no next path, it is determined whether or not a parent block exists.
Determined by If there is a parent block, the process returns to the parent block (step 707), and the processing from step 704 is repeated. If there is no parent block, the process returns to the head block of the route, and all routes that can be generated from one starting point have been verified. Therefore, the process is interrupted and control is returned to the execution management unit 501.

Next, the details of the block creation processing in step 703 will be described.

First, an area for setting block data (block setting data string = 801) is secured, and each item is cleared.

The rule being determined from the parent block,
The continuation data such as the appearance information of the target instruction is copied at this point, and the data in this block is set in an additional form (step 708).

Microprogram source data column address storage array (403) corresponding to the given step
Is set in the block setting data sequence 804 as the head of the block (step 709).

As a result, when referring to information such as a microinstruction in a corresponding step, high-speed access is possible without searching, and the data width to be set is also reduced.

The processing in the block will be described below.

First, the number of cycles from the starting point of the corresponding step is counted. In the case of the first step, the value is set to 805 of the block setting data sequence.

Next, the restriction rule judging unit 504 performs verification of the restriction rule corresponding to the corresponding step, and checks for microinstructions that need to be issued.

Finally, it is determined whether or not the next step indicated by the pertinent step is the end point of the block such as branching or merging or non-existence (step 711). If it is not the end point, return to step 710 and
The same processing is repeated. In the case of the end point, the microprogram source data string address array (40
The sequence number of 3) is 806, and the number of cycles from the starting point is 8
07 (step 712), and the block creation processing ends.

Next, referring to FIG.
4 will be described in detail.

The restriction rule determining unit 504 includes a target instruction detection unit 901, a restriction rule determination unit 902, an issue confirmation microinstruction detection unit 903, and a violation information creation unit 505.

The detection 901 of the target instruction requires determination in the direction opposite to the direction in which the microprogram proceeds, which is a feature of the present invention. The [condition] part is limited to "before issuance" and "before n cycles". In order to determine the rule, it is necessary to grasp all issuance of the target instruction before issuing the key instruction. If the target instruction exists in the corresponding step, information that clarifies the appearance position and the content, such as the code of the instruction and the number of cycles from the starting point, is set in the block setting data sequence 810.

In the determination 902 of the restriction rule, when the key instruction of each rule matches the micro instruction in the corresponding step, the appearance of the target instruction is determined. For restrictions that cannot be determined in the same step and have a range such as “n cycles or later”, the rule under determination is set to 809 in the status block setting data string, and when the corresponding target instruction appears, Make a decision at the end of the. If the step has passed in the past, and if there is no need for reprocessing due to a change in the environment or the like, the block creation processing and the like can be omitted by using the block information created in the past.

Note that it is necessary to judge the microprogram in the direction opposite to the traveling direction, which is a feature of the present invention.
Is used for the determination of the restriction rule of “before issuance” and “before n cycles”, using the target instruction appearance information from the starting point in the corresponding route, recorded in 810 of the block setting data sequence. If the target instruction is not registered and [Condition] is "issued", it is a restriction rule violation. If the target instruction is registered and the cycle of [Condition] is not satisfied, or if "Issuance is prohibited", it is a violation of the restriction rule.

By making such a determination, the determination can be performed without replacing the restriction rule in advance with the contents of the even number and without distorting the restriction contents intended by the restriction rule.

If there is a violation depending on whether or not [condition] is satisfied, the violation information creation unit 505 records the appearance position of the key instruction, the appearance position of the target instruction, the contents of the condition, and the like as the violation information. The recorded information is output to the output device by the post-processing unit 10 when the verification of all steps is completed, but may be output every time a violation is detected.

The detection 903 of the issuance confirmation microinstruction is for arbitrarily confirming the issuance position and the presence or absence of the issue regardless of the restriction rule in the specification. If there is a microinstruction corresponding to the step, information that clarifies the appearance position and contents, such as the code of the instruction and the number of cycles from the starting point, is set in the block setting data sequence 810.

In this embodiment, the setting of the detection result of the target instruction detection 901 and the detection result of the issue confirmation micro instruction detection 903 are set in the same area by using a flag to save the cost. An area may be provided and set.

Finally, steps 701 and 702 will be described.

First, it is determined whether the given step has been processed in the past (step 701).

As an example of the judging means, there is a method of setting the starting number set by the execution management section (step 602) at the end of the first processing of each step, and setting an identification flag for judging by comparing these. is there.

If the result of the determination is that processing has been completed in the past, it is determined whether reprocessing is necessary by referring to the block information set in the past (step 702). If the past information can be confirmed to be set correctly, the past information is used without generating a new block.

At this time, the connection of the blocks and the determination of the restriction rule are different from the case where the block connection is new.

In the connection of blocks, since the parent block may be different from the past, stacking is performed without overwriting (8).
03) By doing so, the route from the starting point can be continuously recognized. In addition, in the determination of the restriction rule, if there is no change in the situation such as the cycle of the step entering the block matches, the past corresponding rule recorded in the block is referred to,
For the same route, the determination result (809) is used as it is.

Thus, the processing efficiency and the saving of the used storage area can be realized by eliminating the block creation processing for the same part and the duplication judgment under the same condition and avoiding the duplication of the processing. Based on the block information created by the verification execution unit 9, if necessary, all the passing paths from each starting point to the end point are combined, and all the routes are covered. As a result, the passing paths, the number of cycles from the starting point, an arbitrary microinstruction It is also possible to recognize information such as the issuance status of each program on a route basis and to provide the position on the microprogram, the number of cycles from the starting point, and the like. In this embodiment, these information are edited by the post-processing unit 10 and output to the output device. The output example shown in FIG.
5 shows the results of evaluating the microprogram source shown in FIG.

Reference numeral 1101 denotes passing path information, which indicates only a branching step at a branching point and a merging destination step at a merging point, in addition to a start point and an end point at both ends. Further, a symbol for recognizing whether the end point is a normal end point or an interruption point such as an unknown path destination can be displayed (1104).

Reference numeral 1102 denotes the number of cycles required from the start point to the end point.

Reference numeral 1103 denotes the issuance position of the microinstruction confirmed to be issued in the issuance confirmation microinstruction detection 903, by the mnemonic address assigned to each step and the number of cycles from the starting point.

[0103]

As described above, according to the microprogram verifying method of the present invention, the following effects can be obtained.

(1) In statically verifying that a microprogram is correctly described in accordance with the restrictions on specifications, it is possible to verify specification restriction rules that have no limit on the verifiable range.

(2) When a step in the microprogram reappears in the same route or when it is used in another route, it is recognized that the step reappears, and the necessity of reprocessing is determined. Otherwise, by using the information that has already been determined and collected, it is possible to minimize the duplication of the same step and improve the processing speed.

(3) For a restriction rule that needs to be determined in the direction opposite to the direction in which the microprogram proceeds, the description content of the restriction rule is replaced in advance, or a separate backward path trace is performed for the determination. By realizing the verification without the need, the verification accuracy can be improved and the verification can be performed efficiently.

(4) The description format of the microprogram source is verified in advance, and the description violation is pointed out before the verification of the restriction rule, and the microprogram can be corrected easily by easily separating the restriction violation from the restriction rule. Can be realized.

(5) The number of cycles from each starting point to the end point of the microprogram, the passing path, and the issuance status of an arbitrary microinstruction are collected and provided in units of a root, so that the accuracy and the accuracy of the performance evaluation of the microprogram can be improved. Efficiency can be significantly improved.

[Brief description of the drawings]

FIG. 1 is a system schematic diagram showing one embodiment of the present invention.

FIG. 2 is a functional block diagram showing a configuration of a preprocessing unit of the verification method of the present invention.

FIG. 3 is a diagram showing an example of a micro-instruction code correspondence table generated in a preprocessing unit of the verification method of the present invention.

FIG. 4 is a diagram showing an example of an address storage array after sorting a microprogram source data sequence generated by a preprocessing unit of the verification method of the present invention.

FIG. 5 is a functional block diagram of a verification execution unit of the verification method of the present invention.

FIG. 6 is an operation outline flowchart of an execution management unit of the verification execution unit of the present invention.

FIG. 7 is a diagram showing a route generation / execution unit in the execution unit of the verification execution unit according to the present invention;
5 is a flowchart illustrating an operation outline of a management unit.

FIG. 8 is a diagram showing a route generation / execution unit in the execution unit of the verification execution unit according to the present invention;
FIG. 4 is a diagram illustrating an example of a configuration of a block and setting data generated by a management unit.

FIG. 9 is a functional block diagram illustrating a configuration of a restriction rule determination unit in an execution unit of a verification execution unit according to the present invention.

FIG. 10 is a functional block diagram showing a configuration of a post-processing unit of the verification method of the present invention.

FIG. 11 is an output example of microprogram performance evaluation support information.

FIG. 12 is an output example of auxiliary information (pass path from a key instruction to a target instruction) that violates the micro instruction specification restriction.

[Explanation of symbols]

1 Microinstruction specification 2 Microprogram source file 3 Microinstruction specification compilation section 4 Microprogram source description format definition information file 5 Microinstruction definition information file 6 Restriction rule file 7 Preprocessing section 8 Microprogram source description format violation information file 9 Verification execution Part 10 Post-processing part 11 Micro instruction specification restriction rule violation information file 12 Micro program performance evaluation support information file

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-177436 (JP, A) JP-A-2-83748 (JP, A) JP-A-4-289928 (JP, A) (58) Field (Int.Cl. ⁶ , DB name) G06F 11/28 G06F 9/22 380

Claims (6)

(57) [Claims] 1. A microprogram verifying method for statically verifying a specification restriction rule of a microprogram built in a computer system, comprising: reading a microprogram source to be verified from a microprogram source file; Is edited into data strings in units of one step, the data strings are sorted according to the path information of each step, and a microprogram source data string address array in which addresses of the data strings are stored according to the sorting result is generated. A microprogram verification method characterized in that a restriction rule is determined and a path trace is performed using the method. 2. A microprogram verifying method according to claim 1, wherein a combination of paths that can pass through the microprogram is traced, and when all routes are obtained, a branch point is divided into blocks. A microprogram verification method characterized in that at least information for recognizing a connection relationship between blocks, the number of cycles from a starting point, information for identifying a route, and information on a determination result of a restriction rule are recorded and retained in each block unit. 3. A microprogram verifying method according to claim 2, wherein, for a restriction rule which needs to be determined in a direction opposite to the traveling direction of the microprogram, the occurrence of a microinstruction subject to the restriction rule during a path trace is determined. A microprogram verification method comprising: always recognizing and confirming a record of the appearance status of a microinstruction subject to the restriction rule at the time of issuing a microinstruction that is a key of the restriction rule. 4. The microprogram verifying method according to claim 2, wherein the step of the microprogram source to be verified has been re-verified when the step has been verified in a loop within its own route or when used in a plurality of routes. A microprogram verification method characterized by determining the necessity of verification and, if unnecessary, using a stored verification result to avoid duplication of processing such as restriction rule determination for the same part. 5. The microprogram verifying method according to claim 2, wherein the occurrence of an arbitrary microinstruction is collected for each root, and information such as an issue position and the number of cycles is output to an output device. Program verification method. 6. The microprogram verification method according to claim 2, wherein all combinations of paths that may pass from the starting point to the end point are covered, and information such as the number of passing paths and the number of cycles is collected for each route. A microprogram verifying method for outputting to the output device.