JP2844580B2 - Image processing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to digital image processing. 2. Description of the Related Art In general, a digital copying apparatus which reads an original image by a CCD line sensor and outputs the image by a laser beam printer has been widely used because of its high speed and high image quality. In such an apparatus, an input original image is a photograph having continuous tone (hereinafter referred to as a photograph), a character or a line drawing (hereinafter referred to as a line drawing), and a printed matter composed of halftone dots (hereinafter referred to as a halftone photograph). Etc. are often mixed. It is well known that in a laser beam printer based on electrophotography, an output method using dot concentration type dither matrix threshold (hereinafter referred to as halftone dot) is an excellent halftone expression. I have. In such a method, when a mixed image of a line drawing and a photograph is halftone-dotted, a smooth halftone expression is performed in a portion of the photograph, but the halftone dot is cut off in the line drawing. In particular, it is difficult to read even complex characters such as kanji. It is considered that this is because the boundary of 1.0 when binarized by the dither matrix threshold does not always coincide with the contour part after the image. In order to improve the resolution degradation, it has been proposed to emphasize the high band of the image signal having the outline information of the image, but with the support of software of an electronic computer. Also, when a halftone picture is input, since the halftone dot itself has a very strong periodicity, if the halftone dot is re-dotted using a dither matrix, the periodicity of the halftone dot of the original image and the periodicity of the dither matrix interfere with each other. Therefore, mutual beats occur and so-called moire fringes appear. As a result, the quality of the output image quality is significantly reduced, and the high image quality as a laser beam printer cannot be sufficiently exhibited. [Purpose] The present invention has been proposed to solve such a problem, and performs a predetermined smoothing process and a contour emphasizing process on a multi-valued image signal so that the image quality is independent of the type of the original image. It is an object of the present invention to propose an image processing device capable of obtaining an image with good quality. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment Hereinafter, a first embodiment of the present invention will be described in detail. First, FIG. 1 shows an example of a schematic configuration of an image recording apparatus to which the present invention is applied. In the illustrated configuration example, a light beam modulated by an image signal from a semiconductor laser 11 is incident on a rotating polygon mirror 12 via a collimating lens 10 and deflected, and the deflected light beam is converted by an imaging lens 13 into a photosensitive drum 3. The photosensitive layer is scanned by forming an image thereon. At the time of the light beam scanning, the reflected light from the mirror 14 disposed at the tip of the line scanning is detected by the photodetector 15 to form a line scanning synchronization signal. FIG. 2 schematically shows an image input apparatus to which the present invention is applied. In the illustrated configuration example, the light source 22
An image of the original 21 illuminated by the above is formed on the CCD line sensor 24 by the lens 23, and an output signal is obtained. CCD
The direction of the line sensor 24 is the main scanning direction. Manuscript 21
The sub-scan is performed by the relative movement of the CCD line sensor 24 with respect to, and a two-dimensional image output is obtained. FIG. 3 is a block diagram showing a signal processing system for an image signal obtained from an image input device. CC
An analog image signal from the D line sensor 30 is subjected to density conversion by an analog-LOG conversion circuit 31. The signal is then converted into a 6- to 8-bit digital signal by the A / D converter 32, and the next shading correction circuit 33
, The shading correction is performed. Such signal processing is performed by storing shading data of a white board in a RAM in advance and subtracting the shading data from the obtained image data. Next, smoothing in the main scanning direction is performed by a smoothing circuit 34, an edge portion is enhanced by an edge enhancement circuit 35, γ-converted by a γ conversion circuit 36, compared with a dither threshold by a dither circuit 37, and binarized (or multi-valued). Value) and output. FIG. 4 shows a one-row filter matrix for smoothing. The principle of one-dimensional smoothing is performed by convolving a spatial filter with respect to continuous pixels in the main scanning direction (convolution). FIG. 4A shows three consecutive pixels.
Is a case where smoothing is performed on two consecutive pixels. Taking the case of the filter of FIG. 4A as an example, the one-dimensional convolution is given by: ## EQU1 ## Here, p is image data, a is a weighting factor, _aj = 1/3 in FIG. 4A, and i is a pixel number in the main scanning direction. The physical meaning of such one-dimensional convolution is that, when the input image is a halftone dot picture, halftone dots are blurred by performing smoothing by one-dimensional convolution to suppress the occurrence of moire. The reason why the convolution is performed in one dimension in the main scanning direction (that is, in the longitudinal direction of the CCD line sensor 24) is that the sub-scanning direction is usually performed by moving the CCD line sensor 24. The aperture function (aperture function) increases and the MTF (MODULA
TION TRANSFER FUNCTION) decreases, and when the horizontal scanning line is finer than the vertical line, such as the Mincho type of Chinese characters, when the main scanning direction matches the horizontal line of the Chinese character, the level of the horizontal line decreases when smoothing is performed two-dimensionally This is because they may overdo it. FIG. 5 is a detailed view of the smoothing circuit shown in FIG. 4A for performing smoothing on three consecutive pixels. The input signal 41 to the smoothing circuit is input to one-pixel delay circuits 42a, 42b, 42c,
2a, 42b, and 42c simultaneously output signals of three pixels together with the two preceding and succeeding pixels (Z in the figure represents one element of the delay circuit; the same applies hereinafter). The output data is added by the adder 43 and is divided by 1 by the division circuit 44 to obtain an output signal 45. Each delay circuit can be easily realized by combining two ordinary D-type flip-flops. The adder 43 can be realized by combining two 2-input adders. The division circuit 44 can be configured as a normal divider, but paying attention to the fact that the maximum value of the dividend is limited, the input data is stored in the input address of the ROM using the ROM (for example, image data of 16 gradations). If there are, ROM address lines are a maximum of 6 lines) and the result is RO
If the output data of M is configured, a high-speed divider can be configured with a simple circuit configuration. The effect of the smoothing circuit configured as described above is firstly an effect of suppressing moiré fringes caused by a halftone dot photograph having a high number of lines, and secondly, the effect of the next-stage edge enhancement circuit. There is an effect as pre-processing. That is, when the edge is emphasized by the edge emphasis, the noise is prevented from being erroneously emphasized. FIG. 6 is a diagram of a 5 × 5 filter matrix for edge enhancement, which is usually called Laplacian.
7A and 7B are block diagrams of a circuit for applying such Laplacian to an image signal. The line memories 60a to 60f in FIG. 7A
Have a length corresponding to one line in the main scanning direction and a depth corresponding to the gradation. In addition, since the Laplacian of FIG. 6 is a 5 × 5 matrix, a maximum of six line memories is sufficient. First, as the data 45 after the smoothing processing, one of the line memories 60a to 60f is selected by the selector 50, and one line of data in the main scanning direction is written to the line memory. The writing order is 1 pixel by 1 pixel.
The data is written in one line memory, and is written to the next line memory after one line is scanned. Therefore, for example, the order is 60a → 60b → 60c → 60d → 60e → 6
0f → 60a... The retrieval of data from the line memory is performed through the selector 51. Now, _assuming that the elements of the matrix in FIG. 6 are b _ij , each pixel after conversion is represented by the following equation. ## EQU1 ## Also, the matrix elements b _{ij which} are not 0 in FIG. 6 are b ₁₃ = -1, b ₃₁ = -1, b ₃₃ = 5, b ₃₅ = −
Since 1, b ₅₃ = −1 only, when taking out the pixel from the line memory for calculation, it is not necessary to take out all the pixels and calculate, and the pixels corresponding to b ₁₃ , b ₃₁ , b ₃₃ , b ₃₅ , b ₅₃ It is only necessary to take out only. For example, while the line memory 60a is being written, the data in the line memories 60b, 60d, and 60f are extracted, and when the line memory 60b is being written, the data in the line memories 60c, 60e, and 60a are extracted. In this way, a large-scale circuit configuration can be prevented. Further, the selector 51 has a line memory 60a.
To 60f at the same time, three pixels of the same column are extracted at the same time, and the extracted data is output to two-pixel delay circuits 52a, 52b, 5
2c, 52d, data 53a, delayed by two pixels
Output as 53b, 53x, 53c, 53d. These delayed pixels correspond to the aforementioned b ₁₃ , b ₃₁ , b ₃₃ , b
_35, b ₅₃ that is a pixel corresponding to the apparent ease. Accordingly, the Laplacian of FIG. 6 is applied to the circuits 53a, 53b and 53 input to the circuit shown in FIG. 7B.
This is equivalent to performing addition and subtraction on each of the inputs c, 53x, and 53d. That is, the input 53x is multiplied by 4 in the multiplier 58, and the products 53a, 53b, 53
c and 53d are respectively subtracted. The output of the adder / subtractor 55 is input to the adder 56. On the other hand, 53x is multiplied by α by the multiplier 54 and input to the adder 56. Now, α = 1
In the end, the center pixel is 5 by the multipliers 54 and 58.
This means that the Laplacian shown in FIG. 6 has been applied. In this embodiment, the center pixel is emphasized five times as in the Laplacian shown in FIG. However, by changing the multiplier α of the multiplier 54 as shown in FIG. 7B, the degree of edge enhancement, that is, the degree of sharpening can be changed. The circuit of FIG. 7B can be created as follows. The adders / subtractors 55 and 56 can be constituted by ordinary adders. Since the multiplier 58 only multiplies by four, it can be substituted by shifting up by two bits to the higher order in the delay circuit 52b. The multiplier 54 can be realized by a ROM, like the divider of the smoothing circuit. That is, the input data 53x
Is the lower input address signal of the ROM, and the magnification α is RO
What is necessary is just to use the output data of the ROM as the multiplication result as the input address signal higher than M. For example, when a bipolar PROM (programmable read only memory) MB7142H manufactured by Fujitsu Limited is used, this PRO
M has a memory capacity of 4K × 8 bits and there are 12 input addresses. Therefore, if the upper four addresses are assigned to α, the lower eight addresses can be assigned to 53x. Accordingly, 16 (= 2 ⁴ ) different edge enhancement levels can be realized as α. Also, 53x is sufficient for use because 8 bits can express up to 256 gradations. FIG. 8 is a frequency response diagram of the spatial filter shown in FIGS. 5, 7A and 7B. The horizontal axis is the spatial frequency,
The vertical axis indicates the MTF value. In the figure, 62 indicates original image data, 63 indicates an MTF value by smoothing processing, and 64 indicates an MTF value by edge enhancement. The moire frequency (indicated by the arrow in the figure) is suppressed by smoothing, and the relatively low frequency range is enhanced by edge enhancement. When the edge emphasis frequency has a resolution of 16 pel / mm, sufficient sharpness can be expressed when viewed from the position of the clear visual distance. FIG. 14 shows one-dimensional frequency characteristics of such smoothing and edge enhancement. In the figure, 180 is smoothing of two pixels, 181 is smoothing of three pixels, 1
Reference numeral 82 denotes the aforementioned edge enhancement (5 × 5 filter in FIG. 6).
3 shows the frequency characteristics of the data. As can be seen from the figure, the center frequency to be emphasized by the edge emphasis is 4 pel / mm in this case, and the frequency of the first zero point (the frequency which becomes 0 first) by smoothing is 8 pel in the case of 180. / 181 and 5.3 pel / mm. Therefore, the frequency to be reduced by smoothing (4 or 5.3 pel / m
m) is the frequency (4 pel /
mm). This is because the matrix size (or dimension) for edge enhancement is larger than the size of the one-dimensional filter for smoothing.
The purpose of making the edge enhancement matrix size larger than the smoothing one-dimensional filter size is that it is not possible to apply too much smoothing in order to avoid deterioration of resolution of characters and the like due to smoothing. <Second Embodiment> In the smoothing circuit of FIG. 5 described in the first embodiment, if the read image is sampled at a sampling point of 16 pel / mm, there is an effect on a halftone dot photograph finer than 120 lines. I understand. However, if an attempt is made to suppress moiré fringes in a coarse halftone picture having a size smaller than that, smoothing of about two or three pixels is not enough. Further, even if the size of the filter for smoothing is simply increased, the sharpness of the line drawing is only lost. Accordingly, in the second embodiment, the halftone dots are coarse (1 from 85 lines).
Moire does not occur even for halftone dots.
It is another object of the present invention to obtain an image that does not lose sharpness. The block configuration of the image processing apparatus according to the second embodiment also has the block configuration shown in FIG. However, in the second embodiment, the configuration of the edge emphasizing circuit 35 is different from that of the first embodiment. That is, as described above, the edge emphasizing circuit 35 attempts to deal with the problem that has occurred with the coarse halftone dot photograph. FIG. 9 is a block diagram of the next-stage edge emphasizing circuit 35 following the smoothing circuit 34. The output 45 of the preceding-stage smoothing circuit is input to the edge amount detection circuit 100 and the smoothing circuit 101 in FIG. From the output 45, the edge portion of the image is extracted by the edge amount detection circuit 100, emphasized α times by the multiplier 102, and the output is input to the adder 103. On the other hand, the image signal further smoothed by the smoothing circuit 101 is also input to the adder 103.
The occurrence of moire fringes is suppressed by the smoothing performed twice by the smoothing circuits 34 and 101. Adder 1
The moire fringes are suppressed in the image synthesized by 03, and the sharpness is not lost. FIG. 10 shows a Laplacian filter matrix employed in the edge amount detection circuit 100. FIG. 11 shows a filter matrix used in the smoothing circuit 101. FIG. 13A is an arithmetic circuit diagram for applying the Laplacian of FIG. 10, and FIG. 13B is an arithmetic circuit diagram for applying the eleventh smoothing filter. FIG. 12 is a circuit diagram for extracting an arbitrary pixel for applying the above two filters. In FIG. 12, each of the line memories 160a to 160f has a length corresponding to one line in the main scanning direction and a depth corresponding to the gradation. Also, selectors 150 and 15
1 can select an arbitrary pixel in the line memories 160a to 160f. The image data 45 processed by the smoothing circuit 34 is supplied to the line memory 1 by the selector 150.
One of 60a to 160f is selected, and one line of data in the main scanning direction is written. The writing order is written into one line memory one pixel at a time, and is written to the next line memory after one line is scanned. For example, 160a → 160b → 160c → 160d →
160e → 160f → 160a... The data is taken out from the line memory through the selector 51. That is, the line memory 16
While writing 0a, the line memories 160b, 160
c, 160d, 160e, and 160f. or,
While the line memory 160b is being written, the line memory 1
Take out from 60c, 160d, 160e, 160f, 160a. Thereafter, it is taken out in the same procedure. The fetched data is a two-pixel delay circuit 152
a, 152b, 152c, 152d and one-pixel delay circuits 153a, 153b, 153c, 153d. FIG. 13A is a circuit diagram of a part of the edge amount detection circuit 100 for performing the Laplacian operation of FIG. 10 together with the delay circuit of FIG. As described in the first embodiment, the Laplacian of FIG. 10 can exclude the zero part of the matrix element, and the input signals to the circuit of FIG. 13A are 154a, 154b, 154c, 154d, 1
Only 54x is required. Inputs 154a, 154b, 154c, 15
4d is added by the adder 155. On the other hand, the center image input 154x is quadrupled by the multiplier 158. A subtractor 156 subtracts the sum of the four inputs from the product to obtain an output signal 157. Thus, an image signal whose edge portion is extracted and emphasized is obtained. FIG. 13B shows an arithmetic circuit for performing the smoothing of FIG. Assuming that the portion corresponding to the matrix element 0 is excluded as in the case of FIG.
2 outputs 154e, 154f, 154g, 154h, 1
Only 54x is extracted and input to the adder 170 in FIG. 13B, and is divided by 52 in the divider 171. Thus, the smoothing shown in FIG. 11 is performed. On the other hand, the output signal of the edge amount detection circuit 100 is multiplied by α by the divider 158. By changing the value of α, the degree of edge enhancement can be changed. In this way,
The image signal 104 obtained from the adder 103 has the following characteristics. In order to suppress the occurrence of moiré fringes even in the halftone pictures of lines 65 to 85 having coarse blind spots in the smoothing circuit 34 of the first embodiment, it is necessary to cover a considerably wide area (that is, a large size smoothing filter matrix). Smoothing must be performed). However, when such a wide range of smoothing is plowed, the sharpness of the line drawing is lost, and the edge enhancement circuit 35 at the next stage no longer has an effect. Further, the thickness of the edge becomes thick, and the delicateness of the image becomes unnatural. Therefore, in the second embodiment, the pre-stage smoothing circuit 34 removes noise as pre-processing for edge detection in the post-stage, and suppresses the occurrence of moire caused by halftone photographs of 120 lines or more. Further, smoothing is further performed by a smoothing circuit 101 at the subsequent stage to suppress the occurrence of moire due to a halftone dot photograph, while the edge portion of the image does not pass through the smoothing circuit 101 and the edge amount detection circuit 100
, And further emphasized by the multiplier 102 and combined with the output of the smoothing circuit 101, so that the sharpness of the image is not lost. Further, as a result of the twice smoothing processing of the image, the occurrence of moiré fringes is suppressed, and a processed image independent of the straightness and angle of the halftone dot photograph is obtained. Next, an example of a specific circuit configuration of the edge amount detection circuit 100 shown in the second embodiment and others will be described. The image delay circuit can be constituted by a normal D-type flip-flop as shown in the first embodiment. Similarly, the divider 171 also outputs RO
M makes it easy to obtain a fast divider. Multiplier 158 is also provided by delay circuit 153b in the same manner as in the first embodiment.
It can be substituted by bit-up. Also, the multiplier 102 can be configured by using a bipolar PROM, MB7142H manufactured by Fujitsu Limited, just like the multiplier 154 of the first embodiment. Although the present embodiment has been particularly described using a laser beam printer, this is merely an example of a display device, and it goes without saying that the present invention can be applied to other display devices such as a liquid crystal panel and a facsimile. . Similarly, other drawings are merely examples for the purpose of describing the embodiments. As described above, according to the image processing apparatus of the embodiment of the present invention, in the processing of an image in which a continuous tone photograph, a line drawing, a halftone dot photograph, and the like are mixed, a smoothing process is performed in a preceding stage. By performing contour enhancement at a later stage, faithful reproduction of the original image is realized with a relatively small-scale circuit, and there is an effect of suppressing generation of moire fringes even in a halftone picture having 120 lines or more. As described above, the image processing apparatus of the present invention smoothes the multi-valued image signal of the target pixel by using the multi-valued image signal included in the first block including the target pixel. Then, contour enhancement is performed using a multi-valued image signal included in a second block larger than the first block and including the target pixel. Therefore, even if the input image is a mixture of various images, the outline emphasis is such that noise is not unnecessarily emphasized in the outline portion, and the original outline is maintained and emphasized. .
In particular, in smoothing, a decrease in MTF in a direction perpendicular to the line direction can be suppressed, and deterioration of the contour can be prevented. Therefore, according to the present invention, an image with good image quality can be obtained regardless of the type of the original image.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram schematically illustrating an image recording apparatus to which the present invention is applied. FIG. 2 is a diagram schematically illustrating an image input device to which the present invention is applied. FIG. 3 is a block diagram of an image processing apparatus to which the present invention is applied. FIG. 4A is a matrix diagram of a smoothing filter for three consecutive pixels. FIG. 4B is a smoothing filter matrix diagram for two consecutive pixels. FIG. 5 is a configuration diagram of a smoothing circuit 34; FIG. 6 is a circuit configuration diagram of an edge emphasizing circuit 35 in the first embodiment. FIG. 7A is a circuit configuration diagram of an edge emphasizing circuit 35 in the first embodiment. FIG. 7B is a circuit configuration diagram of the edge emphasizing circuit 35 in the first embodiment. FIG. 8 is a frequency response diagram of the spatial filter of the first embodiment. FIG. 9 is a circuit configuration diagram of an edge emphasizing circuit 35 in the second embodiment. FIG. 10 is a diagram illustrating Laplacian applied in the second embodiment. FIG. 11 is a diagram illustrating a spatial filter applied to a smoothing circuit 101 according to a second embodiment. FIG. 12 is a partial circuit diagram of an edge emphasizing circuit 35 according to a second embodiment. FIG. 13A is an edge amount detection circuit 10 according to the second embodiment.
It is a figure of a calculation part of 0. FIG. 13B is a circuit diagram of a calculation unit of the smoothing circuit 101 according to the second embodiment. FIG. 14 is a one-dimensional frequency characteristic diagram obtained by smoothing and edge enhancement. [Description of Signs] 34 Smoothing circuit 35 Edge enhancement circuits 42a to 42c, 153a to 153d One-pixel delay circuits 60a to 60f, 160a to 160f Line memories 52a to 52d, 152a to 152d Two-pixel delay circuits 44, 171 Divider 54, 58, 102, 158 Multipliers 43, 56, 103, 155, 170 Adders 55, 156 Addition / subtraction units

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yoshinobu Mita 3- 30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc. (72) Inventor Yuji Nishigaki 3- 30-2 Shimomaruko, Ota-ku, Tokyo (56) References JP-A-55-58670 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04N 1/40-1/409 H04N 1/46 H04N 1 / 60

Claims (1)

(57) [Claims] Input means for inputting a multi-valued image signal for each pixel on a line-by-line basis; and a multi-valued image signal of the pixel of interest input by the input means, comprising a plurality of pixels including the pixel of interest.
And a smoothing means for smoothing using a multi-valued image signal included in the one-dimensional block in the line direction, and a multi-valued pixel of the target pixel smoothed by the smoothing means. The image signal is contoured by using a multi-valued image signal included in a two-dimensional block of a second size larger than the first size, which is a block composed of a plurality of pixels including the target pixel. An image processing apparatus having an outline emphasis unit for emphasizing.