JP2844674B2 - Test equipment for solid-state imaging devices - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test apparatus for testing characteristics of a solid-state imaging device having a function of monitoring an incident light level.

[Prior Art] Some solid-state imaging devices have a light receiving unit for monitoring. The charges photoelectrically converted in the light receiving unit are accumulated therein and used for monitoring the amount of light received by the solid-state imaging device. This monitor output is used for adjusting the sensitivity of the solid-state imaging device, and is also used for testing the solid-state imaging device. That is, if the illuminance is constant, the monitor output increases in proportion to the time. By testing the sensor output of the image sensor when the output reaches a certain level, the monitor output is output when the solid-state image sensor receives a certain amount of light. Output characteristics can be obtained.

FIG. 2 shows a conventional solid-state imaging device testing apparatus using this kind of monitor output. As shown in the figure, a device under test (hereinafter, referred to as a DUT) 5 which is a solid-state imaging device is applied with a predetermined voltage from a voltage source 4 controlled by a control circuit 1. 9 is supplied from the pattern generator 2 receiving the pattern 9 via the driver 3 to the pattern (drive clock pulse for the image sensor). The DUT 5 receives the light irradiation and outputs a monitor output 15 and a sensor output 16. The former is read by the control circuit 1 after being measured by the voltmeter 14, and the latter is A / A
After being input to the storage circuit 11 via the D converter 10, it is read out to the control circuit 1 as a readout signal 13.

This device operates as follows. Upon receiving the start signal 9 from the control circuit 1, the pattern generator 2 generates a pattern and drives the DUT 5. The monitor light-receiving element in the DUT 5 and the light-receiving element of each pixel discharge the electric charge accumulated so far and newly start accumulating the photoelectric conversion electric charge. The monitor output that increases with time is measured by the voltmeter 14. This measured value is read by the control circuit 1, and it is determined in the circuit whether the value has reached a set value. If it has not reached the set value, repeat measurement and reading until it reaches
When the set value is reached, the control circuit 1 generates a start signal 9. The pattern generator 2 which has received the start signal 9 regenerates from the first pattern and generates a write signal 12 to the storage circuit 11.

Depending on the restart pattern of pattern generator 2, DUT5
The video signal formed inside is output outside the DUT 5 as the sensor output 16. This sensor output 16 is output from the A / D converter 10
And is stored in the storage circuit 11 at the timing of the write signal 12. The control circuit 1 reads the stored data with the read signal 13 and performs a test.

[Problems to be Solved by the Invention] In the above-mentioned conventional solid-state imaging device test apparatus, a control circuit determines whether or not a monitor output reaches a set value while measuring a monitor output with a voltmeter, and regenerates a pattern. The control circuit reads and monitors the time when the voltmeter measures the monitor output.
The monitor output is changed during the delay of the judgment time, and the test at the set value cannot be performed during that time. That is,
If the measured value is the set value, the monitor output will increase by the delay of reading / judgment.If the measured value is smaller than the set value and the set value is passed during reading, the specified value will be exceeded. After that, many steps of judgment, measurement, reading, and judgment must be passed, so that the delay time becomes longer and the amount of change in the monitor output increases, making it impossible to perform an accurate test.

[Means for Solving the Problems] A test apparatus for a solid-state imaging device according to the present invention includes a pattern generator that supplies a pattern to a DUT, and a sensor output of the DUT when a monitor output of the DUT reaches a predetermined level. The control circuit includes a control circuit for testing characteristics and a comparator for determining whether the monitor output of the DUT has reached a predetermined level. When the monitor output of the DUT reaches a predetermined level, the comparator sends a restart signal to the pattern generator, and upon receiving this signal, the pattern generator regenerates the pattern from the beginning and sends it to the DUT. Output the sensor output.

Example Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.
In this figure, the same parts as those of the conventional example shown in FIG. 2 are denoted by the same reference numerals. The difference of this embodiment from the conventional example shown in FIG. 2 is that the monitor output 15 of the DUT 5 is measured by the voltmeter 14 and the value is read and judged by the control circuit in the conventional example. The monitor output 15 of the DUT 5 is compared with the set value of the level value setting circuit 8 set via the control circuit 1. When the monitor output reaches the set value, the comparator 6 which generates a restart signal 7 to the pattern generator. Is provided.

This test apparatus operates as follows. The control circuit 1
The set voltage is applied to the DUT 5 via the voltage source 4, and a start signal 9 is generated for the pattern generator 2. The pattern generator 2 receiving the start signal generates a pattern and applies the pattern to the DUT 5 via the driver 3. Upon receiving this pattern, each light receiving element (including the monitoring light receiving element) of the DUT 5 once discharges the photoelectric conversion charge accumulated up to that time, and then newly starts accumulating the photoelectric conversion charge. The level value of the monitor output 15 gradually increases, and the restart signal 7 is output from the comparator 6 which reaches the set value of the level value setting circuit 8, and is input to the pattern generator 2. Upon receiving this signal, the pattern generator 2 regenerates from the first pattern,
A write signal 12 is generated. Sensor output from DUT5
16 is converted into a digital signal by the A / D converter 10 and stored in the storage circuit 11 at the timing of the write signal 12. The control circuit 1 reads out the stored data as a read signal 13 and performs a test.

[Effects of the Invention] As described above, the present invention compares a level of a monitor output of a DUT with a set value level, and when both match, a comparator that issues a restart signal to a pattern generator. Therefore, according to the present invention, there is almost no delay from the time when the monitor output reaches the set value to the time when the pattern is regenerated, and the test of the sensor output when the monitor output is the predetermined value is performed. It is possible to do.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
It is a block diagram of a conventional example. 1 ... control circuit, 2 ... pattern generator, 3 ... driver, 4 ... voltage source, 5 ... DUT (device under test), 6 ...
Comparator, 8: Level value setting circuit, 10: A / D converter, 11: Storage circuit, 14: Voltmeter.

Claims (1)

(57) [Claims] A pattern generator for supplying a predetermined pattern to the device under test; and a control circuit for testing a sensor output of the device under test when a monitor output of the device under test reaches a predetermined level. In the solid-state imaging device test apparatus, the pattern generator restarts the pattern generation in response to a restart signal of a comparator that determines whether the monitor output has reached a predetermined level. Characteristic solid-state imaging device testing device.