JP2844895B2 - High breakdown voltage amorphous silicon thin film transistor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a thin film transistor used for driving an electrostatic plotter head or the like, and in particular, to a high withstand voltage having a high withstand voltage and uniform element characteristics. The present invention relates to an amorphous silicon thin film transistor.

(Prior Art) The structure of a high-breakdown-voltage amorphous silicon (a-Si) thin film transistor (TFT) used as a conventional head for an electrostatic plotter has an element structure shown in the sectional explanatory view of FIG.

As shown in FIG. 2, this high-breakdown-voltage a-Si thin film transistor has a chromium (Cr) layer on an insulating substrate 11 made of glass or the like.
And the like, a gate insulating film 13 of a silicon nitride film (SiN _x ) covering the gate electrode 12, and an intrinsic (intrinsic) deposited on the gate insulating film 13.
Channel layer 14 of amorphous silicon (ia-Si)
A channel protection film 15 made of SiN _X for protecting the channel layer 14 provided on the gate electrode 12;
A source electrode 17a and a drain electrode 17b formed of Cr,
Ohmic contact layers 16a and 16 made of n ⁺ amorphous silicon (n ⁺ a-Si) for forming ohmic junctions between the channel layer 14 and the source electrode 17a and the drain electrode 17b.
This was an inverted staggered transistor provided with b.

By providing an offset region L2 between the gate electrode 12 and the drain electrode 17b as shown in FIG. 2, the breakdown voltage of the thin film transistor element can be increased.

The region from the end of the channel protective film 15 on the source electrode 17a side to the end of the gate electrode 12 on the drain electrode 17b side is defined as a channel region L1, and the end of the channel protective film 15 on the drain electrode 17b side is connected to the gate electrode 12. The offset region L2 extends to the end on the drain electrode 17b side.

Further, an interlayer film made of a polyimide insulating film covers the end of the gate electrode 12 on the drain electrode 17b side, that is, the portion of the channel region L1 on the drain electrode 17b side and the portion of the offset region L2 on the source electrode 17a side. A field plate electrode 19 is formed of aluminum (Al) or the like via 18 and a voltage is applied to the field plate electrode 19 to stably control an electron inflow path from the channel region L1 to the offset region L2. Therefore, the change over time of the thin film transistor element is reduced, and stable and favorable characteristics of the thin film transistor element can be obtained.

When the above-mentioned high-breakdown-voltage a-Si thin film transistor element is used, for example, as a head for an electrostatic plotter, as shown in the inverter circuit diagram of FIG. 3, a driving TFT unit having no normal offset region for driving a gate input voltage 20 and n ⁺ a−
An inverter is constituted by the resistor portion 21 using Si, and these are integrated to form an array.

When forming an array as a head for an electrostatic plotter, a high withstand voltage a-Si thin film transistor (TF
As shown in the plan view of T), taking into account that the spacing between the elements must be reduced in order to increase the degree of integration of the elements, the lead-out portion of each electrode is a high withstand voltage a-Si thin film transistor. It is desirable to draw out in the longitudinal direction.

In addition, the gate (G) of a high voltage a-Si thin film transistor
Electrode 12, source (S) electrode 17a, field plate (F
It is desirable that the lead portion of the P) electrode 19 be disposed on the side opposite to the direction in which the lead portion of the drain (D) electrode 17b is drawn.

For example, as shown in the inverter circuit diagram of FIG. 3, a voltage of 100 V is applied to the field plate (FP) electrode, a voltage of 500 V is supplied as VHH, and a gate-on voltage is applied to the gate (G) electrode. Given 20V,
The potential of the drain (D) electrode becomes almost close to VHH of 500 V, and the lead portion of the high-voltage drain (D) electrode 17b and the lead portion of the other electrode must eventually cross the insulating layer. The drain (D) electrode
This is because a short circuit is likely to occur between the lead portion of 17b and the lead portion of another electrode and between the VHH supply line and the lead portion of another electrode, which may cause a defect in the product. .

That is, in the high-density array, the portion crossing the high-voltage line must be reduced as much as possible in order to improve the yield, so that the drawing state is as shown in FIG.

In addition, if the lead portion of the field plate electrode 19 and the lead portion of the gate electrode 12 are arranged close to each other, a short circuit may occur between the lead portions of the two electrodes. In FIG. 4, the lead portion from the gate electrode 12 and the source electrode 17a are arranged at the lead portion at the TFT end.
When the area of the crossing with the lead-out portion was made as small as possible, the possibility of occurrence of a short circuit between the two electrodes was reduced, and the yield could be improved.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional high-breakdown-voltage a-Si thin film transistor, as the density of the array is increased, the gate (G) electrode, the source (S) electrode, and the field plate (FP) electrode are reduced. While the distance between the electrodes is very small, the patterning accuracy is limited when arrayed on a large area substrate, and the source (S) at point A in FIG. 4 is limited.
The distance X between the electrode and the field plate (FP) electrode varies within the patterning accuracy, and therefore the position of the source electrode 17a at the TFT end indicated by the point A is shifted toward the gate electrode 12 in some cases. , Or toward the field plate electrode 19 side, especially when the source electrode 17a comes very close to the field plate electrode 19,
Even if the gate electrode 12 is off, the voltage applied to the field plate electrode 19 brings the state close to the gate on state, so that a leak current is easily generated from the drain electrode 17b to the source electrode 17a. Interval X
However, there is a problem in that the variation in TFT characteristics increases the variation in TFT characteristics.

The present invention has been made in view of the above circumstances, and has as its object to provide a high-breakdown-voltage amorphous silicon thin film transistor having uniform element characteristics irrespective of variations in pattern accuracy in a manufacturing process.

(Means for Solving the Problems) The present invention for solving the conventional problems described above provides a gate electrode, a gate insulating film, a channel layer, a channel protective film, a source electrode, a drain electrode on a substrate. A high-breakdown-voltage amorphous silicon thin-film transistor having a field plate electrode on the top so as to cover an end of the gate electrode on the drain electrode side, wherein an offset region is provided between the gate electrode and the drain electrode. The lead portion, the lead portion from the gate electrode, and the lead portion from the field plate electrode are pulled out in the same direction, and the lead portion from the gate electrode is drawn out to the drain electrode side from the lead portion of the source electrode. And

(Operation) According to the present invention, in a high-breakdown-voltage amorphous silicon thin film transistor, a lead portion from a source electrode and a lead portion from a gate electrode are pulled out in a direction opposite to a direction in which a lead portion from a drain electrode is drawn. The lead-out part from the electrode is located farthest from the drain electrode, and the lead-out part from the gate electrode is placed next, so even if there is variation in patterning accuracy in the manufacturing process, the source electrode and the drain electrode Leakage current is less likely to occur in between, and uniform transistor element characteristics can be obtained.

(Example) An example of the present invention will be described with reference to the drawings.

FIG. 1 is an explanatory plan view of a high breakdown voltage amorphous silicon thin film transistor (high breakdown voltage a-SiTFT) according to one embodiment of the present invention. Portions having the same configuration as in FIG. 2 or FIG. 4 are denoted by the same reference numerals and described.

The configuration of the high-breakdown-voltage a-SiTFT of this embodiment is as shown in FIG. 1, and its cross section is the same as the configuration shown in the cross-sectional explanatory view of FIG.

That is, a gate electrode 12 formed of chromium (Cr) or the like on a substrate 11 of glass or the like, a gate insulating film 13 of a silicon nitride film (SiN _x ) covering the gate electrode 12, Channel layer of intrinsic amorphous silicon (ia-Si) as a semiconductor active layer deposited on the substrate
14 and a channel layer provided above the gate electrode 12
SiN _X channel protective film 15 for protecting 14 and high-concentration impurities provided on channel layer 14 were mixed.
an ohmic contact layer 16 (16a, 16b) for an ohmic contact of n ⁺ amorphous silicon (n ⁺ a-Si);
A source electrode 17a and a drain electrode 17b made of chromium (Cr) provided on the ohmic contact layer 16 to prevent diffusion, an interlayer insulating film 18 of a polyimide insulating film coated on the channel protective film 15, It is constituted by a field plate electrode 19 of aluminum (Al) provided on the interlayer film 18.

Then, a source electrode 17a and a drain electrode 17b are respectively formed on the ohmic contact layers 16a and 16b divided by the channel protective film 15.

The offset region L2 is provided between the gate electrode 12 and the drain electrode 17b so that the high withstand voltage a-Si thin film transistor of this embodiment also has a high withstand voltage. Offset area L2
The term “region” refers to a region from the end of the channel protective film 15 on the drain electrode 17b side to the end of the drain electrode 17b of the gate electrode 12.

In addition, a region from the end of the source-side channel protective film 15 to the end of the drain-side gate electrode 12 is a channel region L1.

Next, a method of manufacturing the high-breakdown-voltage a-Si thin film transistor will be described below.

Cr is deposited on a substrate 1 such as glass to a thickness of about 500 °. A pattern of the gate electrode 12 is formed through a photolithography process. A silicon nitride film (SiN _x ) is formed as a gate insulating film 13 using SiH ₄ and NH ₃ by a plasma CVD method for about 3000.
Channel layer 1 by plasma CVD using SiH ₄
About 500Å about the i-a-Si is 4 at a temperature of 250 ° C. to 300 ° C., a SiN _X as a channel protective film 15 by using SiH ₄ and NH ₂ 2
Deposits continuously at a temperature of about 1500 ° C at 00 ° C to 270 ° C.

Next, a resist pattern of the channel protective film 15 is formed through a photolithography process, and etching is performed with a mixed solution of HF and NH ₄ F to form a pattern of the channel protective film 15. After removing the resist, a pattern of the channel layer 14 is formed through another photolithography process.

Through the degreasing and washing step, PH ₂ and Si by plasma CVD
Using H ₄ , n ⁺ amorphous silicon (n ⁺ a-Si) as the ohmic contact layer 16 is deposited to a thickness of about 1000 °. Then, Cr which becomes the source electrode 17a and the drain electrode 17b
Is deposited to a thickness of about 1500 mm. After patterning Cr through a photolithography process, and subsequently patterning n ⁺ a-Si by etching using a mixed solution of hydrofluoric acid, nitric acid and phosphoric acid, the pattern of the source electrode 17a, the drain electrode 17b and the ohmic contact layer The patterns 16a and 16b are formed.

Thereafter, polyimide is deposited to a thickness of about 1.1 μm. Etch through photolithography process to form interlayer film 18
Is formed.

After the resist is peeled off, aluminum (Al) is vapor-deposited thereon with a thickness of about 1 μm by sputtering. After the photolithography process, Al is etched using a mixed solution of fluorine, nitric acid, phosphoric acid, and water to form a field plate electrode.
19 patterns are formed.

Thus, a high withstand voltage a-Si thin film transistor is manufactured.

Then, the lead portion from each electrode of the high-breakdown-voltage a-Si TFT of this embodiment is formed with the same layer as the metal layer on which each electrode is formed, and as shown in FIG. The lead portion of the gate electrode 12 is drawn toward the drain electrode 17b from the lead portion of the source electrode 17a,
The lead portion from the field plate electrode 19 is formed between the drain electrode 17b and the lead portion from the gate electrode 12, and the lead portion of the source electrode 17a is in the channel length direction (horizontal direction in the figure) as compared with FIG. Then, it is arranged so as to be drawn straight out so as to reduce the area in contact with the TFT end.

In this way, by adopting the extraction state shown in the present embodiment, the point A 'in FIG. 1 is farther from the drain side than the point A in FIG. 4, and the extraction part of the source electrode 17a is located on the field plate. The resulting TFT is no longer affected by approaching the lead-out portion of the electrode 19, so that the obtained TFT has an IV characteristic shown in FIG. 5 in comparison with FIG. 6 showing the IV characteristic of a conventional TFT. Can be obtained. That is, the array characteristics in the substrate showed extremely uniform characteristics despite the same patterning accuracy as in the past.

More specifically, in FIG. 6 showing the conventional IV characteristic, if there is a variation in the patterning accuracy in the TFT manufacturing, the variation will be a curve a 'to a curve b'. It was found that even if there was a similar variation in patterning accuracy, almost uniform characteristics could be obtained only by a small difference between the curves a and b.

The present embodiment is effective even when the density is not increased, and the same effect can be obtained even without the field plate electrode.

Further, as another embodiment, it is effective that the gate electrode and the source electrode are led out in the same direction as the drain electrode.

According to the high withstand voltage a-Si TFT of the present embodiment, the drain electrode 1
The lead portion from the source electrode 17a, the lead portion from the gate electrode 12, and the lead portion from the field plate electrode 19 are pulled out on the opposite side to the direction in which the lead portion from 7b is pulled out, and the lead portion from the source electrode 17a. Is disposed farthest from the drain electrode 17b, and then a lead portion from the gate electrode 12 and a lead portion from the field plate electrode 19 are disposed, and the area in contact with the TFT end in the channel direction is reduced. Since the source electrode 17a is arranged on the substrate, even if there is a variation in patterning accuracy in the manufacturing process, the drain electrode 17b is separated from the lead portion from the source electrode 17a. Leakage current between the portion and the drain electrode 17b is reduced, and uniform transistor element characteristics are obtained. Has an effect.

In other words, there is an effect that a high withstand voltage a-SiTFT that is less affected by patterning variations within the patterning accuracy and has uniform transistor element characteristics can be obtained.

(Effects of the Invention) According to the present invention, in a high-breakdown-voltage amorphous silicon thin film transistor, a lead portion from a source electrode and a lead portion from a gate electrode are pulled out in a direction opposite to a direction in which a lead portion from a drain electrode is drawn. Since the lead-out part from the source electrode is located farthest from the drain electrode, and then the lead-out part from the gate electrode is placed next, even if there is variation in patterning accuracy in the manufacturing process, Leakage current is less generated between the drain electrodes, and uniform transistor element characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view of a high-breakdown-voltage a-Si thin film transistor according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a conventional high-breakdown-voltage a-Si thin film transistor, FIG. 3 is an inverter circuit diagram, and FIG. Is a plan view of a conventional high-breakdown-voltage a-Si thin film transistor, FIG. 5 is a diagram showing IV characteristics of the present embodiment,
FIG. 6 is a diagram showing IV characteristics of a conventional example. 11 ... substrate 12 ... gate electrode 13 ... gate insulating film 14 ... channel layer 15 ... channel protective film 16 (16a, 16b) ... ohmic contact layer 17a ... source electrode 17b ... drain electrode 18 ... Interlayer film 19: Field plate electrode

Claims (1)

(57) [Claims] A gate electrode, a gate insulating film,
A channel plate, a channel protective film, a source electrode, a drain electrode, an offset region provided between the gate electrode and the drain electrode, and a field plate on an upper portion to cover an end of the gate electrode on the drain electrode side. In the high-breakdown-voltage amorphous silicon thin film transistor having an electrode, the lead portion from the source electrode and the lead portion from the gate electrode are pulled out in the same direction, and the lead portion from the gate electrode is drawn from the lead portion of the source electrode,
A high-breakdown-voltage amorphous silicon thin film transistor, which is drawn to the drain electrode side.