JP2847745B2 - Thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a high-mobility process on an insulating substrate by a low-temperature process.
The present invention relates to a thin film transistor having a high breakdown voltage and a small leak current.

[Conventional technology]

In recent years, the technology of fabricating a thin film active device on a glass substrate is being applied to various places such as a large area transmission type liquid crystal display and a contact type image sensor, and research is being actively conducted. Among them, a-Si: H, which can form a uniform film over a large area, has already been applied at the product level. However, a-Si: H has a very low mobility, which limits its application field. In other words, it can be applied as an optical sensor or a switching device. However, when the peripheral circuits for driving these devices are simultaneously created, the mobility is as low as about one thousandth of that of single crystal silicon. Drive circuit cannot be manufactured. At present, such a drive circuit is manufactured on a silicon wafer and connected to a thin film device by wire bonding at present. However, in view of the manufacturing cost, the yield of wiring, etc., it is necessary to reduce the total thickness in the future. For this purpose, means for manufacturing a high mobility thin film on a glass substrate is required. recently,
It has also become possible to obtain single crystal silicon on glass substrates. However, this requires a fairly high temperature process, and other parts, including the glass substrate, are exposed to high temperatures. As a result, there arises a problem that a glass substrate or the like to be used must be made of a material having high heat resistance, a problem of damage to other parts, and the like. Therefore, various researches have been conducted to fabricate high-mobility thin film active devices uniformly by a low-temperature process. As one of them, research and development of polycrystalline silicon thin film transistors (TFTs) are being conducted.

FIG. 5 shows the structure of a conventional planar thin film transistor. First, after forming a gate insulating film 4 and a gate electrode 5 on a polycrystalline silicon film 2 to be an active layer on a glass substrate 1, the gate electrode is patterned. Thereafter, source / drain regions are formed by ion implantation or laser doping using the gate electrode 5 as a mask. Thereafter, a passivation film 6 and a contact hole are formed, and then a metal wiring is formed to form a source / drain electrode 7. Here, the performance of the transistor is remarkably improved by making the thin film semiconductor layer (polycrystalline silicon film) 2 as an active layer an ultrathin film of 500 ° or less, and recently, the field effect mobility is 100 cm ² / Vs or more at a low temperature. Performance has been obtained.

[Problems to be solved by the invention]

In an ordinary planar thin film transistor, a channel is formed between the active layer and the gate insulating film layer, and carriers propagate through the channel. Where polycrystalline silicon TF
Since the production of T etc. usually requires a suitable temperature process,
A silicon oxide film formed by CVD or the like is used as a gate insulating film. However, this insulating film is inferior in film quality to a thermal oxide film usually used in a Si process, and particularly has a high level density at an interface. For this reason, scattering at the interface is large, and this is one factor limiting the performance of the TFT. In polycrystalline silicon TFTs, MOS field-effect transistors (MOSFETs) and amorphous silicon FEs are usually used.
The problem is that the leakage current is larger than that of T. A large amount of leakage current poses a problem both as a switching device for liquid crystal and in manufacturing a driving circuit. In particular, since there are many applications for driving devices requiring high voltage such as liquid crystal and EL, devices with high withstand voltage and low leakage current are required. However, the conventional planar type polycrystalline silicon TFT has a problem that the leak current increases sharply particularly when a high electric field is applied.

An object of the present invention is to obtain a device structure with improved withstand voltage and leakage current without causing deterioration in controllability of the number of processes, mobility, and threshold value.

[Means for solving the problem]

The gist of the present invention resides in a thin film transistor including a thin film semiconductor layer, a gate insulating film layer, a gate electrode, and a source / drain electrode provided on an insulating substrate. 2 consisting of a crystalline silicon film and a thin SiC film (silicon carbide film) on top
Using a layer film, the low resistance layers of source and drain
A thin film transistor having a buried channel structure and a wide gap drain / source structure by being formed only in a film.

[Action]

If the active layer of the TFT is composed of a two-layer film of polycrystalline silicon and silicon carbide (SiC), the band gap of silicon carbide is larger than that of silicon.
As shown in FIG. 2B, a channel is formed at the gate insulating film / semiconductor layer interface, but in the present invention, the channel is formed not at the gate insulating film / semiconductor layer interface but at the polycrystalline silicon / silicon carbide interface. (FIG. 2 (a)).
Therefore, a TFT having a high mobility can be manufactured because the TFT is not affected by the interface of the gate insulating film. Since the polycrystalline silicon / silicon carbide interface can be easily formed by continuous film formation, a good interface can be obtained. Further, this TFT has an advantage that it has an effect of reducing leakage current because the source / drain low resistance layer is formed of a SiC film (silicon carbide film) having a large band gap. This will be described in detail below.

In a conventional planar TFT, when a voltage is applied between the source and the drain, a high electric field is applied to the drain end,
The electric field emission current between the band gaps at this point causes a leakage current. Here, in polycrystalline silicon, such a leak current between bands is small, so that it does not usually cause a problem. However, in polycrystalline silicon, there are many grain boundary traps in the band gap, and a leak current between the bands easily flows through the traps (FIG. 3B). Therefore, a sharp increase in leak current is observed when a high voltage is applied. Such a leak current is essentially unavoidable in polycrystalline silicon. Moreover, this current depends on the electric field applied between the depletion layers at the drain end. According to the structure of the present invention, an SiC film having a large band gap is used for a portion where a depletion layer at the drain end is formed, as shown in the band diagram of FIG. Therefore, a leakage current, which is an emission current via the trap level, can be suppressed.
Since the emission current depends exponentially on the gap, it can be greatly reduced by slightly enlarging the gap.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the embodiments shown in the accompanying drawings. FIG. 1 is a structural view showing one embodiment of the present invention.
The active layer on the glass substrate 1 is composed of a polycrystalline silicon film 2 and a polycrystalline silicon carbide film 3. After that, a gate insulating film 4 and a gate electrode 5 are formed to form a gate electrode pattern. Then, a shallow source / drain region (not shown) is self-aligned by ion implantation using the gate electrode 5 as a mask. Formed in the film.
After the passivation film 6 was formed, a contact hole was formed and a source / drain electrode 7 was formed.

FIG. 4 shows the characteristics of the actually manufactured thin film transistor. This shows a change in drain current due to a gate voltage. The solid line indicates the TFT manufactured according to the present invention and the broken line indicates the characteristics of the TFT manufactured by the conventional method. Thus, it was found that the field-effect mobility was high, the off-current decreased, and the leakage current was greatly improved. In a conventional planar thin film transistor (TFT),
As the drain voltage increases, a sharp increase in the leak current is observed. However, in the TFT according to the present invention, such a rapid increase in the leak current is not observed. In particular, a remarkable improvement in leakage current was obtained under high voltage driving. The pressure resistance is
30 V or more, and leakage current is 10 even when a voltage of 30 V is applied.
^-10 or less. As a result, a TFT with higher mobility, higher breakdown voltage, and lower leakage current than the conventional TFT was obtained.

〔The invention's effect〕

As described above in detail, the thin film transistor according to the present invention was manufactured with a simple process and with good reproducibility. Further, with this structure, it was possible to obtain a thin film transistor which has a high withstand voltage, a small leak current and can operate at high speed.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention. FIGS. 2 and 3 are diagrams comparing the band diagrams of the channel and the drain end between the structure according to the present invention and the conventional structure, respectively. FIG. 4 is a diagram showing the characteristics of the transistor manufactured according to the present invention. FIG. 5 is a diagram showing a configuration of a conventional polycrystalline thin film transistor. DESCRIPTION OF SYMBOLS 1 ... Glass substrate, 2 ... Semiconductor layer (polycrystalline silicon film), 3 ... Semiconductor layer (SiC film), 4 ... Gate insulating film, 5 ... Gate electrode, 6 ... Passivation film, 7
……electrode.

Claims (1)

(57) [Claims] A thin-film semiconductor layer provided on an insulating substrate;
A thin film transistor comprising a gate insulating film layer on a thin film semiconductor layer, a gate electrode on the gate insulating film, and a source / drain electrode connected to a source / drain region in the thin film semiconductor layer; A two-layer film composed of a polycrystalline silicon film and a SiC film on the polycrystalline silicon film is used as a layer, and a buried channel structure for forming a channel on the polycrystalline silicon film side at the polycrystalline silicon film / SiC film interface is used. A thin film transistor, wherein the low resistance layer is formed only in the SiC film having a larger band gap than the polycrystalline silicon film and not forming a channel.