JP2848746B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device for forming an alignment mark used for aligning a mask in an SRAM manufacturing process.

[0002]

2. Description of the Related Art
An alignment mark of a mask for manufacturing a semiconductor device has been formed by the following method. First, after an oxide film 31 is formed on the entire surface of the silicon substrate 21 by thermal oxidation, an SiN film 32 is formed on the entire surface of the oxide film 31 by a CVD method. Then, a resist is applied on the entire surface of the silicon substrate 21, and the resist is selectively removed only by a photolithography process in a portion to be an element isolation region. afterwards,
Using the resist as a mask, the SiN film 31 is removed by etching only in a portion to be an element isolation region, and the resist is further removed (FIG. 2A). Then, 400n by thermal oxidation
An oxide film of m is formed. Due to the oxidation resistance of the SiN film, S
Oxidation of the region covered with the iN film is suppressed, an oxide film of 400 nm is formed only as a device isolation region as the device isolation oxide film 22, and an active region and an alignment mark 29 are formed. Then, the SiN film 32 on the silicon substrate 21 is removed by phosphoric acid. Further, the oxide film 31 on the activated region is removed by etching the oxide film with 1% hydrofluoric acid (HF), and then the gate oxide film 23 is formed on the activated region and the alignment mark 29 by thermal oxidation. It is formed (FIG. 2B).

Next, a resist 25 is applied on the entire surface of the silicon substrate 21, and the alignment mark 29 and the resist 25 in the peripheral area are removed by photolithography (FIG. 2C). Thereafter, the silicon substrate 21 was selectively etched using the resist 25 and the element isolation film 22 as a mask to emphasize the steps of the alignment marks 29 (FIG. 2D).

Then, a desired element is formed by a usual method.
Steps are performed to manufacture a semiconductor device. However,
In the method of manufacturing a semiconductor device,
To emphasize the step of the alignment mark 29
Photolithography process, SiO _TwoEtch process, silicon
Add 4 steps of lie etching step and resist stripping step
And the cost of manufacturing is high.
Was.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a method of manufacturing a semiconductor device capable of enhancing a step of an alignment mark without increasing the number of steps of the method of manufacturing a semiconductor device. It is intended to be.

[0006]

According to the present invention, (ia)
Forming an element isolation film on a semiconductor substrate and forming an alignment mark together with an active region, and then forming a gate oxide film on the semiconductor substrate; (ii-a) removing the gate oxide film on the alignment mark. Removing step, (iii-a) depositing polysilicon on the semiconductor substrate including the alignment mark, (iv-a) etching the polysilicon by a photolithography step to form a gate electrode, A method of manufacturing a semiconductor device, comprising: etching polysilicon on the alignment mark and the semiconductor substrate at the alignment mark to emphasize the alignment mark. Further, according to the present invention, (ii) a step of forming a gate oxide film on the semiconductor substrate after forming an element isolation film on a semiconductor substrate and forming an alignment mark together with an activated region, (ii-b) A) forming a contact hole in the gate oxide film and removing the gate oxide film on the alignment mark and a peripheral region thereof; (iii-b) forming a contact hole on the semiconductor substrate including the contact hole and the alignment mark; Depositing polysilicon, (iv-b) etching the polysilicon by a photolithography step to form a gate electrode connected to the semiconductor substrate, and forming polysilicon on the alignment mark and a portion of the alignment mark. Of a semiconductor device including a process of etching a semiconductor substrate and emphasizing an alignment mark. The law is provided.

[0007] In the present invention, the semiconductor substrate is not particularly limited as long as it is normally used as a substrate, but a silicon substrate is preferred. SiO 2 is formed on this semiconductor substrate by a known method, for example, LOCOS method or the like.
Forming an element isolation film of No. ₂ to secure an active area and form an alignment mark. The size of the alignment mark is not particularly limited, and can be appropriately selected depending on the size of the semiconductor device and the like.

[0008] Then, a gate oxide film is formed on the activation region. The gate oxide film is formed by a known method, for example, thermal oxidation,
It can be formed by a CVD method or the like. The thickness at this time is preferably about 10 to 50 nm. Further, a contact hole is formed in the gate oxide film, and the gate oxide film on the alignment mark and its peripheral region is removed.
At this time, a polysilicon film having a thickness of about 20 to 80 nm may be formed on the gate oxide film to protect the gate oxide film. When forming a polysilicon film on the gate oxide film, it is necessary to apply a photoresist on the polysilicon film and pattern the polysilicon film together with the gate oxide film by a normal photolithography process to form a contact hole. it can. At the same time, the gate oxide film on the alignment mark and its peripheral region can be removed.

Next, a contact hole and an alignment
Polysilicon on the entire surface of the semiconductor substrate including the mark
I do. At this time, the polysilicon is formed by a known method, for example, S
iH _FourCan be deposited by a CVD method using
You. The thickness of the polysilicon is preferably about 80 to 200 nm.
No. Then, this polysilicon is subjected to a photolithography process.
Etching process to connect to the semiconductor substrate
A gate electrode is formed. At this time, the alignment of the semiconductor substrate
Only polysilicon is deposited on the element mark
Therefore, over etching occurs during polysilicon etching.
-Self-alignment alignment by etching
The semiconductor substrate itself in the area where the
The alignment mark is highlighted.

[0010]

According to the method of manufacturing a semiconductor device of the present invention, at the time of etching the gate electrode, since the gate oxide film, the etching mask and the like do not exist on the alignment mark, the alignment mark is self-aligned by over-etching. The semiconductor substrate itself in the region where is formed is etched, and the alignment mark is emphasized.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings. First, an oxide film of 15 nm is formed on the entire surface of a silicon substrate 11, which is a semiconductor substrate, by thermal oxidation.
A film is formed to a thickness of 120 nm. Then, a resist is applied on the entire surface of the silicon substrate 11, and the resist is selectively removed only by a photolithography process in a portion to be an element isolation region. After that, the SiN film only in a portion to be an element isolation region is removed by etching using the resist as a mask, and the resist is further removed. Next, an oxide film of 400 nm is formed by thermal oxidation. Due to the oxidation resistance of the SiN film, SiN
The oxidation of the region covered with the film is suppressed, and the 400 nm oxide film is formed only in the portion to be the element isolation region.
Activated region and alignment mark 1
9 is formed. And the silicon substrate 1 with phosphoric acid
1 is removed. Furthermore, 1% hydrofluoric acid (H
F), the oxide film on the activated region is removed by etching the oxide film by 20 nm, and thereafter, a gate oxide film 13 is formed to 10 nm on the activated region and the alignment mark 19 by thermal oxidation (FIG. a)).

Next, CVD is performed on the entire surface of the gate oxide film 13.
After depositing 50 nm of polycrystalline silicon 14 by the method
A resist 15 is applied on the entire surface of the silicon substrate 11, and a resist pattern of a contact hole 16 for connecting a gate electrode to be formed in a later step and an active region is formed by photolithography (FIG. 1B). At this time, a resist pattern is formed so that the gate oxide film 13 and the polycrystalline silicon 14 on the alignment mark 19 are simultaneously removed.

Next, the polysilicon 14 is etched using the resist 15 as a mask. Further, after the resist 15 is removed, the gate oxide film 13 is
By performing m etching, the silicon substrate 11 in the contact hole 16 is exposed (FIG. 1C). Further, 100 nm of polycrystalline silicon 17 is deposited on the entire surface of the silicon substrate 11 by the CVD method, a resist 18 is applied, and a resist pattern for forming a gate electrode is formed by photolithography. At this time, a pattern is set so that the resist pattern does not cover the alignment mark 19. Next, polycrystalline silicon 17 is selectively etched by RIE using resist 18 as an etching mask. In this step, since neither the resist 18 nor the gate oxide film 13 exists on the alignment mark 19, the silicon substrate 11 is etched at the time of the overetch, and the step of the alignment mark 19 is emphasized (FIG. 1D). That is, in this case, the overetch of the polycrystalline silicon 17 is about 50 nm in terms of the film thickness of the polycrystalline silicon 17, but at the time of the overetch, the polycrystalline silicon 17 to be etched almost disappears. The rate is approximately doubled, the silicon substrate 11 is etched by about 100 nm, and the step of the alignment mark 19 is emphasized.

Next, a desired element forming step is performed by a usual method to manufacture a semiconductor device.

[0015]

According to the present invention, the alignment marks can be emphasized in a self-aligning manner when the gate electrode is etched. That is, when the gate electrode is etched, since the gate oxide film, the etching mask, and the like do not exist on the alignment mark, the semiconductor substrate itself in the region where the alignment mark is formed by over-etching is etched. Therefore, the step of the alignment mark can be emphasized by etching the semiconductor substrate in a self-alignment manner with respect to the alignment mark formed in the element separation step without increasing the number of manufacturing steps.

[Brief description of the drawings]

FIG. 1 is a process explanatory view showing an embodiment of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a process explanatory view showing an example of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Semiconductor substrate 12 Element isolation film 13 Gate oxide film 16 Contact hole 17 Polysilicon 19 Alignment mark

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/027 H01L 21/8244 H01L 27/11

Claims (2)

(57) [Claims] A step of forming a gate oxide film on the semiconductor substrate after forming an element isolation film on the semiconductor substrate and forming an alignment mark together with an active region; and (ii) forming the gate oxide film on the semiconductor substrate. Removing the gate oxide film on the mark, (iii-a) depositing polysilicon on the semiconductor substrate including the alignment mark, (iv-a) etching the polysilicon by a photolithography process Forming a gate electrode, etching polysilicon on the alignment mark and the semiconductor substrate at the alignment mark portion to emphasize the alignment mark. And (ii) forming a gate oxide film on the semiconductor substrate after forming an element isolation film on the semiconductor substrate and forming an alignment mark together with an activation region, and (ii-b) forming the gate oxide film on the semiconductor substrate. Forming a contact hole in an oxide film and removing the gate oxide film on the alignment mark and a peripheral region thereof, (iii-b) forming polysilicon on the semiconductor substrate including the contact hole and the alignment mark. (Iv-b) etching the polysilicon by a photolithography process to form a gate electrode connected to the semiconductor substrate, and forming polysilicon on the alignment mark and the semiconductor substrate at the alignment mark portion A semiconductor device, comprising: a step of etching a substrate to emphasize an alignment mark. Manufacturing method.