JP2853544B2 - Static induction semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic induction semiconductor device.

[0002]

2. Description of the Related Art An electrostatic induction thyristor will be described as an example of an electrostatic induction semiconductor device. An electrostatic induction thyristor is a semiconductor device in which a current flowing between an anode region and a cathode region is controlled in accordance with a voltage applied to a gate electrode, and a charge carrier of electrons and holes is used as a carrier. It is configured as shown.

As shown in FIG. 3, the electrostatic induction thyristor has an N-type high resistivity region 3 between a P ⁺ -type anode region 1 and an N ⁺ -type cathode region 2. A P-type gate region 4 is provided, and between the high resistivity region 3 and the anode region 1, the same conductivity type (N
Buffer region 5 of N ⁺ type as a high impurity concentration region
And a lattice defect region 6 in the anode region 1.
Is formed. In addition, 7 is a cathode electrode, 8
Is a gate electrode, and 9 is an anode electrode.
No. 72157).

The electrostatic induction thyristor shown in FIG. 3 is characterized in that the current density is large, the forward voltage drop (ON voltage) is low, and the ON time is short. However, it is difficult to instantaneously block holes injected from the anode region 1 side during blocking, and there is a problem that the off time is long.

In order to solve the problem that the off time is long, as shown in FIG. 3, the lattice defect region 6 exists in the anode region 1 when the electrostatic induction thyristor shifts from the conductive state to the cutoff state. The lattice defect in the lattice defect region 6 effectively shortens the lifetime of holes, and the high resistivity region 3
Since the buffer region 5 formed therein effectively shortens the lifetime of the holes injected from the anode region 1 remaining in the high resistivity region 3, the holes disappear in a very short time.

The buffer region 5 not only contributes to shortening the off time of the electrostatic induction thyristor, but also affects the breakdown voltage between the anode region 1 and the cathode region 2. In the electrostatic induction thyristor shown in FIG. 3, when the anode region 1 and the cathode region 2 are cut off, the expansion of the depletion layer extending from the gate region 4 becomes slower in the buffer region 5, and the anode region 1 and the cathode are reduced by a so-called punch-through withstand voltage. The breakdown voltage between the regions 2 is controlled.

On the other hand, both the lattice defect region 6 and the buffer region 5 which contribute to shortening the off time of the electrostatic induction thyristor shown in FIG. 3 have a carrier concentration of electrons or holes which are charge carriers during conduction. This causes a problem that the forward voltage drop (ON voltage) during conduction is increased as a result. However, the optimum conditions of the lattice defect region 6 and the buffer region 5 for achieving both a reduction in the off-time and a low on-voltage in a trade-off relationship have not been clarified.

[0008]

As described above, as described above,
Conventionally, it has been clear that the off-time can be reduced by providing the lattice defect region 6 and the buffer region 5 in the electrostatic induction thyristor. However, the optimum conditions for suppressing the on-voltage while reducing the off-time are clear. Had not been.

[0009] The present invention has been made in view of the above problems,
An object of the present invention is to provide a structure of an electrostatic induction thyristor capable of optimizing a reduction in off-time and a reduction in on-voltage in a trade-off relationship.

[0010]

In order to attain the above object, according to the present invention, there is provided an electrostatic induction type semiconductor device, comprising: a first conductivity type (N ⁺ type) cathode region on a surface side of a semiconductor substrate; A second conductivity type (P ⁺ type) anode region on the back side of the substrate, and a first conductivity type (N type) high resistivity region between the cathode region and the anode region; A first conductivity type (N) having a lattice defect region for shortening the life of the charge carrier and having a higher impurity concentration than the high resistivity region between the high resistivity region and the anode region.
⁺ ) Buffer region, wherein the buffer region has an impurity concentration of 5 × 10
^The lattice defect region is formed in the anode region at a distance of 15 to 25 μm from the interface between the anode region and the buffer region, and the lattice defect region is formed to be ^{12 to} 3 × 10 ¹³ cm ^−2. It is characterized by the following.

[0011]

The buffer region 5 and the lattice defect region 6 formed in the electrostatic induction thyristor, which is the electrostatic induction semiconductor device of the present invention shown in FIG. The off time is reduced by shortening the length. In order to shorten the off-time, the effect is larger when the impurity concentration of the buffer region 5 is higher and when the lattice defect density of the lattice defect region 6 is higher.

However, the increase in the impurity concentration in the buffer region 5 and the increase in the lattice defect density in the lattice defect region 6 also reduce the carrier concentration of electrons and holes during conduction of the electrostatic induction thyristor. Further, since the position where the lattice defect region 6 is formed also affects the carrier concentration distribution during conduction, the forward voltage drop (ON voltage) of the electrostatic induction thyristor increases, the loss during conduction increases, and the heat generation increases. Results. That is, the position of the lattice defect region 6 should be optimal for lowering the on-voltage and reducing the off-time.

As shown in FIG. 1, the electrostatic induction thyristor is formed so that the high resistivity layer 3 has a thickness of 110 μm and the buffer region 5 has a thickness of 15 μm.
From the interface between the anode region 1 and the buffer region 5
When the impurity concentration in the buffer region 5 is changed by setting the lattice defect density of the lattice defect region 6 to the order of 10 ¹² cm ^{−2 in the} anode region separated by a distance of μm, The dooff curve is shown in FIG. In the figure,
The horizontal axis is the ON voltage Von, and the vertical axis is the OFF time toff. A diagram a shows the case where the impurity concentration of the buffer region 5 is 6 × 10 ¹³ cm ⁻² , and a diagram b shows that the impurity concentration of the buffer region 5 is 9 × 10 ¹²
cm ^-2 is shown. The impurity concentration of the buffer region 5 is set to 9 × 10 ¹² so that the trade-off curve becomes the diagram b.
When the lattice defect density of the lattice defect region 6 was changed in the electrostatic induction type thyristor of cm ⁻² , the characteristics of the off time and the on voltage changed along the diagram b. As a result, the impurity concentration of the buffer region 5 is set to 5 × 10 ¹² to 3 × 10 ¹³
cm ⁻² and the optimal condition that the lattice defect region is formed in the anode region at a distance of 15 to 25 μm from the interface between the anode region 1 and the buffer region 5 (shortening of the off time and low on-state voltage). Optimization conditions for achieving optimization)
Was required.

[0014]

An embodiment of the present invention will be described below with reference to FIG. In order to manufacture the electrostatic induction thyristor shown in FIG. 1, a wafer generally called a double epi wafer is used. The double epi-wafer uses a P ⁺ -type epi-substrate serving as the anode region 1 of the electrostatic induction thyristor, and forms an N ⁺ -type buffer region 5 by doping an N-type impurity on the epi-substrate and performing epitaxial growth. The buffer region 5 has, for example, a thickness of the epitaxial layer of 15 μm,
It is formed with a specific resistance of 0.85 Ωcm (5.8 × 10 ¹⁵ cm ⁻³ ).
After the N ⁺ -type buffer region 5 is epitaxially grown, the N-type high resistivity region 3 is continuously grown. In the high specific resistance region 3, for example, a specific resistance of 65 Ωcm and a thickness of 110 μm are set for a 1000V class anode-cathode withstand voltage, and the substrate wafer forming the electrostatic induction thyristor shown in FIG. 1 is completed.

A gate region 4 and a cathode region 2 are formed by using a wafer substrate epitaxially grown, and a gate electrode 8, a cathode electrode 7, and an anode electrode 9 are formed.

After the formation of the electrodes, a lattice defect region 6 is formed in the anode region 1. The lattice defect region 6 is formed by using a cyclotron accelerator or the like to irradiate protons vertically from the surface of the semiconductor substrate to cause crystal defects, thereby forming a lattice defect region.
Protons may be irradiated vertically from the back side of the semiconductor substrate. The lattice defect region 6 is formed by setting the acceleration energy so that it can be formed in the anode region 1 at a distance of 15 to 25 μm from the interface between the anode region 1 and the buffer region 5.

In this embodiment, the thickness of the high resistivity region 3 is 1
Since the buffer region 5 has a thickness of 10 μm and the buffer region 5 has a thickness of 15 μm, it is formed at a position of 20 μm from the interface between the anode region 1 and the buffer region 5 toward the anode region 1. Therefore, the acceleration energy is set so that the lattice defect region 6 can be formed around a position 145 μm from the surface of the semiconductor substrate.

The static induction semiconductor device is not limited to a static induction thyristor, but may be an insulated gate bipolar transistor. Further, the method of forming lattice defects is not limited to the embodiment.

[0019]

As described above, according to the electrostatic induction type semiconductor device of the present invention, optimization of the reduction of the off-time and the low on-voltage, which are in a trade-off relationship, is achieved.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of an electrostatic induction semiconductor device according to the present invention.

FIG. 2 is a trade-off curve of off-time and on-voltage of the electrostatic induction semiconductor device according to the present invention.

FIG. 3 is a cross-sectional view illustrating an example of a conventional electrostatic induction semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 anode region 2 cathode region 3 high resistivity region 4 gate region 5 buffer region 6 lattice defect region

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/332 H01L 29/74-29/749

Claims (1)

(57) [Claims] A first conductive type cathode region on a front surface portion of the semiconductor substrate; a second conductive type anode region on a back surface side of the semiconductor substrate; and a first conductive type anode region between the cathode region and the anode region. A high-resistivity region of a type, a lattice defect region for shortening the life of the charge carrier in the semiconductor substrate, and an impurity concentration between the high-resistivity region and the anode region that is higher than that of the high-resistivity region. In the electrostatic induction type semiconductor device including the first conductivity type buffer region having a high impurity concentration, the impurity concentration of the buffer region is set to 5 × 10 ^{12 to} 3 × 10
¹³ cm ⁻² , wherein the lattice defect region is formed in the anode region at a distance of 15 to 25 μm from an interface between the anode region and the buffer region, wherein apparatus.