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JP2853778B2 - Solid-state imaging device - Google Patents
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JP2853778B2 - Solid-state imaging device - Google Patents

Solid-state imaging device

Info

Publication number
JP2853778B2
JP2853778B2 JP3039987A JP3998791A JP2853778B2 JP 2853778 B2 JP2853778 B2 JP 2853778B2 JP 3039987 A JP3039987 A JP 3039987A JP 3998791 A JP3998791 A JP 3998791A JP 2853778 B2 JP2853778 B2 JP 2853778B2
Authority
JP
Japan
Prior art keywords
photodiode
imaging device
solid
state imaging
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3039987A
Other languages
Japanese (ja)
Other versions
JPH04277679A (en
Inventor
渡 上坂
裕幸 岡田
祐二 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3039987A priority Critical patent/JP2853778B2/en
Publication of JPH04277679A publication Critical patent/JPH04277679A/en
Application granted granted Critical
Publication of JP2853778B2 publication Critical patent/JP2853778B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はビデオカメラ等に広く利
用される固体撮像装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device widely used in video cameras and the like.

【0002】[0002]

【従来の技術】近年、固体撮像装置はビデオカメラ等に
広く利用されている。その固体撮像装置は小型化,高感
度化が達成されて低照度における撮像が可能となった
が、一方では低照度、特に暗時において光電変換部で発
生する暗電流による白キズが問題となっている。
2. Description of the Related Art In recent years, solid-state imaging devices have been widely used in video cameras and the like. The solid-state imaging device has achieved miniaturization and high sensitivity, enabling imaging at low illuminance, but on the other hand, white blemishes due to dark current generated by the photoelectric conversion unit in low illuminance, especially in darkness, have become a problem. ing.

【0003】以下に従来の固体撮像装置について説明す
る。図2は従来の固体撮像装置の断面構造図である。図
2において、1はn型シリコン基板、2はp型ウエル、
3はn-型領域、4はn型領域、5はp+型領域、6はp
+型領域、7はp++型領域、8は絶縁膜、10は2層目
のポリシリコン電極である。
Hereinafter, a conventional solid-state imaging device will be described. FIG. 2 is a sectional structural view of a conventional solid-state imaging device. In FIG. 2, 1 is an n-type silicon substrate, 2 is a p-type well,
3 is an n - type region, 4 is an n-type region, 5 is a p + type region, and 6 is a p-type region.
A + type region, 7 is a p ++ type region, 8 is an insulating film, and 10 is a second-layer polysilicon electrode.

【0004】以上のように構成された固体撮像装置につ
いて、以下その動作について説明する。まず、p型ウエ
ル2の中に形成された光電変換部であるn-型領域(以
下、フォトダイオードと称する)3で、入射した光の強
度に応じて電子・正孔対生成により信号電荷が発生す
る。次に、2層目のポリシリコン電極10にハイレベル
のパルスを印加することにより、読み出しポテンシャル
制御を行っているp+型領域5のポテンシャルを下げ、
信号電荷をすべて電荷転送を行うn型領域(以下、垂直
CCDと称する)4に移動させる。そこで、1層目のポ
リシリコン電極(図示せず)と2層目のポリシリコン電
極10に各々ミドルレベルとローレベルのパルスを交互
に印加して信号電荷を順次垂直CCD4内で転送する。
ここで、p +型領域6は垂直CCD4と隣接したフォト
ダイオード3間の電気的分離を行うものである。またp
++型領域7は、完全空乏化しているフォトダイオード3
の上に存在することによりフォトダイオード3の表面の
電位を例えばグランドレベルに固定した正孔蓄積層を形
成し、フォトダイオード3の上の界面順位で発生する雑
音電荷(暗電流)を低減する。
[0004] The solid-state imaging device configured as described above is described.
The operation will be described below. First, the p-type wafer
N, which is a photoelectric conversion unit formed in the-Type area (below
The intensity of the incident light is indicated by 3
Depending on the degree, signal charge is generated by electron-hole pair generation
You. Next, a high level is applied to the second-layer polysilicon electrode 10.
Read potential by applying a pulse of
Controlling p+Lower the potential of the mold region 5,
An n-type region (hereinafter, referred to as a vertical
(Referred to as CCD) 4. Therefore, the first layer
Polysilicon electrode (not shown) and second layer polysilicon electrode
Alternating middle and low level pulses on pole 10
And the signal charges are sequentially transferred in the vertical CCD 4.
Where p +The mold area 6 is a photo adjacent to the vertical CCD 4.
This is to perform electrical isolation between the diodes 3. Also p
++The mold region 7 is a fully depleted photodiode 3
On the surface of the photodiode 3
Form a hole accumulation layer with the potential fixed at ground level, for example.
And the noise generated at the interface order on the photodiode 3
Reduces sound charge (dark current).

【0005】以上説明した従来の固体撮像装置では、フ
ォトダイオード3の表面に形成したp++型領域7の電位
をグランドレベルに固定しているが、それ以前の固体撮
像装置では、フォトダイオード3の表面にp++型領域7
はなかった。そのような構造の固体撮像装置では完全空
乏化したフォトダイオード3の表面に酸化膜が存在する
ことになり、酸化膜とシリコン基板1の結晶性の乱れに
起因して発生する界面準位がフォトダイオード3の表面
に存在した。この界面準位は禁止帯中に分布し、例えば
1つの電子を放出して正に帯電するか中性になるドナー
型の振舞いを示す。このフォトダイオード3の表面のド
ナーで発生した電子(雑音電荷)が垂直CCD4に読み
出され、暗電流として検出される。フォトダイオード3
の表面に界面準位が存在した場合その暗電流の程度は非
常に悪く、図2に示すp++型領域7をフォトダイオード
3の表面に形成した従来例に比べ約10倍の値を示し
た。その場合、p++型領域7の効果は、暗電流の値がフ
ォトダイオード3の表面のp ++型領域7の面積に依存す
るという結果より明確となった。したがって、暗電流を
低減するには、p++型領域7の面積を拡大することが必
要である。
In the conventional solid-state imaging device described above,
P formed on the surface of the photodiode 3++Potential of mold region 7
Is fixed to the ground level,
In the imaging device, p++Mold area 7
There was no. With such a solid-state imaging device,
An oxide film exists on the surface of the depleted photodiode 3
As a result, the crystallinity of the oxide film and the silicon substrate 1 is disturbed.
The interface level generated due to the surface of the photodiode 3
Existed. This interface state is distributed in the forbidden band, for example,
A donor that emits one electron and becomes positively charged or neutral
Indicates type behavior. The photodiode on the surface of the photodiode 3
Electrons (noise charge) generated by the scanner read to the vertical CCD4
And detected as dark current. Photodiode 3
If there is an interface state on the surface of the
Always bad, p shown in FIG.++Type region 7 as photodiode
3 shows a value about 10 times that of the conventional example formed on the surface.
Was. In that case, p++The effect of the mold region 7 is that the dark current value
Of the surface of the photodiode 3 ++Depends on the area of the mold region 7
The result became clearer. Therefore, the dark current
To reduce, p++It is necessary to increase the area of the mold region 7.
It is important.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記の従
来の構成では、フォトダイオードのn-型領域を完全に
正孔蓄積層であるp++型領域で覆うと、2層目のポリシ
リコン電極にハイレベルの電圧を印加してもフォトダイ
オードの表面が例えばグランドレベルに固定されている
ため、ポリシリコン電極の直下のポテンシャルが変化せ
ず、フォトダイオード中の信号電荷を完全に垂直CCD
へ読み出すことが困難となり、いわゆる残像が発生して
しまうという課題を有していた。この課題を解決するた
めに、フォトダイオード中の正孔蓄積層の面積を縮小
し、完全空乏化したn-型領域をシリコン基板の上にポ
リシリコンの読み出し電極の幅と同程度の長さで現出さ
せ、その現出したn-型領域を全部ポリシリコンの読み
出し電極で覆って信号電荷を読み出し易くする構造が提
案された。しかしながら、この構造のように残像対策と
して正孔蓄積層の面積を減少させると、逆に増加した界
面準位からフォトダイオードの表面で電子放出が起こ
り、暗電流が発生し、白キズの多い画像となってしまう
という課題を有していた。
However, in the above conventional structure, if the n -type region of the photodiode is completely covered with the p ++ -type region serving as a hole accumulation layer, the second-layer polysilicon electrode becomes Even if a high-level voltage is applied, the surface of the photodiode is fixed at, for example, the ground level, so that the potential immediately below the polysilicon electrode does not change, and the signal charges in the photodiode are completely transferred to the vertical CCD.
In this case, it is difficult to read out the image, and a so-called afterimage is generated. In order to solve this problem, the area of the hole accumulation layer in the photodiode is reduced, and the fully depleted n -type region is placed on the silicon substrate with a length substantially equal to the width of the polysilicon read electrode. There has been proposed a structure in which the exposed n -type region is entirely covered with a polysilicon readout electrode so that signal charges can be easily read out. However, when the area of the hole accumulation layer is reduced as a measure against image lag as in this structure, on the contrary, electrons are emitted from the surface of the photodiode from the increased interface state, dark current is generated, and an image with many white scratches is generated. Had the problem of becoming

【0007】本発明は上記従来の課題を解決するもの
で、残像がなく、かつ白キズのない固体撮像装置を提供
することを目的とする。
An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a solid-state imaging device free from afterimages and free from white spots.

【0008】[0008]

【課題を解決するための手段】この目的を達成するため
に本発明の固体撮像装置は、第1導電型の半導体基板上
に、第2導電型の領域からなる光電変換部と、光電変換
部で生成された信号電荷を受け取り順次転送する第2導
電型の領域からなる転送部と、信号電荷を光電変換部か
ら転送部へ読み出して転送部中を電荷転送するための読
み出し電極とを備え、読み出し電極は、光電変換部の一
辺の一部上を覆うように信号電荷の読み出し側に突き出
し部が設けられ、第1導電型の領域からなる表面層が、
光電変換部の表面を突き出し部近傍を除いて覆うように
したものである。
In order to achieve this object, a solid-state imaging device according to the present invention is provided on a semiconductor substrate of a first conductivity type.
A photoelectric conversion unit comprising a region of the second conductivity type;
Second signal receiving and sequentially transferring the signal charges generated in the section
A transfer section composed of an electric type region and a signal charge from a photoelectric conversion section.
To the transfer section to transfer charges through the transfer section.
And a readout electrode, wherein the readout electrode is a part of the photoelectric conversion unit.
Protrudes to the signal charge reading side so as to cover part of the side
A surface layer comprising a region of the first conductivity type,
The surface of the photoelectric conversion unit is covered except for the vicinity of the protruding portion .

【0009】[0009]

【作用】この構成により、フォトダイオードから垂直C
CDへ信号電荷が移動する方向に対して、読み出し電極
である2層目のポリシリコン電極の幅を縮小し、正孔蓄
積層の領域を増大させることにより、界面準位で発生し
た暗電流が原因で起こる白キズがなく、またフォトダイ
オードの上に一部2層目のポリシリコンが存在すること
により残像のない固体撮像装置が実現できる。
According to this configuration, the vertical C
By reducing the width of the second-layer polysilicon electrode serving as the readout electrode and increasing the area of the hole accumulation layer in the direction in which the signal charges move to the CD, the dark current generated at the interface state can be reduced. A solid-state imaging device free from afterimages can be realized because there is no white flaw caused by the cause and the second layer of polysilicon is present partially on the photodiode.

【0010】[0010]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
An embodiment of the present invention will be described below with reference to the drawings.

【0011】図1(a)は本発明の一実施例における固
体撮像装置の要部平面図、図1(b)は図1(a)をA
−A′線で切断した断面図である。図1において、1は
n型シリコン基板、2はp型ウエル、3はn-型領域
(フォトダイオード)、4はn型領域(垂直CCD)、
5はフォトダイオード3から垂直CCD4へ信号電荷を
読み出す時に読み出しポテンシャル制御を行うp+型領
域、6は垂直CCD4と隣接したフォトダイオード3と
の間の電気的分離を行うp+型領域、7aは正孔蓄積層
であるp++型領域、8は絶縁膜、9は1層目のポリシリ
コン電極、10aはフォトダイオード3から垂直CCD
4へ信号電荷を読み出すための読み出し電極を構成する
2層目のポリシリコン電極である。
FIG. 1A is a plan view of a main part of a solid-state imaging device according to an embodiment of the present invention, and FIG.
It is sectional drawing cut | disconnected by the -A 'line. In FIG. 1, 1 is an n-type silicon substrate, 2 is a p-type well, 3 is an n - type region (photodiode), 4 is an n-type region (vertical CCD),
Reference numeral 5 denotes a p + -type region for performing read potential control when reading signal charges from the photodiode 3 to the vertical CCD 4, 6 denotes a p + -type region for electrically separating the vertical CCD 4 from an adjacent photodiode 3, and 7 a denotes a p + -type region. A p ++ type region as a hole accumulation layer, 8 is an insulating film, 9 is a first-layer polysilicon electrode, 10a is a photodiode 3 from a vertical CCD.
4 is a second-layer polysilicon electrode constituting a readout electrode for reading out signal charges to the fourth.

【0012】まず、n型シリコン基板1にフォトダイオ
ード3,垂直CCD4、1層目のポリシリコン電極9お
よび従来例とは形状の異なる2層目のポリシリコン電極
10aを形成する。2層目のポリシリコン電極10a
は、フォトダイオード3から垂直CCD4へ信号電荷を
読み出す方向の幅を例えば従来例の1/3以下に設定し
ている。逆の見方をすれば、2層目のポリシリコン電極
10aの一部がフォトダイオード3の上に突き出した形
状(以下突き出しと称する)になっている。フォトダイ
オード3の上への突き出しがない領域での2層目のポリ
シリコン電極10aの長さ(信号電荷の移動方向に対す
るゲート電極長)は、1層目のポリシリコン電極9と同
程度であり、また2層目のポリシリコン電極10aが形
成されていない領域の下部にもフォトダイオード3が存
在する。また、2層目のポリシリコン電極10aが形成
されていない領域では正孔蓄積層であるp++型領域7a
が完全にフォトダイオード3の上を覆っており、p++
領域7aがフォトダイオード3の上を覆っていない領域
の面積は従来例の1/3以下になっている。2層目のポ
リシリコン電極10aに従来例と同じハイレベルのパル
ス電圧を印加した場合、突き出しの面積が減少している
にもかかわらず、残像は従来例と同一の測定限界以下
(0%)で、フォトダイオード3の上のp++型領域7a
が増加したことにより白キズ不良の発生による歩留まり
低下は従来方法と比較して約1/3に低減する。
First, a photodiode 3, a vertical CCD 4, a first-layer polysilicon electrode 9, and a second-layer polysilicon electrode 10a having a different shape from the conventional example are formed on an n-type silicon substrate 1. Second layer polysilicon electrode 10a
The width in the direction in which signal charges are read from the photodiode 3 to the vertical CCD 4 is set to, for example, 1/3 or less of the conventional example. From the opposite viewpoint, a part of the second-layer polysilicon electrode 10a has a shape protruding above the photodiode 3 (hereinafter referred to as protruding). The length of the second-layer polysilicon electrode 10a (the length of the gate electrode with respect to the direction in which the signal charge moves) in a region where there is no protrusion above the photodiode 3 is substantially equal to the length of the first-layer polysilicon electrode 9. The photodiode 3 also exists below the region where the second-layer polysilicon electrode 10a is not formed. In a region where the second-layer polysilicon electrode 10a is not formed, the p ++ -type region 7a serving as a hole accumulation layer is formed.
Completely cover the photodiode 3, and the area of the region where the p ++ type region 7a does not cover the photodiode 3 is less than one third of the conventional example. When the same high-level pulse voltage as that of the conventional example is applied to the second-layer polysilicon electrode 10a, the afterimage is equal to or less than the same measurement limit as that of the conventional example (0%) even though the protrusion area is reduced. And the p ++ type region 7a on the photodiode 3
As a result, the decrease in yield due to the occurrence of defective white spots is reduced to about 1/3 as compared with the conventional method.

【0013】なお本実施例においては、2層目のポリシ
リコン電極10aの突き出しの面積を従来例の1/3以
下程度に設定したが、その突き出しの面積を従来の2/
3,1/2,1/3と減少させるに従い、白キズ不良の
発生率は減少している。したがって、その突き出しの面
積を例えば従来例の1/4程度の最適な面積に設定する
ことにより、白キズ不良のない固体撮像装置の実現が可
能である。
In this embodiment, the area of the protrusion of the second-layer polysilicon electrode 10a is set to about 1/3 or less of the conventional example.
As the ratio is reduced to 3, 1/2, and 1/3, the incidence of white spot defects decreases. Therefore, by setting the area of the protrusion to an optimal area, for example, about 1 / of the conventional example, it is possible to realize a solid-state imaging device free from white spot defects.

【0014】[0014]

【発明の効果】以上のように本発明は、フォトダイオー
ドから垂直CCDへ信号電荷を読み出す2層目のポリシ
リコン電極の電極の幅を短縮して、フォトダイオード上
の正孔蓄積層の面積を増大させることにより、白キズの
個数およびその出力値を大幅に低減することができ、ま
たフォトダイオードの上に2層目のポリシリコン電極の
一部が突き出しているため測定限界以下の残像特性で信
号電荷を読み出すことができる優れた固体撮像装置を実
現することができる。
As described above, according to the present invention, the area of the hole accumulation layer on the photodiode is reduced by reducing the width of the second polysilicon electrode for reading signal charges from the photodiode to the vertical CCD. By increasing, the number of white flaws and the output value thereof can be greatly reduced. In addition, since a part of the second-layer polysilicon electrode protrudes above the photodiode, the after-image characteristic is lower than the measurement limit. An excellent solid-state imaging device capable of reading out signal charges can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)は本発明の一実施例における固体撮像装
置の要部平面図 (b)は図1(a)をA−A′線で切断した断面図
FIG. 1A is a plan view of a main part of a solid-state imaging device according to an embodiment of the present invention. FIG. 1B is a cross-sectional view taken along line AA ′ of FIG.

【図2】従来の固体撮像装置の断面図FIG. 2 is a cross-sectional view of a conventional solid-state imaging device.

【符号の説明】[Explanation of symbols]

1 n型シリコン基板(半導体基板) 2 p型ウエル(p型領域) 3 n-型領域(光電変換部) 4 n型領域(転送部) 7a p++型領域(p型領域) 10a 2層目のポリシリコン電極(読み出し電極)Reference Signs List 1 n-type silicon substrate (semiconductor substrate) 2 p-type well (p-type region) 3 n - type region (photoelectric conversion unit) 4 n-type region (transfer unit) 7a p ++ type region (p-type region) 10a 2 layers Eye polysilicon electrode (readout electrode)

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平2−30183(JP,A) 特開 平2−126778(JP,A) 特開 平2−168670(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 27/14 - 27/148 H01L 29/762 - 29/768────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-2-30183 (JP, A) JP-A-2-126778 (JP, A) JP-A-2-168670 (JP, A) (58) Field (Int.Cl. 6 , DB name) H01L 27/14-27/148 H01L 29/762-29/768

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 第1導電型の半導体基板上に、第2導電
型の領域からなる光電変換部と、前記光電変換部で生成
された信号電荷を受け取り順次転送する第2導電型の
域からなる転送部と、前記信号電荷を前記光電変換部か
ら前記転送部へ読み出して前記転送部中を電荷転送する
ための読み出し電極とを備えた固体撮像装置において、
前記読み出し電極は、前記光電変換部の一辺の一部上を
覆うように信号電荷の読み出し側に突き出し部が設けら
れ、第1導電型の領域からなる表面層が、前記光電変換
部の表面を前記突き出し部近傍を除いて覆うことを特徴
とする固体撮像装置。
A first conductive type semiconductor substrate formed on a first conductive type semiconductor substrate;
A photoelectric conversion unit comprising a region of a second conductivity type, a transfer unit comprising a region of a second conductivity type for receiving and sequentially transferring signal charges generated by the photoelectric conversion unit, and a photoelectric conversion unit comprising the photoelectric conversion unit. Or
To transfer to the transfer section and transfer charges in the transfer section
A solid-state imaging device having a readout electrode for
The readout electrode is formed on a part of one side of the photoelectric conversion unit.
A protruding part is provided on the signal charge reading side to cover
And the surface layer comprising the first conductivity type region is
The surface of the portion is covered except for the vicinity of the protruding portion.
A solid-state imaging device according to.
JP3039987A 1991-03-06 1991-03-06 Solid-state imaging device Expired - Fee Related JP2853778B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3039987A JP2853778B2 (en) 1991-03-06 1991-03-06 Solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3039987A JP2853778B2 (en) 1991-03-06 1991-03-06 Solid-state imaging device

Publications (2)

Publication Number Publication Date
JPH04277679A JPH04277679A (en) 1992-10-02
JP2853778B2 true JP2853778B2 (en) 1999-02-03

Family

ID=12568296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3039987A Expired - Fee Related JP2853778B2 (en) 1991-03-06 1991-03-06 Solid-state imaging device

Country Status (1)

Country Link
JP (1) JP2853778B2 (en)

Also Published As

Publication number Publication date
JPH04277679A (en) 1992-10-02

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