JP2862273B2 - Video signal processing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a video signal processing device for processing a video signal.

[Related Art] Conventionally, as a method for switching a plurality of types of images on a screen, a device for switching images by a special effect such as wipe or fade has been known.

Recently, among devices in which a video camera and a recording device are integrally formed, a device having an editing function such as a wipe or fade of an image as described above is appearing.

[Problems to be Solved by the Invention] However, such an apparatus as described above includes, for example, a memory circuit, stores an arbitrary still image in the memory circuit in advance, and stores the still image in the memory circuit. The corresponding video signal and the video signal corresponding to the subject image formed in the video camera section are sequentially switched at different timings, or sequentially mixed at different mixing ratios, and output by being mixed or wiped or faded. Performs special effects.

By the way, during the special effects mentioned above,
The state of the special effect is displayed on the Electric View Finder (EVF). At the start of the special effect, the EVF displays a still image stored in a memory circuit in the device. As a result, an image corresponding to a video signal formed in the video camera unit cannot be monitored by the EVF, which is inconvenient.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a video signal processing apparatus capable of monitoring each image wiped or faded during an editing function such as wipe or fade.

[Means for Solving the Problem] A video signal processing apparatus according to the present invention includes an input unit for inputting a video signal, a memory for storing the video signal input from the input unit, and a process for writing the video signal to the memory. Write instructing means for instructing, synthesizing means for synthesizing the input video signal and the video signal stored in the memory at a predetermined ratio, recording means for recording the video signal from the synthesizing means, Recording instruction means for instructing the start of recording of a video signal, display means for displaying an image relating to the video signal from the synthesizing means, and display of an image relating to the video signal synthesized by the synthesizing means by the display means. Display instruction means for instructing, and control means for controlling a synthesizing operation of the synthesizing means and a recording operation of the recording means, wherein the control means comprises the write instructing means The input video signal and the video signal stored in the memory by the synthesizing unit at a fixed ratio in accordance with an instruction of the display instructing unit from a writing instruction by the recording instructing unit to a recording start instruction by the recording instructing unit. Combining and displaying the video related to the composite video signal on the display means, and in response to the recording start instruction by the recording instruction means, the input video signal by the synthesis means and the video signal stored in the memory are combined. The composition ratio is gradually changed at a predetermined timing, wipe or fade processing is performed, and the composite video signal on which the wipe or fade processing is performed is recorded by the recording unit, and the composite video on which the wipe or fade processing is performed. The synthesizing unit and the recording unit are controlled so that an image related to a signal is displayed on the display unit.

[Operation] According to such a configuration, it is possible to easily confirm a state in which the input video signal and the video signal from the memory are combined before recording the wiped or faded video signal.

[Examples] Hereinafter, the present invention will be described using examples of the present invention.

FIG. 1 is a block diagram showing a schematic configuration of a video signal processing apparatus as an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the apparatus shown in FIG.

In FIG. 1, reference numeral 1 denotes a video camera unit which forms and outputs a video signal by capturing an image of a subject; 2 denotes an analog / digital (A / D) converter which converts an analog video signal into a digital video signal; A field memory capable of storing one field of digital video signals, 4a and 4b are coefficient multipliers, 5 is a full adder, 6 is a digital / analog converter for converting a digital video signal into an analog video signal, and 7 is a switching switch. , 8 is an electronic view interface (EVF), 9 is a recording unit that records an input video signal on a recording medium, 10 is a system controller that controls the operation of each circuit, and 11 is a unit that instructs the system controller to perform each operation. Operation unit.

In FIG. 1, by first operating the operation unit 11,
When the system controller 10 is instructed to start a normal imaging / recording operation, the system controller 10 operates the video camera unit 1, the EVF 8, and the recording unit 9 and connects the switching switch 7 to the A side in the figure, and A video signal corresponding to the subject image output from the camera unit 1 is supplied to the EVF 8 and the recording unit 9.

The EVF 8 displays an image corresponding to the subject being imaged by the video camera unit 1, and the recording unit 9 records a video signal output from the video camera unit 1 on a recording medium (not shown). .

When a wipe or fade operation is selected on the operation unit 11 as shown in FIG. 2A, the system controller 10 causes the video camera unit 1, the A / D converter 2, the D / A The converter 6 and the FVF 8 are operated, the control signal (b) output to the switching switch 7 is set to a high level (H) (see FIG. 2 (b)), and the switching switch 7 is set to the A side in the figure. To B side. At this time, the coefficient data representing the coefficient "1" is output from the system controller 10 to the coefficient multiplier 4a (see FIGS. 2 (d) and (f)), and the coefficient multiplier 4b represents the coefficient "0". The coefficient data is output (see FIGS. 2E and 2G).

Then, after being output from the video camera unit 1 and digitized by the A / D converter 2 by the above-described operation,
The video signal multiplied by the coefficient “1” in the coefficient multiplier 4a is added to the signal multiplied by the coefficient “0” in the coefficient multiplier 4b in the full adder 5, and then the D / A converter 6 The supplied video signal is converted to an analog signal by the D / A converter 6 and supplied to the EVF 8 via the switching switch 7. The EVF 8 displays an image indicated by the video signal output from the video camera unit 1. Become.

Next, as shown in FIG. 2A, when an image storage operation is instructed in the operation unit 11, a control signal (C) supplied from the system controller 10 to the field memory 3 is output.
Changes from the high level (H) to the low level (L) for one field period as shown in FIG. 2 (c), and the field memory 3 stores the control signal (C) during the low level (L) period. It will be in the storage state, output from the video camera unit 1,
The video signal digitized by the A / D converter 2 is
When the control signal (C) becomes high level (H) after storing one field of video signal and storing one field of video signal, the video signal stored in the field memory 3 is repeatedly read.

At this time, the coefficient data representing the coefficient “0” is output from the system controller 10 to the coefficient multiplier 4a (second
(FIGS. 2D and 2F), coefficient data representing a coefficient "1" is output to the coefficient multiplier 4b (FIGS. 2E and 2F).
(See (g)), the video signal read from the field memory 3 and multiplied by the coefficient "1" in the coefficient multiplier 4h is added by the full adder 5 to the signal multiplied by the coefficient "0" in the coefficient multiplier 4a. After that, it is supplied to the D / A converter 6 and the D / A
The video signal analogized by the converter 6 is supplied to the EVF 8 via the switching switch 7, and the EVF 8 displays a still image indicated by the video signal read from the field memory 3.

As described above, the still image indicated by the video signal read from the field memory 3 is displayed on the EVF 8 for a predetermined period after the image storage operation is instructed by the operation unit 11, and thereafter, the system controller 10 Is instructed to perform the mixing operation.

When the mixing operation is instructed from the operation unit 11, the system controller 10 outputs coefficient data representing the coefficient "0.5" to the coefficient multiplier 4a (see FIGS. 2 (d) and 2 (f)).
The coefficient data representing the coefficient "0.5" is output to the coefficient multiplier 4b (see FIGS. 2 (e) and 2 (g)), output from the video camera unit 1, digitized by the A / D converter 2, and further digitized. In the full adder 5, the video signal multiplied by the coefficient "0.5" in the coefficient multiplier 4a and the video signal read from the field memory 3 and further multiplied by the coefficient "0.5" in the coefficient multiplier 4b They are mixed by being added.

Then, the mixed video signal is supplied to the D / A converter 6, converted into an analog signal by the D / A converter 6, and then supplied to the EVF 8 via the switching switch 7. Output video signal and field memory 3
The image indicated by the mixed video signal in which the still image signal stored in the image data is mixed is displayed.

The above operation allows the operator to confirm that the wipe or fade operation has been selected, and also allows the captured image at the time of the wipe or fade recording to be monitored by the EVF. When the captured image to be wiped or faded is determined by the above-described operation, the operator operates the operation unit 11 to start the wipe recording or the fade recording as shown in FIG. 2A. To instruct.

When the start of wipe or fade recording is instructed in the operation unit 11, the system controller 10 operates the recording unit 9 and sets the switching timing of the combination of coefficient data to be supplied to the coefficient multipliers 4a and 4b by the wipe or fade. By changing it in one field cycle according to the type of operation (see FIGS. 2 (d) to (g)), D / A
The converter 6 is supplied with a digital image pickup video signal that has been subjected to wipe or fade processing by a still image signal,
Here, after being converted into an analog signal, the signal
The EVF 8 is supplied to the recording unit 9, and the wiped or faded image is displayed on the EVF 8, and is recorded on the recording medium in the recording unit 9.

Further, the above-described wipe or fade processing operation will be described in detail with reference to FIGS. 3, 4, and 5. FIG.

FIG. 3 shows an operation timing chart when the wipe operation is performed in the horizontal direction.
(B) shows coefficient multipliers 4a and 4b from the system controller 10.
(C) shows a horizontal wipe image displayed on the screen of the EVF8.

Now, when the coefficient of the coefficient data supplied to the coefficient multiplier 4a from the system controller 10 is X, the coefficient of the coefficient data supplied to the coefficient multiplier 4b is Y, and the combination of the coefficient data is represented as (X, Y). In the case of horizontal wipe recording, the combination of coefficient data output from the system controller 10 is synchronized with the horizontal synchronization signal shown in FIG.
As shown in FIG. 3B, the combination of coefficient data allocated to each horizontal scanning period in each field period is equal, and by changing from (1, 0) to (0, 1) in the field period, FIG. ) Is displayed on the EVF 8 and recorded on the recording medium.

FIG. 4 shows an operation timing chart when a wipe operation is performed in the vertical direction. FIG. 4 (a) is a vertical synchronizing signal, and FIG. 4 (b) is supplied from the system controller 10 to coefficient multipliers 4a and 4b. Combination of coefficient data,
(C) shows a vertical wipe image displayed on the screen of the EVF8.

Similarly to the above, when the combination of coefficient data output from the system controller 10 is represented by (X, Y), the combination of coefficient data output from the system controller 10 in the case of vertical wipe recording is shown in FIG. 4B, and the combination of coefficient data (1, 1) assigned to each horizontal scanning period as shown in FIG.
By changing the ratio of (0), (0,1) in the field cycle, the vertical wipe image shown in FIG. 4C is displayed on the EVF 8 and recorded on the recording medium.

FIG. 5 shows an operation timing chart when a fade operation is performed. FIG. 5 (a) is a vertical synchronizing signal, and FIG. 5 (b) is a coefficient multiplier 4a from the system controller 10.
(C) shows the coefficient data supplied from the system controller 10 to the coefficient multiplier 4b.

In the case of the fade recording, the coefficient data supplied from the system controller 10 to the coefficient multiplier 4a is synchronized with the vertical synchronizing signal shown in FIG. 5 (a), and as shown in FIG. 5 (b), The value of the coefficient data assigned to the horizontal scanning period is made equal, and changed from “0” to “1.0” in the field cycle.
By changing the coefficient data supplied to 4b from “1.0” to “0”, the faded image is displayed on the EVF 8 and recorded on the recording medium.

As described above, in the video signal processing device according to the present embodiment, at the time of wipe or fade recording of a video signal, it is possible to confirm on the EVF that the wipe or fade recording is selected. At the same time, it is possible to check the image of the subject being captured by the video camera unit at that time, and also to check the wipe or fade image during wipe or fade recording, which is extremely convenient. ing.

[Effects of the Invention] As described above, according to the present invention, before recording a video signal, an image related to a video signal obtained by synthesizing an input video signal and a video signal from a memory is displayed. The contents of the video signal and the video signal stored in the memory can be confirmed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a video signal processing apparatus as an embodiment of the present invention. FIG. 2 is a timing chart for explaining the operation of the apparatus shown in FIG. FIG. 3 is an operation timing chart during the horizontal wipe operation. FIG. 4 is an operation timing chart during the vertical wipe operation. FIG. 5 is an operation timing chart during the fade operation. DESCRIPTION OF SYMBOLS 1 ... Video camera part 2 ... A / D converter 3 ... Field memory 4a, 4b ... Coefficient multiplier 5 ... Full adder 6 ... D / A converter 7 ... Switching switch 8 ... Electronic Viewfinder 9: Recording unit 10: System controller 11: Operation unit

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Tadayoshi Nakayama 770 Shimonoge, Takatsu-ku, Kawasaki, Kanagawa Prefecture Inside the Tamagawa Office of Canon Inc. In-house (56) References JP-A-63-114471 (JP, A) JP-A-61-154074 (JP, U) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04N 5/262- 5/28

Claims (1)

(57) [Claims] An input unit for inputting a video signal; a memory for storing the video signal input from the input unit; a write instructing unit for instructing writing of the video signal to the memory; Synthesizing means for synthesizing the video signal stored in the memory at a predetermined ratio; recording means for recording the video signal from the synthesizing means; recording instruction means for instructing the recording means to start recording the video signal; A display unit that displays an image related to a video signal from the combining unit; a display instruction unit that instructs the display unit to display an image related to a video signal combined by the combining unit; and a combining operation of the combining unit. And a control unit for controlling a recording operation of the recording unit. The control unit is configured to execute the recording instruction from the writing instruction by the writing instruction unit. According to the instruction of the display instruction means until the instruction of the start of recording by the stage, the combining means combines the input video signal and the video signal stored in the memory at a fixed rate and relates to the combined signal. An image is displayed on the display means, and the rate of synthesis of the input video signal and the video signal stored in the memory by the synthesizing means is gradually increased at a predetermined timing in response to a recording start instruction by the recording instruction means. The wiped or faded composite video signal subjected to the wipe or fade processing is recorded by the recording means, and the video related to the wiped or faded composite video signal is displayed on the display means. A video signal processing device for controlling the synthesizing means and the recording means to display the video signal.