JP2865013B2 - Demodulation system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation system used for digital radio communication, and more particularly to a demodulation system having a decision feedback equalizer.

[0002]

2. Description of the Related Art With the development of digital high-efficiency transmission, it has become important to improve the modulation and demodulation system and increase the number of values. In digital wireless communication, waveform error is received on the propagation path due to frequency selective fading, and the code error characteristics are degraded. Since the influence of waveform distortion on code error characteristics increases as the number of multi-level modulation / demodulation systems increases, an automatic equalizer that removes waveform distortion and prevents deterioration of code error characteristics in a multi-level modulation / demodulation system demodulation system. Used.

An equalizer using a transversal filter has been used as such an automatic equalizer, but a decision feedback equalizer has a stronger equalizing performance. The decision feedback equalizer uses a reference signal obtained by judging a transversal filter output instead of directly using an equalizer input signal for a tap temporally before a center tap of the transversal filter. (Applications of Digital Signal Processing, edited by the Institute of Electronics and Communication Engineers, pp. 163-56-20), especially when the interference wave is delayed from the main wave due to two-wave interference fading, the equalization capability is extremely large.

A demodulation system having a decision feedback equalizer detects a received signal to generate a baseband signal, amplifies the signal by a baseband amplifier, converts the analog signal to a digital signal by an AD converter, and converts the data signal into a data signal. Equalization is performed by a decision feedback equalizer to obtain a demodulated output.

[0005]

By the way, the peak value of the instantaneous amplitude of the received signal becomes larger in a state where the waveform distortion occurs due to the fading than in a state where there is no fading. As the fading amount increases, the peak value of the instantaneous amplitude of the received signal also increases. Therefore, in the conventional demodulation system, when fading becomes intense, the input amplitude of a mixer or a baseband amplifier for detecting a received signal becomes excessively large, causing distortion, and this distortion is added to waveform distortion generated in a propagation path due to fading. Even if a decision feedback equalizer with a large equalization capability is used, when the fading is severe and the waveform distortion generated in the propagation path is large, the distortion generated in the mixer and the baseband amplifier also increases, and the There is a problem that the equalization ability is impaired.

SUMMARY OF THE INVENTION An object of the present invention is to maximize the equalization capability of a decision feedback equalizer by preventing the occurrence of distortion in a mixer or a baseband amplifier when fading is severe and waveform distortion generated in a propagation path is large. An object of the present invention is to provide a demodulation system that can be used.

[0007]

A demodulation system according to the present invention comprises a detector for detecting a received signal, which is a signal obtained by wirelessly transmitting a digitally modulated signal, and amplifies a baseband signal output from the detector. A demodulation system including a baseband amplifier, an AD converter that performs analog-to-digital conversion of a signal amplified by the baseband amplifier, and a decision feedback equalizer that equalizes a data signal output from the AD converter. A fading amount detecting means for detecting a fading amount received by the received signal and outputting a signal representing the fading amount; and a predetermined value when the fading amount is zero based on an output signal of the fading amount detecting means. And generates a voltage having a value that decreases as the fading amount increases, and supplies an analog signal to the AD converter. A reference voltage generator that supplies a reference voltage that is a comparison reference of the input signal, and the reception signal of the reception signal such that the error of the value of the data signal output from the equalization by the decision feedback equalizer becomes smaller than the ideal value. An AGC amplifier for adjusting the level and supplying the adjusted signal to the detector as an input signal to be detected.

[0008] The fading amount detecting means in the present invention may detect the fading amount based on the magnitude of a tap coefficient of the decision feedback equalizer.

Further, in the present invention, the fading amount detecting means selects the maximum absolute value of each tap coefficient excluding the tap coefficient of the center tap of the decision feedback equalizer and indicates the fading amount. It may be a maximum value selector that outputs a signal.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

Referring to FIG. 1 showing a first embodiment of the present invention, an AGC amplifier 10 of a demodulation unit 1 receives a received signal S1 in an intermediate frequency band which has been subjected to ^22.sup.n quadrature amplitude modulation and wirelessly transmitted.
Is input, and the level is adjusted based on the control signal AGC from the demodulation unit control unit 23 and output to the hybrid (H) 11.

The hybrid 11 divides the signal input from the AGC amplifier 10 into two and mixes the signals (MIX) 12P, 12P.
Output to Q. Carrier oscillator (CARR OSC) 17
Generates a reproduced carrier signal that is phase-synchronized with the carrier component of the received signal S1 based on the control signal APC from the demodulator control unit 23, and directly outputs the reproduced carrier signal to the mixer 12P and the π / 2 phase shifter 1
8 to the mixer 12Q. Mixer 12P, 1
2Q performs quadrature synchronous detection of a signal input from the hybrid 11, and a mixer 12P outputs a low-pass filter (LPF) 13P.
Unnecessary wave components are removed by P to become baseband signals of in-phase components. The output of the mixer 12Q is a low-pass filter (LP
F) Unnecessary wave components are removed by 13Q to become orthogonal component baseband signals.

The baseband amplifiers 14P and 14Q amplify the baseband signals input from the low-pass filters 13P and 13Q, and output the amplified signals to the square detectors 15P and 15Q and the AD converters (A / D) 16P and 16Q. The gain of the baseband amplifier 14Q is fixed, and the DC offset is corrected based on a control signal (Q) OFFSET from the demodulation control unit 23. The gain of the baseband amplifier 14P is corrected based on the control signal (P) AGC from the demodulation control unit 23 so as to compensate for the imbalance between the gains of the in-phase sequence and the quadrature sequence throughout the demodulation system. The DC offset of the baseband amplifier 14P is corrected based on a control signal (P) OFFSET from the demodulation control unit 23.

The square detectors 15P and 15Q square-detect the input baseband signal to generate a clock component of the baseband signal, and generate a clock synchronization circuit (CLK SYN).
C) Supply to 19. The clock synchronization circuit 19 generates a clock signal whose phase is synchronized with the supplied clock component, and supplies the clock signal to the AD converters 16P and 16Q.

Referring to FIG. 2, the AD converter 16P includes:
The instantaneous voltage V _IN of the baseband signal input from the baseband amplifier 14P is sampled at the timing of the clock signal, and a pair of reference voltages S4 supplied from the control unit 3
And the maximum voltage in the allowable input range, the minimum voltage _VRT ,
The analog-to-digital conversion into a predetermined number of bits is performed using V _RB as a comparison reference, and the data is output to the equalizer 2 as a data signal that is a digitized baseband signal. AD converter 16Q
Similarly, the baseband signal input from the baseband amplifier 14Q is sampled / analog-digital-converted and output to the equalizer 2.

Returning to FIG. 1, the equalizers 21P,
Reference numeral 21Q denotes an adaptive matched filter for making an asymmetrical impulse response symmetrical (see, for example, Japanese Patent Application Laid-Open No. Hei 4-271508). Equalizer 22P, 2
Output to 2Q. The decision feedback equalizers 22P and 22Q are:
The data signals input from the equalizers 21P and 21Q are further equalized and output to the outside as output data S2P and S2Q. Since the received signal S1 is a 2 ^2n- value quadrature amplitude modulation signal, n bits from the highest bit of the output data S2P and S2Q are demodulated outputs, and the (n + 1) th bit from the highest bit is the output data S2P and S2Q. Is an error bit indicating whether the value of. Has shifted to a larger value or a smaller value. Here, the decision feedback equalizer 22P
In the following description, the filter unit 221 uses the data signal input from the equalizer 21P as it is for the center tap and the tap temporally subsequent thereto, and uses its own data for the tap temporally earlier than the center tap. This is a transversal filter that uses reference data obtained by determining the output with a determiner 222. The tap coefficient generation circuit 223 generates each tap coefficient from the output data S2P and supplies it to each tap weighting circuit (not shown) of the filter unit 221 and supplies each tap coefficient to the control unit 3 as a signal S3. . The configuration of the decision feedback equalizer 22Q is the same as the configuration of the decision feedback equalizer 22P described above.

The demodulation unit control unit 23 outputs the output data S2P,
By performing a logical operation on each of the most significant bit and each error bit of S2Q, control signals AGC, (P) AGC, (P) OFFSE
T, (Q) OFFSET, and APC are generated and supplied to the AGC amplifier 10, the baseband amplifier 14P, the baseband amplifier 14Q, and the carrier oscillator 17. As a result, the gain imbalance between the in-phase sequence and the quadrature sequence throughout the demodulation system is compensated for, and the output data S2P, S2
The gain of the baseband amplifier 14P and the AGC amplifier 1P are set so that the error of the 2Q value with respect to the ideal value is reduced.
0 is controlled and the baseband amplifier 1
The DC offset of 4P, 14Q is controlled to an optimum value.
The construction and operation of the demodulation section control section 23 are described in
The details are described in JP-A-169256 and JP-A-57-131151.

Referring again to FIG. 2, the maximum value selector 31 of the control unit 3 calculates the absolute value of each tap coefficient excluding the tap coefficient of the center tap among the supplied tap coefficients S3.
The absolute value having the largest value is output to the reference voltage generator 32. The value of this output is a value representing the amount of fading received by the received signal S1, as described later in detail.
The reference voltage generator 32 is a circuit that generates the highest voltage V _RT and the lowest voltage V _RB as the reference voltage S4 according to the value input from the maximum value selector 31 and supplies the generated voltages to the AD converters 16P and 16Q. When the value input from the maximum value selector 31 is zero, in other words, when the amount of fading received by the received signal S1 is zero, the voltages V _RT and V _RB are set to prescribed values, for example, ±
As the value input from the maximum value selector 31 increases to 2 V, in other words, as the fading amount increases, the difference between the voltages V _RT and V _RB decreases. When the fading amount reaches the maximum to be equalized, the voltages V _RT and V _RB are set to, for example, ± 1.5 V. An out-of-frame alarm S5 from a frame synchronization circuit (not shown) subsequent to the demodulation system is input to the reference voltage generator 32. When the frame synchronization is lost and the frame synchronization loss alarm S5 is input, the voltages V _RT and V _RB are set to ± 1.5 V on the assumption that the fading amount has become too large to be equalized.

Since the embodiment shown in FIG. 1 has the above-described configuration, the level of the received signal S 1, which is a multilevel quadrature amplitude modulated wave in the intermediate frequency band, is adjusted by the AGC amplifier 10 and divided into two by the hybrid 11. After that, the mixer 12P,
The quadrature synchronous detection is performed by 12Q to be a baseband signal of an in-phase component and a quadrature component. These baseband signals are passed through low-pass filters 13P, 13Q and baseband amplifiers 14P, 14Q, respectively, to AD converters 16P, 16P.
Q, sampled at clock timing, and converted into an analog-to-digital signal to become a data signal.

These data signals are supplied to the equalizers 21P and 21P.
Q is equalized by the decision feedback equalizers 22P and 22Q to become output data S2P and S2Q, which are output to the outside.
As described above, the equalization capability of the decision feedback equalizer is extremely large when the interference wave is behind the main wave due to two-wave interference fading, but not so much when the interference wave is ahead of the main wave. Absent. However, even in this case, in the present embodiment, the equalizers 21P and 21P are arranged before the decision feedback equalizers 22P and 22Q.
By arranging 1Q and performing pre-equalization, the equalization unit 2 has an extremely high equalization capability as a whole.

It is assumed that the waveform distortion or the like to be equalized by the equalizer 2 is caused only by the fading of the received signal S1 and the other effects can be ignored. When there is no fading, the tap coefficient S3 of the decision feedback equalizer 22P is used. Becomes zero except for the tap coefficient of the center tap. As the fading amount increases, one of the absolute values of the tap coefficient S3 except the tap coefficient of the center tap necessarily increases. Therefore, the value output from the maximum value detector 31 can be used as a value representing the fading amount.

Assuming that the fading amount increases at a certain time t, the output of the maximum value detector 31 increases, and the reference voltage generator 32 outputs the maximum voltage V _RT , which is generated as the reference voltage S4.
The difference between the minimum voltages V _RB is reduced. Since the difference between the voltages V _RT and V _RB is a reference for comparing the baseband signals input to the AD converters 16P and 16Q, when the difference between the voltages V _RT and V _RB becomes small, the input / output of the AD converters 16P and 16Q becomes smaller. The relationship changes in the same manner as before the input of the baseband signal in the amplitude direction as compared to before time t. Since this change also appears in the output data S2P and S2Q of the equalizer 2 as it is, the values of the output data S2P and S2Q change in the direction in which the baseband signal is expanded in the amplitude direction with respect to the ideal value. However, the demodulator control unit 23 lowers the output level of the AGC amplifier 10 so as to compress the baseband signal in the amplitude direction due to the change of the output data S2P and S2Q. As a result, after time t, the mixers 12P, 12Q,
The amplitude of the signal passing through the baseband amplifiers 14P and 14Q decreases. Generalizing this, the mixers 12P, 1
The amplitude of the signal passing through the 2Q and the baseband amplifiers 14P and 14Q changes in accordance with the amount of fading so as to decrease as the amount of fading increases.

When the fading amount increases, the received signal S
1, the peak value of the instantaneous amplitude becomes large. At this time, the mixers 12P and 12Q and the baseband amplifiers 14P and 14Q
The amplitude of the signal passing through the mixer 12P, 1
This prevents the amplitude of signals passing through the 2Q and baseband amplifiers 14P and 14Q from becoming excessively large and causing distortion. As the amplitude of the signal passing through the mixers 12P and 12Q and the baseband amplifiers 14P and 14Q decreases, the degradation of the code error characteristic due to noise increases, but the improvement of the code error characteristic by preventing the occurrence of distortion is much greater. When the fading amount decreases, the mixers 12P and 12Q and the baseband amplifier 1
The amplitude of the signal passing through 4P and 14Q increases, and the degradation of code error characteristics due to noise decreases.

In the first embodiment of the present invention shown in FIG. 1, a value representing the amount of fading received by the received signal S1 is obtained from the tap coefficient of the decision feedback equalizer 22P. In the second embodiment of the present invention, a value representing the amount of fading received by the received signal is obtained from the spectrum distribution of the received signal.

Referring to FIG. 3 showing a second embodiment of the present invention, a received signal S 1 is input to a demodulator 1 and a controller 4. In the figure, a received signal S1, a demodulation unit 1 and an equalization unit 2 are the same as those in FIG.

The received signal S1 is input to the filters 41, 42 and 43 of the control unit 4. The filter 41 is a narrow-band bandpass filter whose center frequency is equal to the center frequency f ₀ of the received signal S1. The filters 41 and 43 have a center frequency of f
_l , _fu is a narrow-band bandpass filter equal to fu. The frequency _fl is a frequency near the lower end of a substantially flat range of the spectrum distribution of the received signal S1 when there is no fading, and the frequency _fu is also a frequency near the upper end. The level detectors 44, 45, 46 are provided with filters 41, 42, 4
3 is input, the level is detected, and level data indicating the input level is output to the logic circuit 47. If the amount of fading received by the received signal S1 is small, the spectrum distribution of the received signal S1 is substantially flat, and the values of the level data output by the level detectors 44, 45, and 46 are substantially equal to each other. As the fading amount increases, imbalance occurs between the level data, and the degree of imbalance increases. The logic circuit 47 is a circuit mainly composed of a ROM, converts each level data from the level detectors 44, 45, and 46 into a value representing a fading amount and outputs the value to a reference voltage generator 48. Reference voltage generator 48
Is the same as the reference voltage generator 32 in FIG.
The reference voltage S6 is generated according to the value input from the logic circuit 47 and supplied to the AD converters 16P and 16Q of the demodulation unit 1.

The configuration of the embodiment shown in FIG. 3 is configured by replacing the control unit 3 of the embodiment shown in FIG.
The control unit 4 is the same as the control unit 3 in generating a reference voltage S6 determined according to the fading amount of the received signal S1. Therefore, also in the embodiment shown in FIG. 3, the demodulation unit 1 and the equalization unit 2 operate in the same manner as in the embodiment shown in FIG. 1, and the mixer and the base when the received signal S1 receives a large amount of fading are increased. The occurrence of distortion in the band amplifier can be prevented, and the effect of noise in the mixer and the baseband amplifier can be reduced if the amount of fading is reduced.

[0028]

As described above, according to the present invention, a baseband signal obtained by detecting a received signal with a detector is amplified by a baseband amplifier, converted into a data signal by an AD converter, and converted to a decision feedback equalizer. A demodulation system for equalizing by: a fading amount detecting means for detecting a fading amount received by a received signal; and a voltage which becomes smaller as the fading amount becomes larger based on a detection result of the fading amount detecting means. Adjusts the level of the received signal so that the error between the reference voltage generator, which is generated as the reference voltage that is the comparison reference for the input signal, and the ideal value of the data signal output by the decision feedback equalizer, becomes smaller. A
A GC amplifier is provided to reduce the amplitude of the signal passing through the detector and the baseband amplifier as the amount of fading increases, so that the fading amount increases and the peak value of the instantaneous amplitude of the received signal increases. In addition, it is possible to prevent the amplitude of the signal passing through the baseband amplifier from being excessively large, thereby preventing distortion from occurring and deteriorating code error characteristics. Therefore, there is an effect that the deterioration of the code error characteristic due to the influence of the above can be reduced, and the large equalizing ability of the decision feedback equalizer can be maximized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram for explaining a configuration of a control unit 3 and an operation of an AD converter 16P in FIG. 1;

FIG. 3 is a block diagram showing a second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 AGC amplifier 12P, 12Q mixer 14P, 14Q Base band amplifier 16P, 16Q AD converter 22P, 22Q Decision feedback type equalizer 23 Demodulation part control part 31 Maximum value selector 32 Reference voltage generator

Continuation of the front page (58) Fields investigated (Int.Cl. ⁶ , DB name) H04B 7/005 H04B 3/00-3/18 H04L 27/00 H03M 1/00 H03H 15/00-17/00

Claims (3)

(57) [Claims] 1. A detector for detecting a received signal, which is a signal obtained by wirelessly transmitting a digitally modulated signal, a baseband amplifier for amplifying a baseband signal output from the detector, and a baseband amplifier. In a demodulation system including an AD converter that performs analog-to-digital conversion of an amplified signal and a decision feedback equalizer that equalizes a data signal output from the AD converter, an amount of fading received by the received signal. And a fading amount detecting means for detecting a fading amount and outputting a signal indicating the fading amount. Based on an output signal of the fading amount detecting means, the fading amount takes a predetermined value when the fading amount is zero, and decreases as the fading amount increases. A voltage having a value is generated and supplied to the AD converter as a reference voltage which is a comparison reference of an analog input signal. A reference voltage generator that supplies the received signal, and adjusts the level of the received signal so that the error of the value of the data signal equalized and output by the decision feedback equalizer with respect to the ideal value is reduced and detected by the detector. An AGC amplifier for providing as an input signal to be performed. 2. The demodulation system according to claim 1, wherein said fading amount detecting means detects said fading amount based on a magnitude of a tap coefficient of said decision feedback equalizer. 3. The fading amount detecting means selects the maximum absolute value of each tap coefficient excluding the tap coefficient of the center tap of the decision feedback equalizer, and outputs it as a signal representing the fading amount. 3. The demodulation system according to claim 2, wherein the demodulation system is a maximum value selector.