JP2867396B2 - 2-wire 4-wire conversion circuit - Google Patents
2-wire 4-wire conversion circuitInfo
- Publication number
- JP2867396B2 JP2867396B2 JP29666388A JP29666388A JP2867396B2 JP 2867396 B2 JP2867396 B2 JP 2867396B2 JP 29666388 A JP29666388 A JP 29666388A JP 29666388 A JP29666388 A JP 29666388A JP 2867396 B2 JP2867396 B2 JP 2867396B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- circuit
- wire line
- signal
- insertion loss
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 10
- 238000003780 insertion Methods 0.000 claims description 19
- 230000037431 insertion Effects 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 238000003786 synthesis reaction Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 3
- 230000014509 gene expression Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は2線式線路からの信号を4線式線路に送信
し、4線式線路からの信号を2線式線路に供給する2線
4線変換回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention transmits a signal from a two-wire line to a four-wire line, and supplies a signal from the four-wire line to the two-wire line. The present invention relates to a four-wire conversion circuit.
2線4線変換回路は、第3図に示す様に、2線式線路
から送信された信号を4線式線路へ送信する機能と4線
式線路から供給された信号を2線式線路へ供給する機能
の他に2線式線路からの信号入力時に反射する信号を打
ち消す終端インピーダンス合成機能と4線式から2線式
への変換時に生じる挿入損失を少なくする挿入損失補正
機能と、2線式線路への信号出力時に反射して4線式線
路にまわり込む信号を打ち消す平衡機能を備えている。As shown in FIG. 3, the two-wire to four-wire conversion circuit has a function of transmitting a signal transmitted from the two-wire line to the four-wire line and a function of transmitting a signal supplied from the four-wire line to the two-wire line. In addition to the supply function, a terminating impedance combining function for canceling a signal reflected when a signal is input from a two-wire line, an insertion loss correction function for reducing insertion loss caused during conversion from a four-wire system to a two-wire system, and a two-wire system A balance function is provided for canceling a signal reflected at the time of outputting a signal to the four-wire line and going around the four-wire line.
〔発明が解決しようとする課題〕 上述した従来の2線4線変換回路では、終端インピー
ダンス合成機能,挿入損失補正機能及び平衡機能を実現
する際、各々異なる回路で構成する事が必要となり、複
雑になる他、チップ面積が増大するという欠点がある。[Problem to be Solved by the Invention] In the above-described conventional two-wire / four-wire conversion circuit, when realizing the termination impedance synthesis function, the insertion loss correction function, and the balance function, it is necessary to configure each of them with a different circuit, which is complicated. In addition, there is a disadvantage that the chip area increases.
本発明の2線4線変換回路は、2線式線路からの信号
を4線式線路に送信し、4線式線路からの信号を2線式
線路に供給する2線4線変換回路において、2線式線路
からの信号の入力時に反射する信号を打ち消す終端イン
ピーダンス合成回路と、4線式線路からの2線式線路に
変換することにより生ずる挿入損失を少なくする挿入損
失補正回路と、4線式線路からの信号の出力時に2線式
線路で反射し4線式線路にまわり込む信号を打ち消す平
衡回路とを有し、2線式線路から見て前記終端インピー
ダンス合成回路、前記挿入損失補正回路、前記平衡回路
の順に配置し、更に前記終端インピーダンス合成回路と
前記挿入損失補正回路との伝達関数の極を等しくし、前
記終端インピーダンス合成回路と前記挿入損失補正回路
とが共通回路で構成される。A two-wire / four-wire conversion circuit according to the present invention transmits a signal from a two-wire line to a four-wire line and supplies a signal from the four-wire line to the two-wire line. A termination impedance combining circuit that cancels a signal reflected when a signal is input from a two-wire line, an insertion loss correction circuit that reduces insertion loss caused by conversion from a four-wire line to a two-wire line, and a four-wire line And a balance circuit for canceling a signal reflected by the two-wire line and wrapping around the four-wire line when a signal is output from the two-wire line, the termination impedance combining circuit and the insertion loss correction circuit viewed from the two-wire line. , Arranged in the order of the balance circuit, further equalizing the poles of the transfer function of the termination impedance synthesis circuit and the insertion loss correction circuit, and the termination impedance synthesis circuit and the insertion loss correction circuit are configured by a common circuit It is.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図は本発明のブロック図を示す、vSは2線式線路
の送信源ZLは2線式線路の公称インピーダンスを示す。
またHZ,HO,HBは各々終端インピーダンス合成機能,挿入
損失補正機能,平衡機能を有す伝達関数を示す。更にA
はユニティゲインアンプと、R0は基準抵抗を示す。FIG. 1 shows a block diagram of the invention, where v S indicates the transmission source ZL of a two-wire line and L L indicates the nominal impedance of the two-wire line.
H Z , H O , and H B represent transfer functions having a termination impedance synthesis function, an insertion loss correction function, and a balance function, respectively. Further A
Represents a unity gain amplifier, and R0 represents a reference resistor.
次にvS,vX,vRの関係について解析する。ユニティゲイ
ンアンプの出力電圧をv0、2線4線変換回路の2線式線
路側接続点と電圧をviとすると、v0,viは次式で与えら
れる。Next, the relationship between v S , v X , and v R is analyzed. When the output voltage of the unity-gain amplifier v 0, 2-wire line side connection point of the two-wire four-wire conversion circuit and a voltage and v i, v 0, v i is given by the following equation.
第(1)式及び第(2)式より次式を得る。 The following equation is obtained from the equations (1) and (2).
今、vR=0とすると となり、インピーダンス整合の必要十分条件 より すなわち、 とすればよい。 Now, if v R = 0 And the necessary and sufficient conditions for impedance matching Than That is, And it is sufficient.
次に第(3)式においてvS=0とすると、次式を得
る。Next, if v S = 0 in the equation (3), the following equation is obtained.
ここで第(4)式が成り立ってインピーダンス整合が
とれているとすると、第(5)式に代入して次式を得
る。 Here, assuming that the equation (4) is satisfied and impedance matching is achieved, the following equation is obtained by substituting the equation (5).
従って挿入損失が0dBであるためには次式が成り立て
ばよい。 Therefore, the following equation should be satisfied in order for the insertion loss to be 0 dB.
次にHBを求めるためvS=0としてvRとvXの関係を導く
と次の様になる。 Next, in order to obtain the H B v S = 0 as v when guiding the relationship between R and v X becomes as follows.
ここでZL′は2線式線路の線路インピーダンスであ
る。 Here, Z L ′ is the line impedance of the two-wire line.
第(9)式及び第(10)式より次式を得る。 The following equation is obtained from the equations (9) and (10).
第(11)式と第(8)式に代入して次式を得る。 The following equation is obtained by substituting into the equations (11) and (8).
従ってvR→vXのまわり込みをなくすための必要十分条
件は次式で与えられる。 Therefore, the necessary and sufficient condition for eliminating the wraparound of v R → v X is given by the following equation.
ここで、終端インピーダンス整合がとれていて挿入損
失が0dBの時、第(4)式及び第(7)式が成り立って
おり、第(13)式に代入することにより、次式の様にな
る。 Here, when the termination impedance is matched and the insertion loss is 0 dB, the expressions (4) and (7) are satisfied. By substituting into the expression (13), the following expression is obtained. .
ここで第(4)式の項を と分離して考えれば、第2図に示す様になる。この時、
第(7)式で示されたH0と第(15)式で示されたHZ2比
較すれば明らかな様に、定数が異なるだけで全く一致し
ている。 Where the term in equation (4) is When considered separately, the result is as shown in FIG. At this time,
As is clear from the comparison between H 0 shown in the equation (7) and H Z2 shown in the equation (15), they are completely the same except for the constants.
以上説明した様に、本発明は、2線式線路から見て、
終端インピーダンス合成機能,挿入損失補正機能,平衡
機能を順に設置する事により、インピーダンス合成機能
及び挿入損失補正機能を実現する伝達関数の極と全く等
しくして共通回路で構成する事が可能となりチップ面積
を小さくできる効果がある。As described above, the present invention, when viewed from a two-wire line,
By installing the terminating impedance synthesis function, insertion loss correction function, and balance function in this order, it is possible to configure a common circuit with the poles of the transfer function that realizes the impedance synthesis function and insertion loss correction function exactly equal to each other. Has the effect of reducing
第1図,第2図は本発明による各実施例を示すブロック
図、第3図は従来例のブロック図である。 vS……源信号、HZ……終端インピーダンス合成機能、HO
……挿入損失補正機能、HB……平衡機能、vR……4線式
線路供給信号、vX……4線式線路送信信号、ZL……2線
式線路の公称インピーダンス。1 and 2 are block diagrams showing embodiments of the present invention, and FIG. 3 is a block diagram of a conventional example. v S …… Source signal, H Z …… Terminal impedance synthesis function, H O
...... insertion loss compensation function, H B ...... Equilibrium, v R ...... 4-wire line feed signal, v X ...... 4-wire line transmission signal, the nominal impedance of Z L ...... 2-wire line.
Claims (1)
し、4線式線路からの信号を2線式線路に供給する2線
4線変換回路において、2線式線路からの信号の入力時
に反射する信号を打ち消す終端インピーダンス合成回路
と、4線式線路からの2線式線路に変換することにより
生ずる挿入損失を少なくする挿入損失補正回路と、4線
式線路からの信号の出力時に2線式線路で反射し4線式
線路にまわり込む信号を打ち消す平衡回路とを有し、2
線式線路から見て前記終端インピーダンス合成回路、前
記挿入損失補正回路、前記平衡回路の順に配置し、更に
前記終端インピーダンス合成回路と前記挿入損失補正回
路との伝達関数の極を等しくし、前記終端インピーダン
ス合成回路と前記挿入損失補正回路とが共通回路で構成
されることを特徴とする2線4線変換回路。1. A two-wire to four-wire conversion circuit for transmitting a signal from a two-wire line to a four-wire line and supplying a signal from the four-wire line to the two-wire line. A termination impedance combining circuit for canceling a signal reflected when a signal is input, an insertion loss correction circuit for reducing insertion loss caused by converting from a four-wire line to a two-wire line, and a signal A balance circuit for canceling a signal reflected by the two-wire line at the time of output and going around the four-wire line.
The terminating impedance combining circuit, the insertion loss compensating circuit, and the balancing circuit are arranged in this order as viewed from the line, and the poles of the transfer functions of the terminating impedance combining circuit and the insertion loss compensating circuit are made equal to each other. A two-wire / four-wire conversion circuit, wherein the impedance synthesis circuit and the insertion loss correction circuit are configured by a common circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29666388A JP2867396B2 (en) | 1988-11-22 | 1988-11-22 | 2-wire 4-wire conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29666388A JP2867396B2 (en) | 1988-11-22 | 1988-11-22 | 2-wire 4-wire conversion circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02142227A JPH02142227A (en) | 1990-05-31 |
| JP2867396B2 true JP2867396B2 (en) | 1999-03-08 |
Family
ID=17836466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29666388A Expired - Lifetime JP2867396B2 (en) | 1988-11-22 | 1988-11-22 | 2-wire 4-wire conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2867396B2 (en) |
-
1988
- 1988-11-22 JP JP29666388A patent/JP2867396B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02142227A (en) | 1990-05-31 |
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