JP2868545B2 - Solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device including a CMD (Charge Modulation Device) light-receiving element and a CMOSFET constituting a peripheral circuit.

[Conventional technology]

Conventionally, various types of solid-state imaging devices including a light receiving element having a MIS type light receiving / accumulating unit are known.
There is a solid-state imaging device using a light receiving element having an MIS type light receiving / accumulating unit and having an internal amplification function. As an example, there is a solid-state imaging device using a CMD light receiving element proposed by the present inventor, which is disclosed in JP-A-61-84059, and
“A NEW MOS IMAGE SENSOR OPERATI” on pages 353 to 356 of the proceedings of the nternational Electron Device Meeting (IEDM)
NG IN A NON-DESTRUCTIVE READOUT MODE ", the contents of which are disclosed.

FIG. 3 is a diagram showing a schematic cross-sectional structure of a unit pixel in a solid-state imaging device using such a CMD light receiving element. In the figure, 101 is a p ^- substrate, 102 is an n ^- channel layer, 103 is an n ⁺ source diffusion layer, 104 is an n ⁺ drain diffusion layer, 105 is a gate insulating film, 106 is a gate polysilicon electrode, 107 is a source electrode,
108 is a drain electrode.

Next, the light receiving operation of the CMD light receiving element having such a configuration will be described. First, when light 109 enters from above the gate electrode 106, the incident light 109 enters the gate electrode 106 and the gate insulating film 105.
Through the n ^- channel layer 102 where a hole-electron pair is generated. Of these, the photogenerated holes are accumulated at the interface between the gate insulating film 105-n ^{and the} channel layer 102 of the gate electrode 106 to which a reverse bias is applied, and as a result, the surface potential increases. As a result, the electron barrier for electrons existing between the source diffusion layer 103 and the drain diffusion layer 104 decreases, and n ⁻
An electron current flows through the channel layer 102. By reading this current, an amplified optical signal can be obtained.

[Problems to be solved by the invention]

By the way, in a conventional solid-state imaging device using a CMD light receiving element, the back gate electrode of the CMD light receiving element uses a p ^- type substrate having an impurity concentration of 1E13 to 1E16 cm ^-3 as it is,
The impurity concentration is 1E13-1E14cm ^-3 and the thickness is 3-10μ
An n ^- epitaxial layer of m is formed. That is, the fourth
As shown in FIGS. 9A and 9B, the uniform substrate concentration C _sub
On the mold substrate, a high resistance the n ^- -type epitaxial layer to a thickness x _1.

Made using such a substrate and epitaxial layer
Disadvantages of the solid-state imaging device using the CMD light-receiving element are that it takes a long time of two to three months to obtain a wafer with a desired substrate concentration, interstitial oxygen concentration, carbon concentration, which are important for gettering, and The point that it is difficult to set all the boron concentration to the desired value, and the impurity concentration unevenness due to the growth stripes when pulling up the substrate causes non-uniform output in the image sensor using the CMD light receiving element, and the fixed pattern noise (FPN) ), And changes in the substrate impurity concentration due to the generation of thermal donors caused by oxygen, which cause the FPN to be restricted and limit the thermal process.

The present invention has been made in order to solve the above-described problems in a solid-state imaging device using a conventional CMD light receiving element,
An object of the present invention is to provide a solid-state imaging device in which an n ^- epitaxial layer can be formed on a diffusion layer having a desired impurity concentration, which has a small FPN and an improved yield.

[Means and Actions for Solving the Problems]

In order to solve the above problems, a solid-state imaging device according to the present invention has a source region and a drain region formed on a surface of a semiconductor substrate portion, and a gate electrode is disposed between the source region and the drain region via an insulating film. And the source / drain current flows in parallel with the surface of the substrate.
A solid-state imaging device including a CMD light receiving element and a CMOSFET, wherein the semiconductor substrate unit includes a semiconductor substrate of a first conductivity type;
A first conductive type first epitaxial layer formed on the surface of the substrate; and a second conductive type two epitaxial layer formed on the surface of the first epitaxial layer. And

By configuring the semiconductor substrate portion in this way, the impurity concentration of the substrate portion below the second type semiconductor layer which becomes the channel region can be easily adjusted to an optimum value by the first type semiconductor layer or the semiconductor diffusion layer. It becomes possible. In addition, since the first-type substrate concentration may be an arbitrary impurity concentration in principle, it is extremely easy to adjust the concentrations such as the oxygen concentration and the carbon concentration, which are important in the gettering step.

In addition, since the substrate impurity concentration is controlled by an ion implantation method, an epitaxial method, or the like in which the impurity concentration can be controlled with high accuracy, it is possible to effectively prevent an increase in FPN and a decrease in yield due to uneven impurity concentration.

〔Example〕

Hereinafter, embodiments of a solid-state imaging device according to the present invention will be described with reference to the drawings. In the description, the semiconductor regions, electrodes, and the like on the second type epitaxial layer provided on the first type substrate are the same as those of the above-described conventional CMD, and thus description thereof is omitted.

FIGS. 1A and 1B are views showing a semiconductor substrate portion and an impurity concentration distribution according to a first embodiment of the present invention.

1A and 1B, the concentration of the semiconductor substrate is shown.
Before using the P-type semiconductor substrate 11 having C _sub 'and laminating the n ⁻ -type epitaxial layer 13, the P-type substrate surface has a concentration substantially equal to the concentration C _sub of the conventional semiconductor substrate, for example, 1E13E.
The thickness of the P-type epitaxial layer 12 to be 1E16 cm ^-3 (x ₂ −
x ₁ ). An n ⁻ -type epitaxial layer 13 having a thickness of x ₁ is formed on the surface of the P-type epitaxial layer 12 in the same manner as the conventional _one.
To form a semiconductor substrate portion. In addition,
Although not shown, an n ^- type buried layer is formed under a P-well diffusion layer forming an N-MOSFET after forming a P-type epitaxial layer 12 by using an ion implantation method or the like. Further, in this embodiment, the concentration C _sub 'of the P-type semiconductor substrate 11 may be an arbitrary concentration in principle.

According to this embodiment, the speed distribution variation in the semiconductor chip is about 1% or less. Since the effective substrate concentration is determined by the epitaxial method, the fixed pattern noise caused by the substrate concentration variation can be significantly reduced as compared with the conventional example.

Next, a second embodiment of the present invention will be described. Second
FIGS. 7A and 7B are diagrams showing a semiconductor substrate portion and an impurity concentration distribution. 2 (A) and 2 (B), a P-type substrate 11 having an arbitrary concentration and a conventional semiconductor substrate having a concentration C
P-type epitaxial layer 12 having a low concentration C _sub 'from _sub
Is formed with a thickness of (x ₂ −x ₁ ) = about 10 to 20 μm. And
P-type diffusion layer having a peak concentration of approximately C _{sub on the} surface of P-type epitaxial layer 12 before stacking n ^- type epitaxial layer 13
Form 14. Then, an n ⁻ -type epitaxial layer 13 is formed on the surface of the P-type diffusion layer 14 with a thickness of x1, similarly to the conventional _one , to form a semiconductor substrate portion.

In this embodiment, it is desirable that C _sub 'be as low as possible in the range where the P-type conductivity is maintained.

Further, the P-type diffusion layer 14 is formed by using an ion implantation method or the like. Further, the P-type diffusion layer 14 is achieved by a method of forming the entire surface of the wafer or a portion other than the P-type well by using a photolithography method.

According to this embodiment, since the effective substrate concentration is determined by the ion implantation method in which the concentration distribution variation in the semiconductor chip is 1% or less, the fixed pattern noise caused by the substrate concentration variation is significantly reduced as compared with the conventional example. In addition, the first
Since the effective substrate concentration is determined by the ion implantation method as compared with the embodiment, the value of the substrate concentration can be easily controlled.

In each of the embodiments described above, an n-channel CMD is used. However, it is needless to say that an n-channel CMD can be used by changing an impurity type.

〔The invention's effect〕

As described above with reference to the embodiments, according to the present invention, the P-type impurity concentration under the n ⁻ semiconductor layer serving as the channel region is adjusted by adjusting the dose amount of the ion implantation method or the n-type impurity gas flow rate of the epitaxial method. By doing so, the value can be easily optimized for the device operation, and the development / prototype period can be significantly reduced. In addition, since the substrate concentration can be any impurity concentration in principle as long as it is a P-type, it is easy to adjust the concentrations such as oxygen and carbon concentrations which are important in the gettering step. Further, as shown in the above embodiment, effects such as a decrease in yield due to an increase in FPN due to uneven impurity concentration of the substrate can be obtained.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams for explaining the basic structure and impurity concentration distribution of a substrate portion of a first embodiment of a solid-state imaging device according to the present invention, and FIGS. 2A and 2B. ) Is the second of the device
FIG. 3 is a view for explaining a basic configuration and an impurity concentration distribution of a substrate portion of the embodiment, FIG. 3 is a cross-sectional view showing an example of a solid-state imaging device using a conventional CMD light receiving element, and FIGS. B)
FIG. 2 is a diagram showing a configuration of a substrate portion and an impurity concentration distribution of a conventional CMD light receiving element. In the figure, 11 indicates a P-type substrate, 12 indicates a P-type epitaxial layer, 13 indicates an n ⁻ -type epitaxial layer, and 14 indicates a P-type diffusion layer.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 27/14-27/148 H04N 5/335

Claims (2)

(57) [Claims] A source region and a drain region are formed on a surface of the semiconductor substrate portion, and a gate electrode is disposed between the source region and the drain region via an insulating film; A solid-state imaging device including a CMD light receiving element and a CMOSFET configured to allow a drain current to flow, wherein the semiconductor substrate portion includes a semiconductor substrate of a first conductivity type and a first conductivity type formed on a surface of the substrate. A solid-state imaging device, comprising: a first epitaxial layer of (i), and two epitaxial layers of the second conductivity type formed on the surface of the first epitaxial layer. 2. The solid-state imaging device according to claim 1, wherein a first conductive type first semiconductor diffusion layer is formed on at least a part of said first epitaxial layer.