JP2874196B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for forming a silicon epitaxial layer in a semiconductor device manufacturing process.

[Summary of the Invention]

The present invention particularly relates to a method for manufacturing a semiconductor device in which an epitaxial layer free from problems of autodoping and pattern shift is formed when performing vapor phase epitaxial growth of silicon on a semiconductor substrate having a buried pattern.

[Conventional technology]

2. Description of the Related Art Conventionally, in a manufacturing process of a semiconductor device such as an LSI using a bipolar transistor, for example, a process of epitaxially growing Si on a semiconductor substrate such as silicon (Si) having a buried pattern in which an impurity element such as arsenic (As) is implanted. Is performed. As a method of epitaxial growth, a vapor phase epitaxy in which a source gas containing Si as a constituent element and hydrogen (H ₂ ) as a carrier gas are flowed on a substrate heated to a desired temperature of, for example, 900 ° C. to 1200 ° C. is used. Have been. As in the buried pattern is an impurity having a high concentration and a relatively high vapor pressure. Therefore, impurities that evaporate from the buried pattern during epitaxy
The phenomenon of auto doping re-mixed into the epitaxial layer occurs, and there are problems such as a decrease in withstand voltage of the semiconductor device, an increase in leak current, and a decrease in operation speed.

When As is an impurity, it is generally known that the amount of auto-doping is smaller when epitaxy is performed at a high temperature of, for example, 1,000 degrees or more.

However, when silane (SiH ₄ ) is used as a source gas, SiH ₄ easily reacts in the gas phase at a high temperature of 1060 ° C. or higher,
There is a disadvantage that the surface of the epitaxial layer is roughened because it is deposited as particles on the substrate. Therefore, high-temperature epitaxy cannot be performed, and the effect of reducing auto-doping is weak.

On the other hand, chloride silane gas _{(SiH 4-x Cl x,} x is an integer from 1 to 4) can be high temperature epitaxy be used as a source gas, the effect of the auto-doping reduction of As. However, since chlorine (Cl) is contained as a constituent element, a phenomenon of a pattern shift in which the embedded pattern moves in the horizontal direction is likely to occur. For this reason, in some cases, it is impossible to match the pattern further formed on the epitaxial layer with the buried pattern.

These auto-doping and pattern shift phenomena have led to the demand for higher integration and higher speed of semiconductor devices.
When the buried pattern is miniaturized and the thickness of the epitaxial layer is reduced to, for example, about 1 μm, the effect is great, and drastic measures have been required.

To reduce autodoping, a method is known in which disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) is used as a source gas and reduced pressure epitaxy is performed at a low temperature of 900 ° C. or less and a reduced pressure of 60 Torr or less. (See JP-A-62-293611). As a countermeasure against the pattern shift, there is known a two-stage epitaxy method in which a half of the desired thickness is epitaxially formed by using SiH ₄ and then the other half is performed by using tetrachlorosilane (SiCl ₄ ). (See JP-A-62-177915).

[Problems to be solved by the invention]

Among the above-mentioned conventional techniques, those based on reduced pressure epitaxy have a low growth rate, and are not always practical from an industrial point of view. On the other hand, the method based on the two-stage epitaxy has a pattern shift still about half that of the epitaxial growth layer, and cannot be said to be a sufficient value. In addition, none of the methods can solve both the problems of the auto doping and the pattern shift at the same time.

[Means for solving the problem]

In order to solve the above-mentioned problems, in the present invention, first, silane chloride is used as a source gas on a semiconductor substrate having a buried pattern, and a first temperature is set in a temperature range of 1090 ° C. to 1200 ° C.
Is formed. The term SiH _4-x Cl _x is chloride silane gas _(x is an integer from 1 to 4) represented by the molecular formula or monochlorobenzene silane (SiH ₃ Cl), dichlorosilane (SiH ₂ Cl _2), trichlorosilane (SiHCl ₃₎ And SiC
l Refers to each gas of ₄ . Although the thickness of the first epitaxial layer is not particularly limited, it is 0.1 μm or more and 0.2 μm or more.
A degree is desirable.

Next, a second epitaxial layer is formed on the first epitaxial layer to an arbitrary thickness in a temperature range of 900 ° C. or more and 1060 ° C. or less using SiH ₄ source gas. In any of the first and second epitaxial layers, the furnace pressure during growth may be normal pressure or a reduced pressure atmosphere.

The object of the present invention can be solved by sequentially forming the first epitaxial layer and the second epitaxial layer.

[Action]

Since the first epitaxial layer is formed at a high temperature of 1090 ° C. or more, the amount of autodoping of As is small. This is considered to be one of the reasons that As evaporated from the buried pattern is less likely to be adsorbed on the surface of the growing epitaxial layer. The growth temperature of the first epitaxial layer is 1200
When the temperature exceeds ℃, the vapor phase reaction of the source gas increases, so that the growth surface becomes rough, and the thermal deformation of the substrate itself cannot be ignored. If the thickness of the first epitaxial layer is less than 0.1 μm, the cap effect of As in the buried pattern is small,
If it exceeds 0.2 μm, the amount of pattern shift becomes a problem.

Next, As in the buried pattern is capped by the underlying first epitaxial layer in the second epitaxial layer, so that the second epitaxial layer can be grown to a desired thickness without concern about autodoping.

Since SiH ₄ is used as a source gas, there is no problem of pattern shift. The growth temperature of the second epitaxial layer is
If the temperature is lower than 900 ° C., the crystallinity is insufficient and the growth rate is low. On the other hand, when the temperature exceeds 1060 ° C., SiH ₄ undergoes a gas phase reaction, and the surface of the growth layer becomes rough, which causes a decrease in yield.

By the above operation, it becomes possible to form an epitaxially grown silicon layer without problems of autodoping and pattern shift from the buried pattern.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

1 (a) to 1 (c) are process diagrams showing a method for forming an epitaxial layer according to an embodiment of the present invention. FIG.
In the substrate 4, a buried pattern 3 doped with, for example, 4.5 × 10 ¹⁹ cm ⁻³ As as an impurity is formed in a substrate 4 made of a Si semiconductor. The substrate 4 was heated to 1100 ° C., and 200 sccm of SiH ₂ Cl ₂ was used as a source gas, and H ₂ was used as a carrier gas.
While flowing at 100 / min, the vapor phase epitaxy of Si
The first epitaxial layer 1 is formed as shown in FIG. 1 (b).

Next, the heating temperature of the substrate 4 was lowered to 1050 ° C., only the source gas was switched to SiH _{4 at} 300 sccm, the vapor phase epitaxy of Si was continued with the carrier gas kept as it was, and the second epitaxial layer 2 was replaced with the one shown in FIG. It is formed as follows. The total thickness of the first epitaxial layer 1 and the second epitaxial layer 2 is, for example, 1.2 μm.

Through the steps described above, an epitaxial layer of silicon having no problem of autodoping of impurities from the buried pattern 3 and pattern shift was formed.

The semiconductor device manufactured according to the present example had good withstand voltage characteristics, low leakage current, and excellent reliability.

[Effects of the Invention] As described in detail above, according to the present invention, it has become possible to form an epitaxial layer that simultaneously solves the problems of auto-doping of impurities from a buried pattern and pattern shift.

The epitaxial layer according to the present invention has excellent crystallinity of silicon, does not have a problem of a decrease in the growth rate, can use a normal epitaxial device as it is, and does not use any special material for the source gas. The present invention can be applied to the current production process as it is, and greatly contributes to semiconductor device production.

[Brief description of the drawings]

FIG. 1 is a process chart showing a method for forming an epitaxial layer according to an embodiment of the present invention. 1 first epitaxial layer 2 second epitaxial layer 3 embedded pattern

Claims (2)

(57) [Claims] (1) a. Forming a first epitaxial layer on a semiconductor substrate having a buried pattern in a temperature range from 1090 ° C. to 1200 ° C. using silane chloride as a source gas; b. Forming a second epitaxial layer on the first epitaxial layer in a temperature range of 900 ° C. or more and 1060 ° C. or less using silane as a source gas; and forming an epitaxial layer comprising the above two steps. Device manufacturing method. 2. The method according to claim 1, wherein said first epitaxial layer is formed to a thickness of 0.1 μm or more and 0.2 μm or less.