JP2876606B2 - Information processing device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus, and more particularly, to a diagnosis method of a data collation processing apparatus that performs normal collation and diagnostic collation for examining whether a collation circuit has a failure.

2. Description of the Related Art As a conventional method of diagnosing a matching circuit in such a matching processing device, there is the following method. There are a method of providing a hardware check circuit in the verification circuit, a method of duplicating the verification circuit, and a so-called patrol method in which a diagnosis routine is periodically executed by software.

The method of providing a hardware check circuit and the method of duplicating the matching circuit increase the amount of hardware, and the latter method has a drawback that it is particularly unsuitable for an array structure having a plurality of matching circuits. is there. The patrol method does not increase the hardware, but has a disadvantage that it is difficult to find an intermittent failure in which the verification circuit sometimes fails and recovers.

SUMMARY OF THE INVENTION Therefore, the present invention has been made to solve such disadvantages of the related art, and the purpose thereof is to
It is an object of the present invention to provide an information processing apparatus capable of suppressing an increase in the amount of hardware and detecting an intermittent failure earlier in diagnosing a matching circuit.

According to the invention, each has a first and a second input,
A plurality of matching circuits for checking whether or not data given to both inputs are equal;
Information using a data collation method in which common search data is given to the input of the search data, and a large number of collation data are sequentially given to the second input to search for collation data having a high degree of similarity with the search data. A processing device, wherein the second input of an empty matching circuit to which the matching data is not given among the matching circuits is provided with the matching data that has been last given to another matching circuit as diagnostic data. Information comprising: diagnostic data applying means; and diagnostic means for diagnosing the matching circuits according to the matching result of the matching circuits to which the diagnostic data has been applied by the diagnostic data applying means and which has been diagnosed. A processing device is obtained.

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram of one embodiment of the present invention. Memory 1
Stores search data and collation data. The read data 5 from the memory 1 is input to the common control unit 2. The common control unit 2 controls the collation circuit 3 in which n collation circuits 3a to 3n having the same function are arranged in an array, and controls the collation circuits 3a to 3n via a control signal line 8.
Flip-flop (FF) for instructing the matching circuit to
And a circulating register for instructing data transfer, a counter for indicating the number of remaining collation data, and a signal generating circuit for instructing all empty collation circuits to perform diagnostic collation. Each of the matching circuits 3a to 3n and the common control unit 2 are connected by a common bus 7.

On the other hand, each of the matching circuits 3a to 3n includes a register for storing search data, a register for storing matching data, and blocks 3a1 to 3n1 each including FF indicating that the contents of these registers are valid and a matching operation is possible. Alternatively, it is composed of blocks 3a2 to 3n2 composed of FFs for instructing diagnostic collation, and blocks 3a3 to 3n3 for processing collation units and collation results.

Further, the collation results of the collation circuits 3a to 3n are connected via a signal line 10 to a discrimination circuit 4 for discriminating the diagnosis collation result, and the discrimination circuit 4 outputs a discrimination signal 11.

In such a configuration, common search data (hereinafter, referred to as “S data”) is given to each of the matching circuits 3a to 3n via the common bus 7 in advance. Next, the collation data (hereinafter, referred to as F data) for each block in the memory 1 is sequentially transferred to each of the collation circuits 3a to 3n, and all of the collation circuits 3a to 3n perform F
When data is transferred, a normal match is performed.

At the time of this F data transfer, if the number of F data becomes zero and any of the matching circuits 3a to 3n becomes empty, the transferred F data in the memory 1 is transferred to the empty matching circuit.
The normal matching operation is also performed in the matching circuit to which the F data has been transferred. This operation is defined as diagnostic collation. Information indicating whether normal collation or diagnostic collation is performed in each of the collation circuits 3a to 3n and information of the collation result are signal lines.
It is output to the discrimination circuit 4 by 10. The discrimination circuit 4 discriminates whether two or more diagnostic collation results are the same, and outputs a discrimination signal 11. The result of the collation is used by the subsequent device via the bus 9.

This will be described in more detail. In order to facilitate the description, a case where the number of matching circuits arranged in an array is four will be described as an example. FIG. 2 shows the common control unit 2 shown in FIG.
FIG. 3 is a diagram illustrating a configuration example of a transfer instruction unit of FIG. Counter 18 is 1
Is a counter which is initially set to the total number of F data to be collated with the S data and is decremented by one each time one F data is transferred to each of the collating circuits 3a to 3d. Is displayed. The content 19 of this counter 18 is a signal line 20
Is connected to the comparison circuit 21 and is compared with the logic "1".
The comparison circuit 21 compares the data with “1”, and when the remaining number of F data becomes “1”, the signal line 22 outputs logic “1”.

25 is a register, 4 equal to the number of matching circuits 3a to 3d.
FFs 26 to 29, and the contents thereof are configured to circulate through the FFs 26, 27, 28, and 29. This register 25 is a register for instructing data transfer to each of the matching circuits 3a to 3d,
At the time of the first F data transfer, "1" is set to FF26 to instruct F data transfer to the matching circuit 3a. Thereafter, "1" circulates through the FF every F data transfer, and the signal lines 30, 31, 32 , 33 to indicate the transfer destination.

When the data is received by the corresponding matching circuit, the busy signals 35, 36, 37 and 38 each become "1". All the matching circuits 3a to 3d are in the busy state, and the busy signals 35, 36, 37, 3
When all 8 become "1", the signal line 41 becomes "1" and the signal line 42 becomes "0" by the gate 40, "1" is set in the FF 43, the collation start signal line 44 becomes "1", and the collation starts. Operation starts. This collation result is output to the bus 9.

This operation is repeated, and the remaining number of F data becomes "1". When "1" is output to the signal line 22, if at least one of the matching circuits becomes empty, the signal line 42 is turned off. "1", the signal line 46 output from the gate 45
Becomes “1”. This signal line 46 instructs the transfer of diagnostic data to each of the matching circuits 3a to 3d, and this signal causes the last F data to be commonly transferred to an empty matching circuit.

Here, when the number of F data becomes "0" and the signal line 24 from the comparison circuit 23 becomes "1", the register 25 is held and the contents are held. As a result, when the F data transfer is restarted next time, the collation circuit that has performed the diagnostic collation is used, so that the reliability is improved and the diagnostic operation for each collation circuit is averaged.

FIG. 3 is a diagram showing a configuration example of an F data reading unit from the memory 1 shown in FIG. 1, a matching circuit, and a matching end recognition unit in the common control unit 2. When the signal line 46 is “0”, the contents of the memory 1 specified by the F data read address register 59 are transferred to the common control unit via the bus 5 and transferred to the matching circuit via the bus 7. When the signal line 46 is "1", the register 59 is held and the contents are held. The registers 65 and 66 are connected to the common bus 7 and store S data and F data. FF
67 is an FF for displaying a busy state, and FF68 is an FF for displaying a diagnostic state.

At the time of normal collation, the signal line 30 becomes “1” and the FF67
When it is "0", F data is set in the register 66 and FF67
Becomes "1", and the signal line 35 becomes "1".

As described above, when all the matching circuits 3a to 3d are in a busy state, the matching start signal line 44 becomes "1", and normal matching is performed. At the time of diagnosis collation, the signal line 46 becomes “1” and FF67
Is "0", the last F data is set in the register 66, and the FFs 67 and 68 become "1", indicating that the collation of the collation circuit is diagnostic collation. When the collation operation is completed, the collation end signal line 53 becomes "1", and when the collation operations of all the collation circuits are completed, the signal lines 54, 55 and 56 also become "1", and the signal line 73 becomes "1". Thereby, FF67 and
68 is reset to "0". The output signal Da of the FF68 and the output signal Ca of the matching unit 3a3 are sent to the discrimination circuit 4.

FIG. 4 is a diagram showing a configuration example of the discrimination circuit 4 shown in FIG. In the drawing, reference numerals 74a to 74d denote the same diagnostic collation results Cn performed by the empty collation circuit and the collation circuit that received the last F data transfer instruction when one empty collation circuit is provided. It is a discrimination circuit for discriminating whether or not this is the case.

75a to 75d indicate whether each diagnosis result Cn performed by the empty matching circuit and the matching circuit which has received the last F data transfer instruction is the same when there are two empty matching circuits. This is a determination circuit for determining. These discriminating circuits 74a to 74d
And the output signals Tn of 75a to 75d are "1" if they are the same result, and "0" if they are not the same.

The output signal Tn from each discriminating circuit is
The calculation is performed based on the values of a, Db, Dc, and Dd, and a determination signal 11 is output.
Here, Da, Db, Dc, and Dd are output signals of the FF68 to which “1” is output when the diagnostic matching is performed in each of the matching circuits 3a to 3d.

The operation of the selection circuit 76 will be described with reference to the truth table shown in FIG. In the table, when Da, Db, Dc, Dd = 0000 Da, Db, Dc, Dd = 0001 Da, Db, Dc, Dd = 0010 Da, Db, Dc, Dd = 0100 Da, Db, Dc, Dd = 1000 Is a case in which the diagnosis collation is performed by only one collation circuit, so that the discrimination signal is always set to "1".

When Da, Db, Dc, Dd = 0101 Da, Db, Dc, Dd = 1010, it indicates that the verification circuit has performed the diagnostic verification every other unit. 0 ".

If the discrimination signal 11 is "1", it is checked that it is normal, and if it is "0", it is checked that it is improper.

When Da, Db, Dc, Dd = 1111, diagnostic collation is performed by all the collation circuits, and the collation results must also match at this time.

Effect of the Invention According to the present invention, since the diagnosis is performed when the matching circuit is empty, it is not necessary to add a check circuit for diagnosis in each matching circuit, and it is not necessary to duplicate the matching circuit.
There is an effect that there is no need to prepare a memory for storing diagnostic data. In addition, the last collation data already given to the other collation circuits is simultaneously given as diagnostic data to a plurality of collation circuits which are idle during the collation operation due to the relationship between the variable amount of collation data and the number of invariant collation circuits. The diagnostic collation is performed simultaneously with the normal collation, and it is determined whether or not the collation result is the same in all the collation circuits that have performed the diagnostic collation. Therefore, the normal collation operation and the diagnostic operation can be performed simultaneously. This has the effect.

Furthermore, particularly, the diagnostic collation can be performed even when there is one collation circuit that is in an empty state, and the transfer of collation data to the collation circuit is continuously circulated. It has the effect that the conversion can be measured.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a common control unit, and FIG. 3 is an example of a memory readout circuit, a verification circuit and a part of a common control unit. FIG. 4 is a diagram showing an example of a discriminating circuit, and FIG. 5 is a truth table showing the operation of the selecting circuit 76 in the discriminating circuit. Description of Signs of Main Parts 1... Memory 2... Common Control Unit 3... Matching Circuit 4.

Claims (1)

(57) [Claims] 1. Each of the first and second inputs includes a plurality of matching circuits for checking whether data supplied to the two inputs are equal or not, wherein each of the first and second inputs includes a first input and a second input. Information using a data collation method in which common search data is given to the input of the search data, and a large number of collation data are sequentially given to the second input to search for collation data having a high degree of similarity with the search data. A processing device, wherein the second input of an empty matching circuit to which the matching data is not given among the matching circuits is provided with the matching data that has been last given to another matching circuit as diagnostic data. Diagnostic data applying means, and diagnosing means for diagnosing the matching circuits in accordance with the result of the matching of the matching circuits to which the diagnostic data is applied by the diagnostic data applying means. That the information processing apparatus.