JP2877019B2 - Mold structure of printed wiring board - Google Patents
Mold structure of printed wiring boardInfo
- Publication number
- JP2877019B2 JP2877019B2 JP7269595A JP7269595A JP2877019B2 JP 2877019 B2 JP2877019 B2 JP 2877019B2 JP 7269595 A JP7269595 A JP 7269595A JP 7269595 A JP7269595 A JP 7269595A JP 2877019 B2 JP2877019 B2 JP 2877019B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- solder resist
- edge
- shetter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910000679 solder Inorganic materials 0.000 claims description 33
- 239000004020 conductor Substances 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 9
- 238000004080 punching Methods 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 description 17
- 238000007639 printing Methods 0.000 description 4
- 238000010008 shearing Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 2
- 238000003672 processing method Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Punching Or Piercing (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、両面または多層プリン
ト板の打ち抜き加工等を行なう際、ソルダレジストにク
ラックが発生しないプリント配線板の金型構造に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a die structure for a printed wiring board in which no crack occurs in a solder resist when a double-sided or multilayer printed board is punched.
【0002】[0002]
【従来の技術】図3は従来のプリント配線板の金型構造
のプレス打ち抜き状態を示す要部断面図である。プリン
ト配線板100は、その両面に導体101…をソルダレ
ジスト102でマスキングした基材103からなり、こ
の基材103はシェッター104と雄型105によりホ
ールドされ、雌型(刃物)106を用いて剪断部107
に沿って打ち抜かれる。2. Description of the Related Art FIG. 3 is a cross-sectional view of a main portion of a conventional printed wiring board mold structure in a press-punched state. The printed wiring board 100 is composed of a base material 103 on both sides of which a conductor 101 is masked with a solder resist 102. The base material 103 is held by a shetter 104 and a male mold 105, and is sheared using a female mold (blade) 106. Part 107
Is punched along.
【0003】なお、図において108は、基材103の
打ち抜き時、雌型106に食い付いている基材103を
ハネ出すためのストリッパ、109はソルダレジスト1
02上に設けた部品名や位置を示す印刷部である。[0003] In the drawing, reference numeral 108 denotes a stripper for removing the base 103 biting the female mold 106 when the base 103 is punched, and 109 denotes a solder resist 1.
This is a printing unit that indicates a component name and a position provided on the device 02.
【0004】[0004]
【発明が解決しようとする課題】ところで、この従来の
基材打ち抜き時においては、基材端部(剪断部108)
と導体101との間隔が狭い程、またプリント配線板1
00の厚みが厚い程クラックが多発していた。By the way, at the time of this conventional punching of a base material, the base material end (shear portion 108)
The smaller the distance between the conductor and the conductor 101, the more the printed wiring board 1
The larger the thickness of 00 was, the more cracks occurred.
【0005】[0005]
【課題を解決するための手段】そこで本発明者等はこの
現象を詳細に調べたところ、基材103の剪断部107
近傍においてシェッター104とソルダレジスト102
間および雄型105とソルダレジスト102間に隙間s
1,s2ができるため、打ち抜き(剪断)時に基材10
3が、これら隙間s1,s2の間で撓み基材103を完
全にホールドすることができず、図に示す位置にソルダ
レジストクラック110,111が発生してしまい、例
えば剪断部107近傍ではソルダレジスト102が矢印
a方向へ引張られることから特に顕著となることを見出
し、シェッター104と雄型105の端部でプリント配
線板100の剪断部107近傍をホールドすることを試
み、上記課題を解決するに至った。The inventors of the present invention examined this phenomenon in detail, and found that
Near the shetter 104 and solder resist 102
Between the male mold 105 and the solder resist 102
1 and s2, the base material 10 is punched (sheared).
3 cannot completely hold the flexible base material 103 between the gaps s1 and s2, and solder resist cracks 110 and 111 are generated at the positions shown in the drawing. In order to solve the above-described problem, it was found that the above-mentioned problem was particularly remarkable because the wire 102 was pulled in the direction of the arrow a. Reached.
【0006】具体的には、シェッターと雄型は、打ち抜
き時、プリント配線板の外形及びスリットの剪断部に沿
った0.3〜0.6mm幅の部分と対向する部分をエッ
ジ部とし、このエッジ部以外の部分は、前記プリント配
線板を構成する導体、この導体上のソルダレジストおよ
び部品名称や位置を示す印刷部によって生じる厚さから
エッジ部と対向するソルダレジストの厚さを差し引いた
深さで均一な彫り込み加工が行なわれる。この彫り込み
加工は、金属エッチング方法により行なわれるのが好ま
しい。[0006] Specifically, when punching, the shetter and the male mold have, at the time of punching, a portion opposed to a portion having a width of 0.3 to 0.6 mm along the outer shape of the printed wiring board and the shear portion of the slit. The portion other than the edge portion is a depth obtained by subtracting the thickness of the solder resist facing the edge portion from the thickness of the conductor constituting the printed wiring board, the solder resist on the conductor, and the printed portion indicating the component name and position. Thus, uniform engraving is performed. This engraving is preferably performed by a metal etching method.
【0007】[0007]
【作用】この発明に係るプリント配線板の金型構造によ
れば、プリント配線板は、打ち抜き時、ソルダレジスト
に、雄型とシェッターの彫り込まれない0.3〜0.6
mm幅のエッジ部が当接し、このエッジ部でもってしっ
かりホールドされる。また、雄型とシェッターの彫り込
みは、金属エッチングによって高い精度で均一に加工さ
れる。According to the die structure of the printed wiring board according to the present invention, when the printed wiring board is punched, the male mold and the shetter are not engraved in the solder resist by 0.3 to 0.6.
The edge part having a width of mm is abutted and held firmly by this edge part. In addition, the engraving of the male mold and the shetter is uniformly processed with high precision by metal etching.
【0008】[0008]
【実施例】以下この発明の実施例を添付図面に基いて説
明する。図1は本発明に係るプリント配線板の金型構造
のプレス打ち抜き状態を示す要部断面図、図2は図1の
A−A矢視方向から見たシェッターの端面図である。Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a cross-sectional view of a main part showing a press-punched state of a mold structure of a printed wiring board according to the present invention, and FIG. 2 is an end view of the shetter seen from the direction of arrows AA in FIG.
【0009】金型1はシェッター2と、雄型3を備え、
これらシェッター2と雄型3とでもって、その両面に導
体4…をソルダレジスト5でマスキングした基材6から
なるプリント配線板をホールドしている。The mold 1 includes a shetter 2 and a male mold 3.
A printed wiring board made of a base material 6 having conductors 4... Masked with a solder resist 5 on both surfaces thereof is held by the shetter 2 and the male mold 3.
【0010】ホールド状態において、シェッター2およ
び雄型3のエッジ部8aおよびエッジ部9aは基材6の
剪断部7に沿った部分のソルダレジスト5と当接してお
り、これらエッジ部8aおよびエッジ部9aの幅w1
は、それぞれ外形が打ち抜かれる剪断部7から0.3m
m〜0.6mm程度となっている。In the hold state, the edge 8a and the edge 9a of the shetter 2 and the male mold 3 are in contact with the solder resist 5 at a portion along the shearing portion 7 of the base material 6, and the edge 8a and the edge 9a width w1
Is 0.3 m from the sheared part 7 from which the outer shape is punched
m is about 0.6 mm.
【0011】これらエッジ部8aおよびエッジ部9aの
幅は以下のように実験により決定された。最小ホールド
幅(エッジ部8aおよびエッジ部9aの幅)が0.3m
m未満のときには、当接する幅が狭すぎるため、ソルダ
レジスト5を十分にホールドできず、切断刃として作用
してしまい、2度切り状態となって基材6等の欠落不良
を発生させてしまう。この点に鑑み、エッジ部8aおよ
びエッジ部9aの最小幅を0.3mmとした。The widths of the edge portions 8a and 9a were determined by experiments as follows. The minimum hold width (the width of the edge portion 8a and the edge portion 9a) is 0.3 m
If it is less than m, the contact width is too narrow, so that the solder resist 5 cannot be held sufficiently and acts as a cutting blade. . In view of this point, the minimum width of the edge portions 8a and 9a is set to 0.3 mm.
【0012】最大ホールド幅(エッジ部8aおよびエッ
ジ部9aの幅)が広くなると、特に3.0mmを越える
とエッジ部8aおよびエッジ部9aのソルダレジスト5
に対するホールド力が弱まり、従来のようにソルダレジ
ストクラックが発生してしまう。そこで、現状の設計仕
様では大半の機種が配線の有効面積を確保するため、外
形端面から導体までの間隔を0.6mm程度で設計して
いることから、エッジ部8aおよびエッジ部9aの最大
幅を0.6mmとした。If the maximum hold width (the width of the edge portions 8a and 9a) is widened, especially if it exceeds 3.0 mm, the solder resist 5 of the edge portions 8a and 9a will be removed.
Is weakened, and solder resist cracks occur as in the prior art. Therefore, in the current design specifications, most models are designed with a distance from the outer end face to the conductor of about 0.6 mm in order to secure an effective wiring area. Therefore, the maximum width of the edge portions 8a and 9a is large. Was set to 0.6 mm.
【0013】なお、ソルダレジスト5と当接するエッジ
部8b,8cおよびエッジ部9b,9cの幅w2につい
ても、上記と同様にして、それぞれスリットが打ち抜か
れる剪断部7から0.35〜0.45mmに決定され
た。The widths w2 of the edge portions 8b and 8c and the edge portions 9b and 9c that are in contact with the solder resist 5 are also 0.35 to 0.45 mm from the sheared portions 7 where the slits are punched in the same manner as described above. It was decided.
【0014】上記エッジ部8a〜8cおよびエッジ部9
a〜9c以外の部分10はエッチングにより彫り込まれ
るが、この実施例においては、基材6上に配置した導体
4、この導体4上のソルダレジスト5および部品名称や
位置を示す印刷部(インクにより形成されている)11
によって生じる厚さt1からエッジ部8a〜8cおよび
エッジ部9a〜9cと対向する部分のソルダレジスト5
の厚さt2を差し引いた深さt1−t2が0.06〜
0.07mmであることから、彫り込み深さを0.06
〜0.07mmとしている。The edge portions 8a to 8c and the edge portion 9
The portions 10 other than a to 9c are engraved by etching. In this embodiment, the conductor 4 disposed on the base material 6, the solder resist 5 on the conductor 4, and a printing unit (ink) Formed) 11
From the thickness t1 generated by the solder resist 5 at the portions facing the edge portions 8a to 8c and the edge portions 9a to 9c.
Depth t1-t2 obtained by subtracting the thickness t2 is 0.06 to
Since it is 0.07 mm, the engraving depth is 0.06
〜0.07 mm.
【0015】なお、この彫り込み深さは、上記した導体
4、導体4上のソルダレジスト5、部品名称や位置を示
す印刷部9およびエッジ部8a〜8cおよびエッジ部9
a〜9cと対向する部分のソルダレジスト5の厚さ等の
変化によって増減するものであり、上記範囲の値に限る
ものでないことは勿論である。The engraved depth is determined by the conductor 4, the solder resist 5 on the conductor 4, the printed portion 9 indicating the part name and position, and the edge portions 8 a to 8 c and the edge portion 9.
It is increased or decreased by a change in the thickness or the like of the solder resist 5 at a portion opposed to a to 9c, and it is needless to say that the value is not limited to the above range.
【0016】そして、上記彫り込み深さが適切でないと
きには次のような問題が起きることからこの彫り込み深
さは打ち抜きの際非常に重要な要件となる。すなわち、
彫り込み深さが深すぎる場合は、シェッター2と雄型3
とでプリント配線板をホールドした時、シェッター2と
雄型3はエッジ部8a〜8cおよびエッジ部9a〜9c
のみが剪断部7近傍のソルダレジスト5部分と当接する
ため、大きなホールド力(50ton程度)が剪断部7
近傍のソルダレジスト5部分に集中し、これを配置した
基材6を破壊してしまい、さらにソルダレジスト5のシ
ェッター2への食い込みにより基材のハネ出しが不可能
になってしまう。If the engraving depth is not appropriate, the following problems occur, so that the engraving depth is a very important requirement when punching. That is,
If the engraving depth is too deep, shatter 2 and male 3
When the printed wiring board is held by the above, the shetters 2 and the male molds 3 have the edge portions 8a to 8c and the edge portions 9a to 9c.
Only the solder portion 5 contacts the solder resist 5 in the vicinity of the shear portion 7, so that a large holding force (about 50 tons) is applied to the shear portion 7.
It concentrates on the solder resist 5 in the vicinity and destroys the base material 6 on which the solder resist 5 is arranged, and further, the solder resist 5 bites into the shetter 2 so that the base material cannot be spattered.
【0017】また、彫り込み深さが浅い場合は、シェッ
ター2と雄型3とでプリント配線板をホールドした時、
エッジ部8a〜8cおよびエッジ部9a〜9cによるホ
ールド力が不足し、雌型(刃物)12を用いてプリント
配線板を打ち抜いたとき、従来と同様な理由でソルダー
レジスト5にクラックが発生し易くなってしまう。な
お、図2においては、基材6と対向するシェッター2を
図示したが、雄型3については、これと略々同様の構成
であるのでその図示を省略する。When the engraving depth is shallow, when the printed wiring board is held by the shetter 2 and the male mold 3,
When the holding force due to the edge portions 8a to 8c and the edge portions 9a to 9c is insufficient, when the printed wiring board is punched using the female die (blade) 12, cracks are easily generated in the solder resist 5 for the same reason as in the related art. turn into. In FIG. 2, the shetter 2 facing the base material 6 is illustrated, but the male mold 3 has substantially the same configuration as this and is not illustrated.
【0018】上記シェッター2と雄型3の彫り込み加工
としては、金型作製に使用されている放電加工により行
なうこともできるが、加工バラツキが大きく(彫り込み
深さ精度:±0.1mm以上、彫り込み位置精度:±
0.2mm)、また加工に要する費用もかなり掛かるた
め、この加工方法に代わる方法が望まれていた。この点
に鑑みて、本発明者等は下記のような利点を有する金属
エッチング(蝕化技術)を応用した加工方法を実施する
ようにした。The engraving of the above-mentioned shetter 2 and the male mold 3 can be carried out by the electric discharge machining used in the production of the mold, but there is a large variation in machining (engraving depth accuracy: ± 0.1 mm or more, engraving). Position accuracy: ±
0.2 mm), and the cost required for processing is considerably high. Therefore, an alternative to this processing method has been desired. In view of this point, the present inventors have implemented a processing method using metal etching (corrosion technology) having the following advantages.
【0019】すなわち、エッチング加工によれば、前記
彫り込み深さ精度は±0.01mm以下、彫り込み位置
精度は±0.1mmであり、費用はマスクを含め安価で
済む。That is, according to the etching process, the engraving depth accuracy is ± 0.01 mm or less, the engraving position accuracy is ± 0.1 mm, and the cost including the mask can be reduced.
【0020】なお、上記金属エッチング用のフィルムは
雄型用フィルムとして膜面下ネガ状フィルム、シェッタ
ー用フィルムとして膜面上ネガ状フィルムがそれぞれ用
いられ、レーザプロッタによって作製される。なお、エ
ッチング工程は従来既知のものであるので、その説明を
省略する。The film for metal etching is prepared by a laser plotter using a negative film below the film surface as a film for a male mold and a negative film above the film surface as a film for a shetter. Since the etching process is conventionally known, a description thereof will be omitted.
【0021】上記構成の金型1による打ち抜きは、次の
ように行なわれる。すなわち、基材6を、図1に示すよ
うに完全にシェッター2と雄型3でホールドした状態か
ら、雌型(刃物)12を下降させてプリント配線板(基
材6)を打ち抜く。なお、図1においては、スリットの
打ち抜きに用いる雌型(刃部)およびストリッパの図示
は省略されている。The punching by the mold 1 having the above configuration is performed as follows. That is, from the state where the base material 6 is completely held by the shetter 2 and the male mold 3 as shown in FIG. 1, the female mold (blade) 12 is lowered and the printed wiring board (base material 6) is punched. In FIG. 1, illustration of a female die (blade portion) and a stripper used for punching a slit is omitted.
【0022】雌型(刃物)12は、さらにバネ(図示せ
ず)によって上方へ付勢されているストリッパ13に衝
突してこれを押し下げ、停止後再び元の位置に復帰す
る。この際、雌型(刃物)12に食い付いた基材6はス
トリッパ13の弾発力によってハネ出される。このよう
にして打ち抜き加工された両面・多層プリント配線板
は、ソルダレジストにクラックの発生がなくなる。The female die (blade) 12 collides with the stripper 13 urged upward by a spring (not shown), pushes it down, and returns to the original position after stopping. At this time, the base material 6 biting the female mold (knife) 12 is spattered by the elastic force of the stripper 13. In the double-sided / multi-layer printed wiring board thus punched, no crack is generated in the solder resist.
【0023】[0023]
【発明の効果】以上説明したように本発明の請求項1に
係るプリント配線板の金型構造は、シェッターと雄型
は、打ち抜き時、プリント配線板の外形及びスリットの
剪断部に沿った0.3〜0.6mm幅の部分と対向する
部分をエッジ部とし、このエッジ部以外の部分は、前記
プリント配線板を構成する導体、この導体上のソルダレ
ジストおよび部品名称や位置を示す印刷部によって生じ
る厚さからエッジ部と対向するソルダレジストの厚さを
差し引いた深さで均一な彫り込み加工が行なわれるた
め、基材(プリント配線板)の剪断部近傍が彫り込まれ
ない0.3〜0.6mmのエッジ部でホールドされ、基
材は雄型とシェッターとでしっかりホールドされる。As described above, the die structure of the printed wiring board according to the first aspect of the present invention is such that the shatter and the male die are formed along the outer shape of the printed wiring board and the slit along the shear portion of the slit at the time of punching. A portion facing the portion having a width of 3 to 0.6 mm is defined as an edge portion, and a portion other than the edge portion is a conductor constituting the printed wiring board, a solder resist on the conductor, and a printing portion indicating a part name and position. Since the uniform engraving is performed at a depth obtained by subtracting the thickness of the solder resist facing the edge portion from the thickness generated by the edge portion, the vicinity of the sheared portion of the base material (printed wiring board) is not engraved. It is held at the edge of 0.6 mm, and the substrate is firmly held by the male mold and the shetter.
【0024】よって、プレス打ち抜き時、プリント配線
板の撓みが生じず、ソルダレジストが剪断部方向に引張
られることがないためクラックを生じることもない。さ
らに、クラックが生じないないため、ソルダレジストで
導体を完全に保護でき、防錆処理、リフロー、基板洗浄
等における薬品によって導体が浸食されることがなくな
り、クラックに起因する絶縁不良を防止できる。Therefore, at the time of press punching, the printed wiring board is not bent, and the solder resist is not pulled in the direction of the shearing portion, so that no crack is generated. Furthermore, since no crack is generated, the conductor can be completely protected by the solder resist, the conductor is not eroded by chemicals in rust prevention treatment, reflow, substrate cleaning, and the like, and insulation failure due to the crack can be prevented.
【0025】本発明の請求項2に係るプリント配線板の
金型構造は、彫り込み加工を、金属エッチング方法によ
り行なうため、従来行なわれていた放電加工に比し、加
工精度が高く、加工時間が短く、加工費用を安くするこ
とができる。In the mold structure for a printed wiring board according to the second aspect of the present invention, the engraving is performed by a metal etching method. It is short and the processing cost can be reduced.
【図1】本発明に係るプリント配線板の金型構造のプレ
ス打ち抜き状態を示す要部断面図FIG. 1 is a cross-sectional view of a main part showing a press-punched state of a mold structure of a printed wiring board according to the present invention.
【図2】図1のA−A矢視方向から見たシェッターの端
面図FIG. 2 is an end view of the shetter viewed from the direction of arrows AA in FIG. 1;
【図3】従来のプリント配線板の金型構造のプレス打ち
抜き状態を示す要部断面図FIG. 3 is a cross-sectional view of a main part showing a press-punched state of a mold structure of a conventional printed wiring board.
1…金型、2…シェッター、3…雄型、4…導体、5…
ソルダレジスト、6…基材、7…剪断部、8a〜8c,
9a〜9c…エッジ部、10…エッジ部以外の部分、1
1…印刷部、12…雌型、13…ストリッパ。1 ... mold, 2 ... shutter, 3 ... male, 4 ... conductor, 5 ...
Solder resist, 6: base material, 7: shearing portion, 8a to 8c,
9a to 9c: edge portion, 10: portion other than edge portion, 1
1 ... printing unit, 12 ... female type, 13 ... stripper.
Claims (2)
線板の外形及びスリットを打ち抜きするためのプリント
配線板の金型構造において、前記シェッターと前記雄型
は、打ち抜き時、前記プリント配線板の外形及びスリッ
トの剪断部に沿った0.3〜0.6mm幅の部分と対向
する部分をエッジ部とし、このエッジ部以外の部分は、
前記プリント配線板を構成する導体、この導体上のソル
ダレジストおよび部品名称や位置を示す印刷部によって
生じる厚さからエッジ部と対向するソルダレジストの厚
さを差し引いた深さで均一な彫り込み加工が行なわれる
ことを特徴とするプリント配線板の金型構造。1. A mold structure for a printed wiring board for punching an outer shape and a slit of a printed wiring board, comprising a shetter and a male die. The part opposite to the part having a width of 0.3 to 0.6 mm along the outer shape and the shear part of the slit is an edge part, and the part other than the edge part is
The conductor constituting the printed wiring board, the solder resist on this conductor and the uniform engraving process at a depth obtained by subtracting the thickness of the solder resist facing the edge portion from the thickness generated by the printed portion indicating the part name and position. A mold structure for a printed wiring board, wherein the mold structure is performed.
法により行なわれる請求項1記載のプリント配線板の金
型構造。2. The die structure for a printed wiring board according to claim 1, wherein said engraving is performed by a metal etching method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7269595A JP2877019B2 (en) | 1995-03-30 | 1995-03-30 | Mold structure of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7269595A JP2877019B2 (en) | 1995-03-30 | 1995-03-30 | Mold structure of printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08274446A JPH08274446A (en) | 1996-10-18 |
| JP2877019B2 true JP2877019B2 (en) | 1999-03-31 |
Family
ID=13496769
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7269595A Expired - Fee Related JP2877019B2 (en) | 1995-03-30 | 1995-03-30 | Mold structure of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2877019B2 (en) |
-
1995
- 1995-03-30 JP JP7269595A patent/JP2877019B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08274446A (en) | 1996-10-18 |
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